From nobody Sat Feb 7 06:16:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9EF05211A3D; Wed, 22 Jan 2025 14:11:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737555061; cv=none; b=dAnokUIhNPclTU/Bs3QBeAIXz9Hmc1r8NqsNSYYjpMLSa0pCgHOutdsaMN/8IyMhrvgPXkpO0O60WoFSQlAqGNoZOcVMLHqQUbPYbG5VRdP8nLFnMUGJzl18fht1ic7pK00v6ahKJuuc0fZz7T9v74RclLI3ZBMk+ScfRNOfSFM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737555061; c=relaxed/simple; bh=wVdiuXqJba7aNnQBe5K5tzoubVIua36emL5ugLEg7QY=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=FTtnOYdgvYpZJvHHJ9YERNLwz+ThWRpYSfz+4D6oVz6EsOFDfUIWvOA1MtYQ5i/Ny6+kX/43mwqoAFKYYI9QMVKMRqXKKbNhbHnYWCDXBRUq++Mv2/7N+oKQ1sYy8cxKUCp/yK0YkHWjDqzZOPnYbOWaAEPaNMxuekMWP3RXPkE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FE0rHjO4; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FE0rHjO4" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 195E9C4CED2; Wed, 22 Jan 2025 14:10:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1737555061; bh=wVdiuXqJba7aNnQBe5K5tzoubVIua36emL5ugLEg7QY=; h=From:To:Cc:Subject:Date:From; b=FE0rHjO4f0GiF3U17/qulgF3DKVZQ9Bh8EgPPFvzEja5Czh5KhlMUEKhzZzfy1II/ IiBJEwXXveZv9UVEgC+ao8T+/KfW0gUrRx901Ytd+v23VfmvYkNHO/2CYfnH0MKXLP z6m95/qcqgl2hwcg1P/3pyXltORhXHBE30glesGwo278MWVNTlZzwcyC6cA8nROdkS aFHoRDCgPV2i5K0udNeP+3i7MUV2mizZ3QaJNBM09014lkc0LPFAB3uMI/7Nzw45Tw mY90H6m/6VzF35ND/QxBu+Hd1rohiIEqODbqTN4dOnRIDgxwR7t0imtgjhXTH5IHhE nQGMuZjYasaTg== From: Philipp Stanner To: Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , Xinhui Pan , David Airlie , Simona Vetter , Lucas Stach , Russell King , Christian Gmeiner , Frank Binns , Matt Coster , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Qiang Yu , Rob Clark , Sean Paul , Konrad Dybcio , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten , Karol Herbst , Lyude Paul , Danilo Krummrich , Boris Brezillon , Rob Herring , Steven Price , Liviu Dudau , Luben Tuikov , Matthew Brost , Philipp Stanner , Melissa Wen , =?UTF-8?q?Ma=C3=ADra=20Canal?= , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Sunil Khatri , Lijo Lazar , Mario Limonciello , Ma Jun , Yunxiang Li Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, etnaviv@lists.freedesktop.org, lima@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, nouveau@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Philipp Stanner Subject: [PATCH] drm/sched: Use struct for drm_sched_init() params Date: Wed, 22 Jan 2025 15:08:20 +0100 Message-ID: <20250122140818.45172-3-phasta@kernel.org> X-Mailer: git-send-email 2.47.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" drm_sched_init() has a great many parameters and upcoming new functionality for the scheduler might add even more. Generally, the great number of parameters reduces readability and has already caused one missnaming in: commit 6f1cacf4eba7 ("drm/nouveau: Improve variable name in nouveau_sched_i= nit()"). Introduce a new struct for the scheduler init parameters and port all users. Signed-off-by: Philipp Stanner --- Howdy, I have a patch-series in the pipe that will add a `flags` argument to drm_sched_init(). I thought it would be wise to first rework the API as detailed in this patch. It's really a lot of parameters by now, and I would expect that it might get more and more over the years for special use cases etc. Regards, P. --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 21 +++- drivers/gpu/drm/etnaviv/etnaviv_sched.c | 20 ++- drivers/gpu/drm/imagination/pvr_queue.c | 21 +++- drivers/gpu/drm/lima/lima_sched.c | 21 +++- drivers/gpu/drm/msm/msm_ringbuffer.c | 22 ++-- drivers/gpu/drm/nouveau/nouveau_sched.c | 20 ++- drivers/gpu/drm/panfrost/panfrost_job.c | 22 ++-- drivers/gpu/drm/panthor/panthor_mmu.c | 18 ++- drivers/gpu/drm/panthor/panthor_sched.c | 23 ++-- drivers/gpu/drm/scheduler/sched_main.c | 53 +++----- drivers/gpu/drm/v3d/v3d_sched.c | 135 +++++++++++++++------ drivers/gpu/drm/xe/xe_execlist.c | 20 ++- drivers/gpu/drm/xe/xe_gpu_scheduler.c | 19 ++- include/drm/gpu_scheduler.h | 35 +++++- 14 files changed, 311 insertions(+), 139 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_device.c index cd4fac120834..c1f03eb5f5ea 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -2821,6 +2821,9 @@ static int amdgpu_device_init_schedulers(struct amdgp= u_device *adev) { long timeout; int r, i; + struct drm_sched_init_params params; + + memset(¶ms, 0, sizeof(struct drm_sched_init_params)); =20 for (i =3D 0; i < AMDGPU_MAX_RINGS; ++i) { struct amdgpu_ring *ring =3D adev->rings[i]; @@ -2844,12 +2847,18 @@ static int amdgpu_device_init_schedulers(struct amd= gpu_device *adev) break; } =20 - r =3D drm_sched_init(&ring->sched, &amdgpu_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - ring->num_hw_submission, 0, - timeout, adev->reset_domain->wq, - ring->sched_score, ring->name, - adev->dev); + params.ops =3D &amdgpu_sched_ops; + params.submit_wq =3D NULL; /* Use the system_wq. */ + params.num_rqs =3D DRM_SCHED_PRIORITY_COUNT; + params.credit_limit =3D ring->num_hw_submission; + params.hang_limit =3D 0; + params.timeout =3D timeout; + params.timeout_wq =3D adev->reset_domain->wq; + params.score =3D ring->sched_score; + params.name =3D ring->name; + params.dev =3D adev->dev; + + r =3D drm_sched_init(&ring->sched, ¶ms); if (r) { DRM_ERROR("Failed to create scheduler on ring %s.\n", ring->name); diff --git a/drivers/gpu/drm/etnaviv/etnaviv_sched.c b/drivers/gpu/drm/etna= viv/etnaviv_sched.c index 5b67eda122db..7d8517f1963e 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_sched.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_sched.c @@ -145,12 +145,22 @@ int etnaviv_sched_push_job(struct etnaviv_gem_submit = *submit) int etnaviv_sched_init(struct etnaviv_gpu *gpu) { int ret; + struct drm_sched_init_params params; =20 - ret =3D drm_sched_init(&gpu->sched, &etnaviv_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - etnaviv_hw_jobs_limit, etnaviv_job_hang_limit, - msecs_to_jiffies(500), NULL, NULL, - dev_name(gpu->dev), gpu->dev); + memset(¶ms, 0, sizeof(struct drm_sched_init_params)); + + params.ops =3D &etnaviv_sched_ops; + params.submit_wq =3D NULL; /* Use the system_wq. */ + params.num_rqs =3D DRM_SCHED_PRIORITY_COUNT; + params.credit_limit =3D etnaviv_hw_jobs_limit; + params.hang_limit =3D etnaviv_job_hang_limit; + params.timeout =3D msecs_to_jiffies(500); + params.timeout_wq =3D NULL; /* Use the system_wq. */ + params.score =3D NULL; + params.name =3D dev_name(gpu->dev); + params.dev =3D gpu->dev; + + ret =3D drm_sched_init(&gpu->sched, ¶ms); if (ret) return ret; =20 diff --git a/drivers/gpu/drm/imagination/pvr_queue.c b/drivers/gpu/drm/imag= ination/pvr_queue.c index c4f08432882b..03a2ce1a88e7 100644 --- a/drivers/gpu/drm/imagination/pvr_queue.c +++ b/drivers/gpu/drm/imagination/pvr_queue.c @@ -1211,10 +1211,13 @@ struct pvr_queue *pvr_queue_create(struct pvr_conte= xt *ctx, }; struct pvr_device *pvr_dev =3D ctx->pvr_dev; struct drm_gpu_scheduler *sched; + struct drm_sched_init_params sched_params; struct pvr_queue *queue; int ctx_state_size, err; void *cpu_map; =20 + memset(&sched_params, 0, sizeof(struct drm_sched_init_params)); + if (WARN_ON(type >=3D sizeof(props))) return ERR_PTR(-EINVAL); =20 @@ -1282,12 +1285,18 @@ struct pvr_queue *pvr_queue_create(struct pvr_conte= xt *ctx, =20 queue->timeline_ufo.value =3D cpu_map; =20 - err =3D drm_sched_init(&queue->scheduler, - &pvr_queue_sched_ops, - pvr_dev->sched_wq, 1, 64 * 1024, 1, - msecs_to_jiffies(500), - pvr_dev->sched_wq, NULL, "pvr-queue", - pvr_dev->base.dev); + sched_params.ops =3D &pvr_queue_sched_ops; + sched_params.submit_wq =3D pvr_dev->sched_wq; + sched_params.num_rqs =3D 1; + sched_params.credit_limit =3D 64 * 1024; + sched_params.hang_limit =3D 1; + sched_params.timeout =3D msecs_to_jiffies(500); + sched_params.timeout_wq =3D pvr_dev->sched_wq; + sched_params.score =3D NULL; + sched_params.name =3D "pvr-queue"; + sched_params.dev =3D pvr_dev->base.dev; + + err =3D drm_sched_init(&queue->scheduler, &sched_params); if (err) goto err_release_ufo; =20 diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_= sched.c index b40c90e97d7e..a64c50fb6d1e 100644 --- a/drivers/gpu/drm/lima/lima_sched.c +++ b/drivers/gpu/drm/lima/lima_sched.c @@ -513,20 +513,29 @@ static void lima_sched_recover_work(struct work_struc= t *work) =20 int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name) { + struct drm_sched_init_params params; unsigned int timeout =3D lima_sched_timeout_ms > 0 ? lima_sched_timeout_ms : 10000; =20 + memset(¶ms, 0, sizeof(struct drm_sched_init_params)); + pipe->fence_context =3D dma_fence_context_alloc(1); spin_lock_init(&pipe->fence_lock); =20 INIT_WORK(&pipe->recover_work, lima_sched_recover_work); =20 - return drm_sched_init(&pipe->base, &lima_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - 1, - lima_job_hang_limit, - msecs_to_jiffies(timeout), NULL, - NULL, name, pipe->ldev->dev); + params.ops =3D &lima_sched_ops; + params.submit_wq =3D NULL; /* Use the system_wq. */ + params.num_rqs =3D DRM_SCHED_PRIORITY_COUNT; + params.credit_limit =3D 1; + params.hang_limit =3D lima_job_hang_limit; + params.timeout =3D msecs_to_jiffies(timeout); + params.timeout_wq =3D NULL; /* Use the system_wq. */ + params.score =3D NULL; + params.name =3D name; + params.dev =3D pipe->ldev->dev; + + return drm_sched_init(&pipe->base, ¶ms); } =20 void lima_sched_pipe_fini(struct lima_sched_pipe *pipe) diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.c b/drivers/gpu/drm/msm/msm= _ringbuffer.c index c803556a8f64..49a2c7422dc6 100644 --- a/drivers/gpu/drm/msm/msm_ringbuffer.c +++ b/drivers/gpu/drm/msm/msm_ringbuffer.c @@ -59,11 +59,13 @@ static const struct drm_sched_backend_ops msm_sched_ops= =3D { struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, void *memptrs, uint64_t memptrs_iova) { + struct drm_sched_init_params params; struct msm_ringbuffer *ring; - long sched_timeout; char name[32]; int ret; =20 + memset(¶ms, 0, sizeof(struct drm_sched_init_params)); + /* We assume everywhere that MSM_GPU_RINGBUFFER_SZ is a power of 2 */ BUILD_BUG_ON(!is_power_of_2(MSM_GPU_RINGBUFFER_SZ)); =20 @@ -95,13 +97,19 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gp= u *gpu, int id, ring->memptrs =3D memptrs; ring->memptrs_iova =3D memptrs_iova; =20 - /* currently managing hangcheck ourselves: */ - sched_timeout =3D MAX_SCHEDULE_TIMEOUT; + params.ops =3D &msm_sched_ops; + params.submit_wq =3D NULL; /* Use the system_wq. */ + params.num_rqs =3D DRM_SCHED_PRIORITY_COUNT; + params.credit_limit =3D num_hw_submissions; + params.hang_limit =3D 0; + /* currently managing hangcheck ourselves: */ + params.timeout =3D MAX_SCHEDULE_TIMEOUT; + params.timeout_wq =3D NULL; /* Use the system_wq. */ + params.score =3D NULL; + params.name =3D to_msm_bo(ring->bo)->name; + params.dev =3D gpu->dev->dev; =20 - ret =3D drm_sched_init(&ring->sched, &msm_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - num_hw_submissions, 0, sched_timeout, - NULL, NULL, to_msm_bo(ring->bo)->name, gpu->dev->dev); + ret =3D drm_sched_init(&ring->sched, ¶ms); if (ret) { goto fail; } diff --git a/drivers/gpu/drm/nouveau/nouveau_sched.c b/drivers/gpu/drm/nouv= eau/nouveau_sched.c index 4412f2711fb5..f20c2e612750 100644 --- a/drivers/gpu/drm/nouveau/nouveau_sched.c +++ b/drivers/gpu/drm/nouveau/nouveau_sched.c @@ -404,9 +404,11 @@ nouveau_sched_init(struct nouveau_sched *sched, struct= nouveau_drm *drm, { struct drm_gpu_scheduler *drm_sched =3D &sched->base; struct drm_sched_entity *entity =3D &sched->entity; - const long timeout =3D msecs_to_jiffies(NOUVEAU_SCHED_JOB_TIMEOUT_MS); + struct drm_sched_init_params params; int ret; =20 + memset(¶ms, 0, sizeof(struct drm_sched_init_params)); + if (!wq) { wq =3D alloc_workqueue("nouveau_sched_wq_%d", 0, WQ_MAX_ACTIVE, current->pid); @@ -416,10 +418,18 @@ nouveau_sched_init(struct nouveau_sched *sched, struc= t nouveau_drm *drm, sched->wq =3D wq; } =20 - ret =3D drm_sched_init(drm_sched, &nouveau_sched_ops, wq, - NOUVEAU_SCHED_PRIORITY_COUNT, - credit_limit, 0, timeout, - NULL, NULL, "nouveau_sched", drm->dev->dev); + params.ops =3D &nouveau_sched_ops; + params.submit_wq =3D wq; + params.num_rqs =3D DRM_SCHED_PRIORITY_COUNT; + params.credit_limit =3D credit_limit; + params.hang_limit =3D 0; + params.timeout =3D msecs_to_jiffies(NOUVEAU_SCHED_JOB_TIMEOUT_MS); + params.timeout_wq =3D NULL; /* Use the system_wq. */ + params.score =3D NULL; + params.name =3D "nouveau_sched"; + params.dev =3D drm->dev->dev; + + ret =3D drm_sched_init(drm_sched, ¶ms); if (ret) goto fail_wq; =20 diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panf= rost/panfrost_job.c index 9b8e82fb8bc4..6b509ff446b5 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.c +++ b/drivers/gpu/drm/panfrost/panfrost_job.c @@ -836,10 +836,13 @@ static irqreturn_t panfrost_job_irq_handler(int irq, = void *data) =20 int panfrost_job_init(struct panfrost_device *pfdev) { + struct drm_sched_init_params params; struct panfrost_job_slot *js; unsigned int nentries =3D 2; int ret, j; =20 + memset(¶ms, 0, sizeof(struct drm_sched_init_params)); + /* All GPUs have two entries per queue, but without jobchain * disambiguation stopping the right job in the close path is tricky, * so let's just advertise one entry in that case. @@ -872,16 +875,21 @@ int panfrost_job_init(struct panfrost_device *pfdev) if (!pfdev->reset.wq) return -ENOMEM; =20 + params.ops =3D &panfrost_sched_ops; + params.submit_wq =3D NULL; /* Use the system_wq. */ + params.num_rqs =3D DRM_SCHED_PRIORITY_COUNT; + params.credit_limit =3D nentries; + params.hang_limit =3D 0; + params.timeout =3D msecs_to_jiffies(JOB_TIMEOUT_MS); + params.timeout_wq =3D pfdev->reset.wq; + params.score =3D NULL; + params.name =3D "pan_js"; + params.dev =3D pfdev->dev; + for (j =3D 0; j < NUM_JOB_SLOTS; j++) { js->queue[j].fence_context =3D dma_fence_context_alloc(1); =20 - ret =3D drm_sched_init(&js->queue[j].sched, - &panfrost_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - nentries, 0, - msecs_to_jiffies(JOB_TIMEOUT_MS), - pfdev->reset.wq, - NULL, "pan_js", pfdev->dev); + ret =3D drm_sched_init(&js->queue[j].sched, ¶ms); if (ret) { dev_err(pfdev->dev, "Failed to create scheduler: %d.", ret); goto err_sched; diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/pantho= r/panthor_mmu.c index a49132f3778b..4362442cbfd8 100644 --- a/drivers/gpu/drm/panthor/panthor_mmu.c +++ b/drivers/gpu/drm/panthor/panthor_mmu.c @@ -2268,6 +2268,7 @@ panthor_vm_create(struct panthor_device *ptdev, bool = for_mcu, u64 full_va_range =3D 1ull << va_bits; struct drm_gem_object *dummy_gem; struct drm_gpu_scheduler *sched; + struct drm_sched_init_params sched_params; struct io_pgtable_cfg pgtbl_cfg; u64 mair, min_va, va_range; struct panthor_vm *vm; @@ -2284,6 +2285,8 @@ panthor_vm_create(struct panthor_device *ptdev, bool = for_mcu, goto err_free_vm; } =20 + memset(&sched_params, 0, sizeof(struct drm_sched_init_params)); + mutex_init(&vm->heaps.lock); vm->for_mcu =3D for_mcu; vm->ptdev =3D ptdev; @@ -2325,11 +2328,18 @@ panthor_vm_create(struct panthor_device *ptdev, boo= l for_mcu, goto err_mm_takedown; } =20 + sched_params.ops =3D &panthor_vm_bind_ops; + sched_params.submit_wq =3D ptdev->mmu->vm.wq; + sched_params.num_rqs =3D 1; + sched_params.credit_limit =3D 1; + sched_params.hang_limit =3D 0; /* Bind operations are synchronous for now, no timeout needed. */ - ret =3D drm_sched_init(&vm->sched, &panthor_vm_bind_ops, ptdev->mmu->vm.w= q, - 1, 1, 0, - MAX_SCHEDULE_TIMEOUT, NULL, NULL, - "panthor-vm-bind", ptdev->base.dev); + sched_params.timeout =3D MAX_SCHEDULE_TIMEOUT; + sched_params.timeout_wq =3D NULL; /* Use the system_wq. */ + sched_params.score =3D NULL; + sched_params.name =3D "panthor-vm-bind"; + sched_params.dev =3D ptdev->base.dev; + ret =3D drm_sched_init(&vm->sched, &sched_params); if (ret) goto err_free_io_pgtable; =20 diff --git a/drivers/gpu/drm/panthor/panthor_sched.c b/drivers/gpu/drm/pant= hor/panthor_sched.c index ef4bec7ff9c7..a324346d302f 100644 --- a/drivers/gpu/drm/panthor/panthor_sched.c +++ b/drivers/gpu/drm/panthor/panthor_sched.c @@ -3272,6 +3272,7 @@ group_create_queue(struct panthor_group *group, const struct drm_panthor_queue_create *args) { struct drm_gpu_scheduler *drm_sched; + struct drm_sched_init_params sched_params; struct panthor_queue *queue; int ret; =20 @@ -3289,6 +3290,8 @@ group_create_queue(struct panthor_group *group, if (!queue) return ERR_PTR(-ENOMEM); =20 + memset(&sched_params, 0, sizeof(struct drm_sched_init_params)); + queue->fence_ctx.id =3D dma_fence_context_alloc(1); spin_lock_init(&queue->fence_ctx.lock); INIT_LIST_HEAD(&queue->fence_ctx.in_flight_jobs); @@ -3341,17 +3344,23 @@ group_create_queue(struct panthor_group *group, if (ret) goto err_free_queue; =20 + sched_params.ops =3D &panthor_queue_sched_ops; + sched_params.submit_wq =3D group->ptdev->scheduler->wq; + sched_params.num_rqs =3D 1; /* - * Credit limit argument tells us the total number of instructions + * The credit limit argument tells us the total number of instructions * across all CS slots in the ringbuffer, with some jobs requiring * twice as many as others, depending on their profiling status. */ - ret =3D drm_sched_init(&queue->scheduler, &panthor_queue_sched_ops, - group->ptdev->scheduler->wq, 1, - args->ringbuf_size / sizeof(u64), - 0, msecs_to_jiffies(JOB_TIMEOUT_MS), - group->ptdev->reset.wq, - NULL, "panthor-queue", group->ptdev->base.dev); + sched_params.credit_limit =3D args->ringbuf_size / sizeof(u64); + sched_params.hang_limit =3D 0; + sched_params.timeout =3D msecs_to_jiffies(JOB_TIMEOUT_MS); + sched_params.timeout_wq =3D group->ptdev->reset.wq; + sched_params.score =3D NULL; + sched_params.name =3D "panthor-queue"; + sched_params.dev =3D group->ptdev->base.dev; + + ret =3D drm_sched_init(&queue->scheduler, &sched_params); if (ret) goto err_free_queue; =20 diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/sched= uler/sched_main.c index 57da84908752..27db748a5269 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -1240,40 +1240,25 @@ static void drm_sched_run_job_work(struct work_stru= ct *w) * drm_sched_init - Init a gpu scheduler instance * * @sched: scheduler instance - * @ops: backend operations for this scheduler - * @submit_wq: workqueue to use for submission. If NULL, an ordered wq is - * allocated and used - * @num_rqs: number of runqueues, one for each priority, up to DRM_SCHED_P= RIORITY_COUNT - * @credit_limit: the number of credits this scheduler can hold from all j= obs - * @hang_limit: number of times to allow a job to hang before dropping it - * @timeout: timeout value in jiffies for the scheduler - * @timeout_wq: workqueue to use for timeout work. If NULL, the system_wq = is - * used - * @score: optional score atomic shared with other schedulers - * @name: name used for debugging - * @dev: target &struct device + * @params: scheduler initialization parameters * * Return 0 on success, otherwise error code. */ int drm_sched_init(struct drm_gpu_scheduler *sched, - const struct drm_sched_backend_ops *ops, - struct workqueue_struct *submit_wq, - u32 num_rqs, u32 credit_limit, unsigned int hang_limit, - long timeout, struct workqueue_struct *timeout_wq, - atomic_t *score, const char *name, struct device *dev) + const struct drm_sched_init_params *params) { int i; =20 - sched->ops =3D ops; - sched->credit_limit =3D credit_limit; - sched->name =3D name; - sched->timeout =3D timeout; - sched->timeout_wq =3D timeout_wq ? : system_wq; - sched->hang_limit =3D hang_limit; - sched->score =3D score ? score : &sched->_score; - sched->dev =3D dev; + sched->ops =3D params->ops; + sched->credit_limit =3D params->credit_limit; + sched->name =3D params->name; + sched->timeout =3D params->timeout; + sched->timeout_wq =3D params->timeout_wq ? : system_wq; + sched->hang_limit =3D params->hang_limit; + sched->score =3D params->score ? params->score : &sched->_score; + sched->dev =3D params->dev; =20 - if (num_rqs > DRM_SCHED_PRIORITY_COUNT) { + if (params->num_rqs > DRM_SCHED_PRIORITY_COUNT) { /* This is a gross violation--tell drivers what the problem is. */ drm_err(sched, "%s: num_rqs cannot be greater than DRM_SCHED_PRIORITY_CO= UNT\n", @@ -1288,16 +1273,16 @@ int drm_sched_init(struct drm_gpu_scheduler *sched, return 0; } =20 - if (submit_wq) { - sched->submit_wq =3D submit_wq; + if (params->submit_wq) { + sched->submit_wq =3D params->submit_wq; sched->own_submit_wq =3D false; } else { #ifdef CONFIG_LOCKDEP - sched->submit_wq =3D alloc_ordered_workqueue_lockdep_map(name, - WQ_MEM_RECLAIM, - &drm_sched_lockdep_map); + sched->submit_wq =3D alloc_ordered_workqueue_lockdep_map( + params->name, WQ_MEM_RECLAIM, + &drm_sched_lockdep_map); #else - sched->submit_wq =3D alloc_ordered_workqueue(name, WQ_MEM_RECLAIM); + sched->submit_wq =3D alloc_ordered_workqueue(params->name, WQ_MEM_RECLAI= M); #endif if (!sched->submit_wq) return -ENOMEM; @@ -1305,11 +1290,11 @@ int drm_sched_init(struct drm_gpu_scheduler *sched, sched->own_submit_wq =3D true; } =20 - sched->sched_rq =3D kmalloc_array(num_rqs, sizeof(*sched->sched_rq), + sched->sched_rq =3D kmalloc_array(params->num_rqs, sizeof(*sched->sched_r= q), GFP_KERNEL | __GFP_ZERO); if (!sched->sched_rq) goto Out_check_own; - sched->num_rqs =3D num_rqs; + sched->num_rqs =3D params->num_rqs; for (i =3D DRM_SCHED_PRIORITY_KERNEL; i < sched->num_rqs; i++) { sched->sched_rq[i] =3D kzalloc(sizeof(*sched->sched_rq[i]), GFP_KERNEL); if (!sched->sched_rq[i]) diff --git a/drivers/gpu/drm/v3d/v3d_sched.c b/drivers/gpu/drm/v3d/v3d_sche= d.c index 99ac4995b5a1..716e6d074d87 100644 --- a/drivers/gpu/drm/v3d/v3d_sched.c +++ b/drivers/gpu/drm/v3d/v3d_sched.c @@ -814,67 +814,124 @@ static const struct drm_sched_backend_ops v3d_cpu_sc= hed_ops =3D { .free_job =3D v3d_cpu_job_free }; =20 +/* + * v3d's scheduler instances are all identical, except for ops and name. + */ +static void +v3d_common_sched_init(struct drm_sched_init_params *params, struct device = *dev) +{ + memset(params, 0, sizeof(struct drm_sched_init_params)); + + params->submit_wq =3D NULL; /* Use the system_wq. */ + params->num_rqs =3D DRM_SCHED_PRIORITY_COUNT; + params->credit_limit =3D 1; + params->hang_limit =3D 0; + params->timeout =3D msecs_to_jiffies(500); + params->timeout_wq =3D NULL; /* Use the system_wq. */ + params->score =3D NULL; + params->dev =3D dev; +} + +static int +v3d_bin_sched_init(struct v3d_dev *v3d) +{ + struct drm_sched_init_params params; + + v3d_common_sched_init(¶ms, v3d->drm.dev); + params.ops =3D &v3d_bin_sched_ops; + params.name =3D "v3d_bin"; + + return drm_sched_init(&v3d->queue[V3D_BIN].sched, ¶ms); +} + +static int +v3d_render_sched_init(struct v3d_dev *v3d) +{ + struct drm_sched_init_params params; + + v3d_common_sched_init(¶ms, v3d->drm.dev); + params.ops =3D &v3d_render_sched_ops; + params.name =3D "v3d_render"; + + return drm_sched_init(&v3d->queue[V3D_RENDER].sched, ¶ms); +} + +static int +v3d_tfu_sched_init(struct v3d_dev *v3d) +{ + struct drm_sched_init_params params; + + v3d_common_sched_init(¶ms, v3d->drm.dev); + params.ops =3D &v3d_tfu_sched_ops; + params.name =3D "v3d_tfu"; + + return drm_sched_init(&v3d->queue[V3D_TFU].sched, ¶ms); +} + +static int +v3d_csd_sched_init(struct v3d_dev *v3d) +{ + struct drm_sched_init_params params; + + v3d_common_sched_init(¶ms, v3d->drm.dev); + params.ops =3D &v3d_csd_sched_ops; + params.name =3D "v3d_csd"; + + return drm_sched_init(&v3d->queue[V3D_CSD].sched, ¶ms); +} + +static int +v3d_cache_sched_init(struct v3d_dev *v3d) +{ + struct drm_sched_init_params params; + + v3d_common_sched_init(¶ms, v3d->drm.dev); + params.ops =3D &v3d_cache_clean_sched_ops; + params.name =3D "v3d_cache_clean"; + + return drm_sched_init(&v3d->queue[V3D_CACHE_CLEAN].sched, ¶ms); +} + +static int +v3d_cpu_sched_init(struct v3d_dev *v3d) +{ + struct drm_sched_init_params params; + + v3d_common_sched_init(¶ms, v3d->drm.dev); + params.ops =3D &v3d_cpu_sched_ops; + params.name =3D "v3d_cpu"; + + return drm_sched_init(&v3d->queue[V3D_CPU].sched, ¶ms); +} + int v3d_sched_init(struct v3d_dev *v3d) { - int hw_jobs_limit =3D 1; - int job_hang_limit =3D 0; - int hang_limit_ms =3D 500; int ret; =20 - ret =3D drm_sched_init(&v3d->queue[V3D_BIN].sched, - &v3d_bin_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - hw_jobs_limit, job_hang_limit, - msecs_to_jiffies(hang_limit_ms), NULL, - NULL, "v3d_bin", v3d->drm.dev); + ret =3D v3d_bin_sched_init(v3d); if (ret) return ret; =20 - ret =3D drm_sched_init(&v3d->queue[V3D_RENDER].sched, - &v3d_render_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - hw_jobs_limit, job_hang_limit, - msecs_to_jiffies(hang_limit_ms), NULL, - NULL, "v3d_render", v3d->drm.dev); + ret =3D v3d_render_sched_init(v3d); if (ret) goto fail; =20 - ret =3D drm_sched_init(&v3d->queue[V3D_TFU].sched, - &v3d_tfu_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - hw_jobs_limit, job_hang_limit, - msecs_to_jiffies(hang_limit_ms), NULL, - NULL, "v3d_tfu", v3d->drm.dev); + ret =3D v3d_tfu_sched_init(v3d); if (ret) goto fail; =20 if (v3d_has_csd(v3d)) { - ret =3D drm_sched_init(&v3d->queue[V3D_CSD].sched, - &v3d_csd_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - hw_jobs_limit, job_hang_limit, - msecs_to_jiffies(hang_limit_ms), NULL, - NULL, "v3d_csd", v3d->drm.dev); + ret =3D v3d_csd_sched_init(v3d); if (ret) goto fail; =20 - ret =3D drm_sched_init(&v3d->queue[V3D_CACHE_CLEAN].sched, - &v3d_cache_clean_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - hw_jobs_limit, job_hang_limit, - msecs_to_jiffies(hang_limit_ms), NULL, - NULL, "v3d_cache_clean", v3d->drm.dev); + ret =3D v3d_cache_sched_init(v3d); if (ret) goto fail; } =20 - ret =3D drm_sched_init(&v3d->queue[V3D_CPU].sched, - &v3d_cpu_sched_ops, NULL, - DRM_SCHED_PRIORITY_COUNT, - 1, job_hang_limit, - msecs_to_jiffies(hang_limit_ms), NULL, - NULL, "v3d_cpu", v3d->drm.dev); + ret =3D v3d_cpu_sched_init(v3d); if (ret) goto fail; =20 diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execl= ist.c index a8c416a48812..7f29b7f04af4 100644 --- a/drivers/gpu/drm/xe/xe_execlist.c +++ b/drivers/gpu/drm/xe/xe_execlist.c @@ -332,10 +332,13 @@ static const struct drm_sched_backend_ops drm_sched_o= ps =3D { static int execlist_exec_queue_init(struct xe_exec_queue *q) { struct drm_gpu_scheduler *sched; + struct drm_sched_init_params params; struct xe_execlist_exec_queue *exl; struct xe_device *xe =3D gt_to_xe(q->gt); int err; =20 + memset(¶ms, 0, sizeof(struct drm_sched_init_params)); + xe_assert(xe, !xe_device_uc_enabled(xe)); =20 drm_info(&xe->drm, "Enabling execlist submission (GuC submission disabled= )\n"); @@ -346,11 +349,18 @@ static int execlist_exec_queue_init(struct xe_exec_qu= eue *q) =20 exl->q =3D q; =20 - err =3D drm_sched_init(&exl->sched, &drm_sched_ops, NULL, 1, - q->lrc[0]->ring.size / MAX_JOB_SIZE_BYTES, - XE_SCHED_HANG_LIMIT, XE_SCHED_JOB_TIMEOUT, - NULL, NULL, q->hwe->name, - gt_to_xe(q->gt)->drm.dev); + params.ops =3D &drm_sched_ops; + params.submit_wq =3D NULL; /* Use the system_wq. */ + params.num_rqs =3D 1; + params.credit_limit =3D q->lrc[0]->ring.size / MAX_JOB_SIZE_BYTES; + params.hang_limit =3D XE_SCHED_HANG_LIMIT; + params.timeout =3D XE_SCHED_JOB_TIMEOUT; + params.timeout_wq =3D NULL; /* Use the system_wq. */ + params.score =3D NULL; + params.name =3D q->hwe->name; + params.dev =3D gt_to_xe(q->gt)->drm.dev; + + err =3D drm_sched_init(&exl->sched, ¶ms); if (err) goto err_free; =20 diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_= gpu_scheduler.c index 50361b4638f9..2129fee83f25 100644 --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c @@ -63,13 +63,26 @@ int xe_sched_init(struct xe_gpu_scheduler *sched, atomic_t *score, const char *name, struct device *dev) { + struct drm_sched_init_params params; + sched->ops =3D xe_ops; INIT_LIST_HEAD(&sched->msgs); INIT_WORK(&sched->work_process_msg, xe_sched_process_msg_work); =20 - return drm_sched_init(&sched->base, ops, submit_wq, 1, hw_submission, - hang_limit, timeout, timeout_wq, score, name, - dev); + memset(¶ms, 0, sizeof(struct drm_sched_init_params)); + + params.ops =3D ops; + params.submit_wq =3D submit_wq; + params.num_rqs =3D 1; + params.credit_limit =3D hw_submission; + params.hang_limit =3D hang_limit; + params.timeout =3D timeout; + params.timeout_wq =3D timeout_wq; + params.score =3D score; + params.name =3D name; + params.dev =3D dev; + + return drm_sched_init(&sched->base, ¶ms); } =20 void xe_sched_fini(struct xe_gpu_scheduler *sched) diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h index 95e17504e46a..1a834ef43862 100644 --- a/include/drm/gpu_scheduler.h +++ b/include/drm/gpu_scheduler.h @@ -553,12 +553,37 @@ struct drm_gpu_scheduler { struct device *dev; }; =20 +/** + * struct drm_sched_init_params - parameters for initializing a DRM GPU sc= heduler + * + * @ops: backend operations provided by the driver + * @submit_wq: workqueue to use for submission. If NULL, an ordered wq is + * allocated and used + * @num_rqs: Number of run-queues. This is at most DRM_SCHED_PRIORITY_COUN= T, + * as there's usually one run-queue per priority, but could be l= ess. + * @credit_limit: the number of credits this scheduler can hold from all j= obs + * @hang_limit: number of times to allow a job to hang before dropping it + * @timeout: timeout value in jiffies for the scheduler + * @timeout_wq: workqueue to use for timeout work. If NULL, the system_wq = is + * used + * @score: optional score atomic shared with other schedulers + * @name: name used for debugging + * @dev: associated device. Used for debugging + */ +struct drm_sched_init_params { + const struct drm_sched_backend_ops *ops; + struct workqueue_struct *submit_wq; + struct workqueue_struct *timeout_wq; + u32 num_rqs, credit_limit; + unsigned int hang_limit; + long timeout; + atomic_t *score; + const char *name; + struct device *dev; +}; + int drm_sched_init(struct drm_gpu_scheduler *sched, - const struct drm_sched_backend_ops *ops, - struct workqueue_struct *submit_wq, - u32 num_rqs, u32 credit_limit, unsigned int hang_limit, - long timeout, struct workqueue_struct *timeout_wq, - atomic_t *score, const char *name, struct device *dev); + const struct drm_sched_init_params *params); =20 void drm_sched_fini(struct drm_gpu_scheduler *sched); int drm_sched_job_init(struct drm_sched_job *job, --=20 2.47.1