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([78.9.4.190]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab384ce0529sm740943866b.43.2025.01.21.04.56.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2025 04:56:19 -0800 (PST) From: Lukasz Czechowski To: linux-arm-kernel@lists.infradead.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quentin.schulz@cherry.de, Lukasz Czechowski , stable@vger.kernel.org Subject: [PATCH v2 2/2] arm64: dts: rockchip: Disable DMA for uart5 on px30-ringneck Date: Tue, 21 Jan 2025 13:56:04 +0100 Message-ID: <20250121125604.3115235-3-lukasz.czechowski@thaumatec.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250121125604.3115235-1-lukasz.czechowski@thaumatec.com> References: <20250121125604.3115235-1-lukasz.czechowski@thaumatec.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable UART controllers without flow control seem to behave unstable in case DMA is enabled. The issues were indicated in the message: https://lore.kernel.org/linux-arm-kernel/CAMdYzYpXtMocCtCpZLU_xuWmOp2Ja_v0A= j0e6YFNRA-yV7u14g@mail.gmail.com/ In case of PX30-uQ7 Ringneck SoM, it was noticed that after couple of hours of UART communication, the CPU stall was occurring, leading to the system becoming unresponsive. After disabling the DMA, extensive UART communication tests for up to two weeks were performed, and no issues were further observed. The flow control pins for uart5 are not available on PX30-uQ7 Ringneck, as configured by pinctrl-0, so the DMA nodes were removed on SoM dtsi. Cc: stable@vger.kernel.org Fixes: c484cf93f61b ("arm64: dts: rockchip: add PX30-=C2=B5Q7 (Ringneck) So= M with Haikou baseboard") Reviewed-by: Quentin Schulz Signed-off-by: Lukasz Czechowski --- arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/b= oot/dts/rockchip/px30-ringneck.dtsi index 2c87005c89bd3..e80412abec081 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi @@ -397,6 +397,8 @@ &u2phy_host { }; =20 &uart5 { + /delete-property/ dmas; + /delete-property/ dma-names; pinctrl-0 =3D <&uart5_xfer>; }; =20 --=20 2.43.0