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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jan 2025 10:02:13.5342 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c8db8dc5-956a-4209-9502-08dd3939835c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB9514 Content-Type: text/plain; charset="utf-8" Add acp pdm driver dma ops and dai ops for ACP7.0 & ACP7.1 platforms. Signed-off-by: Vijendar Mukunda --- sound/soc/amd/acp70/acp70-pdm-dma.c | 319 ++++++++++++++++++++++++++++ sound/soc/amd/acp70/acp70.h | 32 +++ 2 files changed, 351 insertions(+) diff --git a/sound/soc/amd/acp70/acp70-pdm-dma.c b/sound/soc/amd/acp70/acp7= 0-pdm-dma.c index fd31e31a02a6..197214e68489 100644 --- a/sound/soc/amd/acp70/acp70-pdm-dma.c +++ b/sound/soc/amd/acp70/acp70-pdm-dma.c @@ -18,6 +18,319 @@ =20 #define DRV_NAME "acp70_pdm_dma" =20 +static int pdm_gain =3D 3; +module_param(pdm_gain, int, 0644); +MODULE_PARM_DESC(pdm_gain, "Gain control (0-3)"); + +static const struct snd_pcm_hardware acp70_pdm_hardware_capture =3D { + .info =3D SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME, + .formats =3D SNDRV_PCM_FMTBIT_S32_LE, + .channels_min =3D 2, + .channels_max =3D 2, + .rates =3D SNDRV_PCM_RATE_48000, + .rate_min =3D 48000, + .rate_max =3D 48000, + .buffer_bytes_max =3D CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE, + .period_bytes_min =3D CAPTURE_MIN_PERIOD_SIZE, + .period_bytes_max =3D CAPTURE_MAX_PERIOD_SIZE, + .periods_min =3D CAPTURE_MIN_NUM_PERIODS, + .periods_max =3D CAPTURE_MAX_NUM_PERIODS, +}; + +static void acp70_init_pdm_ring_buffer(u32 physical_addr, u32 buffer_size, + u32 watermark_size, void __iomem *acp_base) +{ + writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR); + writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE); + writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE); + writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL); +} + +static void acp70_enable_pdm_clock(void __iomem *acp_base) +{ + u32 pdm_clk_enable, pdm_ctrl; + + pdm_clk_enable =3D ACP_PDM_CLK_FREQ_MASK; + pdm_ctrl =3D 0x00; + + writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL); + pdm_ctrl =3D readl(acp_base + ACP_WOV_MISC_CTRL); + pdm_ctrl &=3D ~ACP_WOV_GAIN_CONTROL; + pdm_ctrl |=3D FIELD_PREP(ACP_WOV_GAIN_CONTROL, clamp(pdm_gain, 0, 3)); + writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL); +} + +static void acp70_enable_pdm_interrupts(struct pdm_dev_data *adata) +{ + u32 ext_int_ctrl; + + mutex_lock(adata->acp_lock); + ext_int_ctrl =3D readl(adata->acp70_base + ACP_EXTERNAL_INTR_CNTL); + ext_int_ctrl |=3D PDM_DMA_INTR_MASK; + writel(ext_int_ctrl, adata->acp70_base + ACP_EXTERNAL_INTR_CNTL); + mutex_unlock(adata->acp_lock); +} + +static void acp70_disable_pdm_interrupts(struct pdm_dev_data *adata) +{ + u32 ext_int_ctrl; + + mutex_lock(adata->acp_lock); + ext_int_ctrl =3D readl(adata->acp70_base + ACP_EXTERNAL_INTR_CNTL); + ext_int_ctrl &=3D ~PDM_DMA_INTR_MASK; + writel(ext_int_ctrl, adata->acp70_base + ACP_EXTERNAL_INTR_CNTL); + mutex_unlock(adata->acp_lock); +} + +static bool acp70_check_pdm_dma_status(void __iomem *acp_base) +{ + bool pdm_dma_status; + u32 pdm_enable, pdm_dma_enable; + + pdm_dma_status =3D false; + pdm_enable =3D readl(acp_base + ACP_WOV_PDM_ENABLE); + pdm_dma_enable =3D readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + if ((pdm_enable & ACP_PDM_ENABLE) && (pdm_dma_enable & ACP_PDM_DMA_EN_STA= TUS)) + pdm_dma_status =3D true; + + return pdm_dma_status; +} + +static int acp70_start_pdm_dma(void __iomem *acp_base) +{ + u32 pdm_enable; + u32 pdm_dma_enable; + int timeout; + + pdm_enable =3D 0x01; + pdm_dma_enable =3D 0x01; + + acp70_enable_pdm_clock(acp_base); + writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); + writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); + timeout =3D 0; + while (++timeout < ACP_COUNTER) { + pdm_dma_enable =3D readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + if ((pdm_dma_enable & 0x02) =3D=3D ACP_PDM_DMA_EN_STATUS) + return 0; + udelay(DELAY_US); + } + return -ETIMEDOUT; +} + +static int acp70_stop_pdm_dma(void __iomem *acp_base) +{ + u32 pdm_enable, pdm_dma_enable; + int timeout; + + pdm_enable =3D 0x00; + pdm_dma_enable =3D 0x00; + + pdm_enable =3D readl(acp_base + ACP_WOV_PDM_ENABLE); + pdm_dma_enable =3D readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + if (pdm_dma_enable & 0x01) { + pdm_dma_enable =3D 0x02; + writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE); + timeout =3D 0; + while (++timeout < ACP_COUNTER) { + pdm_dma_enable =3D readl(acp_base + ACP_WOV_PDM_DMA_ENABLE); + if ((pdm_dma_enable & 0x02) =3D=3D 0x00) + break; + udelay(DELAY_US); + } + if (timeout =3D=3D ACP_COUNTER) + return -ETIMEDOUT; + } + if (pdm_enable =3D=3D ACP_PDM_ENABLE) { + pdm_enable =3D ACP_PDM_DISABLE; + writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE); + } + writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH); + return 0; +} + +static void acp70_config_dma(struct pdm_stream_instance *rtd, int directio= n) +{ + u16 page_idx; + u32 low, high, val; + dma_addr_t addr; + + addr =3D rtd->dma_addr; + val =3D PDM_PTE_OFFSET; + + /* Group Enable */ + writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp70_base + ACPAXI2AXI_ATU_BA= SE_ADDR_GRP_1); + writel(PAGE_SIZE_4K_ENABLE, rtd->acp70_base + ACPAXI2AXI_ATU_PAGE_SIZE_GR= P_1); + for (page_idx =3D 0; page_idx < rtd->num_pages; page_idx++) { + /* Load the low address of page int ACP SRAM through SRBM */ + low =3D lower_32_bits(addr); + high =3D upper_32_bits(addr); + + writel(low, rtd->acp70_base + ACP_SCRATCH_REG_0 + val); + high |=3D BIT(31); + writel(high, rtd->acp70_base + ACP_SCRATCH_REG_0 + val + 4); + val +=3D 8; + addr +=3D PAGE_SIZE; + } +} + +static int acp70_pdm_dma_open(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime; + struct pdm_dev_data *adata; + struct pdm_stream_instance *pdm_data; + int ret; + + runtime =3D substream->runtime; + adata =3D dev_get_drvdata(component->dev); + pdm_data =3D kzalloc(sizeof(*pdm_data), GFP_KERNEL); + if (!pdm_data) + return -EINVAL; + + if (substream->stream =3D=3D SNDRV_PCM_STREAM_CAPTURE) + runtime->hw =3D acp70_pdm_hardware_capture; + + ret =3D snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS); + if (ret < 0) { + dev_err(component->dev, "set integer constraint failed\n"); + kfree(pdm_data); + return ret; + } + + acp70_enable_pdm_interrupts(adata); + + if (substream->stream =3D=3D SNDRV_PCM_STREAM_CAPTURE) + adata->capture_stream =3D substream; + + pdm_data->acp70_base =3D adata->acp70_base; + runtime->private_data =3D pdm_data; + return ret; +} + +static int acp70_pdm_dma_hw_params(struct snd_soc_component *component, + struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct pdm_stream_instance *rtd; + size_t size, period_bytes; + + rtd =3D substream->runtime->private_data; + if (!rtd) + return -EINVAL; + size =3D params_buffer_bytes(params); + period_bytes =3D params_period_bytes(params); + rtd->dma_addr =3D substream->runtime->dma_addr; + rtd->num_pages =3D (PAGE_ALIGN(size) >> PAGE_SHIFT); + acp70_config_dma(rtd, substream->stream); + acp70_init_pdm_ring_buffer(PDM_MEM_WINDOW_START, size, + period_bytes, rtd->acp70_base); + return 0; +} + +static u64 acp70_pdm_get_byte_count(struct pdm_stream_instance *rtd, + int direction) +{ + u32 high, low; + u64 byte_count; + + high =3D readl(rtd->acp70_base + ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH); + byte_count =3D high; + low =3D readl(rtd->acp70_base + ACP_WOV_RX_LINEARPOSITIONCNTR_LOW); + byte_count =3D (byte_count << 32) | low; + return byte_count; +} + +static snd_pcm_uframes_t acp70_pdm_dma_pointer(struct snd_soc_component *c= omp, + struct snd_pcm_substream *stream) +{ + struct pdm_stream_instance *rtd; + u32 pos, buffersize; + u64 bytescount; + + rtd =3D stream->runtime->private_data; + buffersize =3D frames_to_bytes(stream->runtime, + stream->runtime->buffer_size); + bytescount =3D acp70_pdm_get_byte_count(rtd, stream->stream); + if (bytescount > rtd->bytescount) + bytescount -=3D rtd->bytescount; + pos =3D do_div(bytescount, buffersize); + return bytes_to_frames(stream->runtime, pos); +} + +static int acp70_pdm_dma_new(struct snd_soc_component *component, + struct snd_soc_pcm_runtime *rtd) +{ + struct device *parent =3D component->dev->parent; + + snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV, + parent, MIN_BUFFER, MAX_BUFFER); + return 0; +} + +static int acp70_pdm_dma_close(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct pdm_dev_data *adata =3D dev_get_drvdata(component->dev); + struct snd_pcm_runtime *runtime =3D substream->runtime; + + acp70_disable_pdm_interrupts(adata); + adata->capture_stream =3D NULL; + kfree(runtime->private_data); + return 0; +} + +static int acp70_pdm_dai_trigger(struct snd_pcm_substream *substream, + int cmd, struct snd_soc_dai *dai) +{ + struct pdm_stream_instance *rtd; + int ret; + bool pdm_status; + unsigned int ch_mask; + + rtd =3D substream->runtime->private_data; + ret =3D 0; + switch (substream->runtime->channels) { + case TWO_CH: + ch_mask =3D 0x00; + break; + default: + return -EINVAL; + } + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + writel(ch_mask, rtd->acp70_base + ACP_WOV_PDM_NO_OF_CHANNELS); + writel(PDM_DECIMATION_FACTOR, rtd->acp70_base + ACP_WOV_PDM_DECIMATION_F= ACTOR); + rtd->bytescount =3D acp70_pdm_get_byte_count(rtd, substream->stream); + pdm_status =3D acp70_check_pdm_dma_status(rtd->acp70_base); + if (!pdm_status) + ret =3D acp70_start_pdm_dma(rtd->acp70_base); + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + pdm_status =3D acp70_check_pdm_dma_status(rtd->acp70_base); + if (pdm_status) + ret =3D acp70_stop_pdm_dma(rtd->acp70_base); + break; + default: + ret =3D -EINVAL; + break; + } + return ret; +} + +static const struct snd_soc_dai_ops acp70_pdm_dai_ops =3D { + .trigger =3D acp70_pdm_dai_trigger, +}; + static struct snd_soc_dai_driver acp70_pdm_dai_driver =3D { .name =3D "acp_acp70_pdm_dma.0", .capture =3D { @@ -28,10 +341,16 @@ static struct snd_soc_dai_driver acp70_pdm_dai_driver = =3D { .rate_min =3D 48000, .rate_max =3D 48000, }, + .ops =3D &acp70_pdm_dai_ops, }; =20 static const struct snd_soc_component_driver acp70_pdm_component =3D { .name =3D DRV_NAME, + .open =3D acp70_pdm_dma_open, + .close =3D acp70_pdm_dma_close, + .hw_params =3D acp70_pdm_dma_hw_params, + .pointer =3D acp70_pdm_dma_pointer, + .pcm_construct =3D acp70_pdm_dma_new, }; =20 static int acp70_pdm_audio_probe(struct platform_device *pdev) diff --git a/sound/soc/amd/acp70/acp70.h b/sound/soc/amd/acp70/acp70.h index c7cabb98cc1a..d6c99d43ed4f 100644 --- a/sound/soc/amd/acp70/acp70.h +++ b/sound/soc/amd/acp70/acp70.h @@ -34,6 +34,30 @@ #define ACP70_SDW_ADDR 5 #define AMD_SDW_MAX_MANAGERS 2 =20 +#define PDM_DMA_STAT 0x10 +#define PDM_DMA_INTR_MASK 0x10000 +#define ACP_ERROR_STAT 29 +#define PDM_DECIMATION_FACTOR 2 +#define ACP_PDM_CLK_FREQ_MASK 7 +#define ACP_WOV_GAIN_CONTROL GENMASK(4, 3) +#define ACP_PDM_ENABLE 1 +#define ACP_PDM_DISABLE 0 +#define ACP_PDM_DMA_EN_STATUS 2 +#define TWO_CH 2 + +#define ACP_SRAM_PTE_OFFSET 0x03800000 +#define PAGE_SIZE_4K_ENABLE 2 +#define PDM_PTE_OFFSET 0 +#define PDM_MEM_WINDOW_START 0x4000000 + +#define CAPTURE_MIN_NUM_PERIODS 4 +#define CAPTURE_MAX_NUM_PERIODS 4 +#define CAPTURE_MAX_PERIOD_SIZE 8192 +#define CAPTURE_MIN_PERIOD_SIZE 4096 + +#define MAX_BUFFER (CAPTURE_MAX_PERIOD_SIZE * CAPTURE_MAX_NUM_PERIODS) +#define MIN_BUFFER MAX_BUFFER + enum acp_config { ACP_CONFIG_0 =3D 0, ACP_CONFIG_1, @@ -58,6 +82,14 @@ enum acp_config { ACP_CONFIG_20, }; =20 +struct pdm_stream_instance { + u16 num_pages; + u16 channels; + dma_addr_t dma_addr; + u64 bytescount; + void __iomem *acp70_base; +}; + struct pdm_dev_data { u32 pdm_irq; void __iomem *acp70_base; --=20 2.34.1