From nobody Mon Feb 9 14:32:49 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EE0241A23BF for ; Fri, 17 Jan 2025 15:11:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737126668; cv=none; b=l3xOxO8Dok3MEz080bfPVvSBTtMdKUzO5J3OjMBvVWu5RrdVwZ+w0hNjZxybx+Y23Rtc9Rbdk5EcUSTiKrBAqkE8GMX/tGKkXLm6yGAIPZqaiwoHyaiyNnP+K8uTPC1g3dX0nITJLqwBSa5OEGPlSVhvhLA8E6dS7Pm46K7tZfQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737126668; c=relaxed/simple; bh=JqiLtbXZbGdv46a4M+d4rXlw7H9W3TVm4iiRvRNUkns=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=oiN93HJsAD2NiQiGPSvYtokUCIeDlwYr7SDcrNQ2w7BgO5YtXVKIuyscFzLU6i436AI2heaQDV1DFRBTdBeuhmOk+AVJzJ/KwrHi278UaPTOXsQjdnV3PyaMPii0sACgvtr34iUqAV/g/2xeN15y9cng7tYEU0h5A77qfRL7Qek= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 24AA31691; Fri, 17 Jan 2025 07:11:35 -0800 (PST) Received: from e133380.cambridge.arm.com (e133380.arm.com [10.1.197.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 061A83F73F; Fri, 17 Jan 2025 07:11:05 -0800 (PST) From: Dave Martin To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Zeng Heng , Shaopeng Tan , James Morse Subject: [RFC PATCH v2 03/11] arm_mpam: Set INTERNAL as needed when setting MSC controls Date: Fri, 17 Jan 2025 15:10:25 +0000 Message-Id: <20250117151033.1517882-16-Dave.Martin@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250117151033.1517882-1-Dave.Martin@arm.com> References: <20250117151033.1517882-1-Dave.Martin@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently, when an MSC implements PARTID narrowing, MPAMCFG_PART_SEL is left set to the reqPARTID while programming resource controls in an MSC. The MPAM architecture does not guarantee that any particular resource controls will be updated correctly in this scenario. Instead, MPAMCFG_PART_SEL must be written with the corresponding intPARTID and with the INTERNAL bit set before attempting to program resource controls. Only the PARTID->intPARTID mappings can be written without the INTERNAL bit set in MPAMCFG_PART_SEL. Fix it, by rewriting MPAMCFG_PART_SEL appropriately after setting the intPARTID mapping. The MPAMCFG_INTPARTID_INTERNAL flag is not currently accepted as input to the __mpam_part_sel() helper. In the interest of keeping the code clean, break this helper up. Signed-off-by: Dave Martin Signed-off-by: James Morse --- drivers/platform/arm64/mpam/mpam_devices.c | 26 +++++++++++++++++----- 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/platform/arm64/mpam/mpam_devices.c b/drivers/platform/= arm64/mpam/mpam_devices.c index 9463045c0011..f965e6639e0d 100644 --- a/drivers/platform/arm64/mpam/mpam_devices.c +++ b/drivers/platform/arm64/mpam/mpam_devices.c @@ -204,15 +204,27 @@ static u64 mpam_msc_read_esr(struct mpam_msc *msc) return (esr_high << 32) | esr_low; } =20 +static void __mpam_part_sel_raw(u32 partsel, struct mpam_msc *msc) +{ + lockdep_assert_held(&msc->part_sel_lock); + mpam_write_partsel_reg(msc, PART_SEL, partsel); +} + static void __mpam_part_sel(u8 ris_idx, u16 partid, struct mpam_msc *msc) { - u32 partsel; + u32 partsel =3D FIELD_PREP(MPAMCFG_PART_SEL_RIS, ris_idx) | + FIELD_PREP(MPAMCFG_PART_SEL_PARTID_SEL, partid); =20 - lockdep_assert_held(&msc->part_sel_lock); + __mpam_part_sel_raw(partsel, msc); +} =20 - partsel =3D FIELD_PREP(MPAMCFG_PART_SEL_RIS, ris_idx) | - FIELD_PREP(MPAMCFG_PART_SEL_PARTID_SEL, partid); - mpam_write_partsel_reg(msc, PART_SEL, partsel); +static void __mpam_intpart_sel(u8 ris_idx, u16 intpartid, struct mpam_msc = *msc) +{ + u32 partsel =3D FIELD_PREP(MPAMCFG_PART_SEL_RIS, ris_idx) | + FIELD_PREP(MPAMCFG_PART_SEL_PARTID_SEL, intpartid) | + MPAMCFG_PART_SEL_INTERNAL; + + __mpam_part_sel_raw(partsel, msc); } =20 int mpam_register_requestor(u16 partid_max, u8 pmg_max) @@ -1530,9 +1542,11 @@ static void mpam_reprogram_ris_partid(struct mpam_ms= c_ris *ris, u16 partid, mutex_lock(&msc->part_sel_lock); __mpam_part_sel(ris->ris_idx, partid, msc); =20 - if (mpam_has_feature(mpam_feat_partid_nrw, rprops)) + if (mpam_has_feature(mpam_feat_partid_nrw, rprops)) { mpam_write_partsel_reg(msc, INTPARTID, MPAMCFG_INTPARTID_INTERNAL | partid); + __mpam_intpart_sel(ris->ris_idx, partid, msc); + } =20 if (mpam_has_feature(mpam_feat_cpor_part, rprops)) { if (mpam_has_feature(mpam_feat_cpor_part, cfg)) --=20 2.34.1