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[34.91.20.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab384f87065sm199197966b.133.2025.01.17.09.09.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jan 2025 09:09:58 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Fri, 17 Jan 2025 17:09:56 +0000 Subject: [PATCH v4 3/4] arm64: dts: exynos: gs101-oriole: move common Pixel6 & 6Pro parts into a .dtsi Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250117-gs101-simplefb-v4-3-a5b90ca2f917@linaro.org> References: <20250117-gs101-simplefb-v4-0-a5b90ca2f917@linaro.org> In-Reply-To: <20250117-gs101-simplefb-v4-0-a5b90ca2f917@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: Will McVicker , kernel-team@android.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.13.0 In order to support Pixel 6 (Oriole), Pixel 6 Pro (Raven), Pixel 6a (Bluejay), and all other versions correctly, we have to be able to distinguish them properly as we add support for more features. For example, Raven has a larger display. There are other differences, like battery design capacity, etc. Move all the parts that are common for now into a gs101-pixel-common.dtsi, and just leave the display related things in gs101-oriole.dts. Signed-off-by: Andr=C3=A9 Draszik Reviewed-by: Peter Griffin --- Note: MAINTAINERS doesn't need updating, it covers this whole directory v3: - separate DTBs for Pixel 6 and Pixel 6 Pro like in v1 (Krzysztof) - override/extend nodes ordered by label name (Krzysztof) - name common include gs101-pixel-common.dtsi instead of gs101-raviole.dtsi v2: - use a generic gs101-based Pixel base board DTB with different additions to it that make up the different versions 6, 6Pro, 6a, etc.) using overlays, rather than one DTB per version to avoid needless increase of binary sizes and reflect reality - switch to memory-region instead of reg for framebuffer memory --- arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 284 +----------------= ---- .../{gs101-oriole.dts =3D> gs101-pixel-common.dtsi} | 15 +- 2 files changed, 14 insertions(+), 285 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm6= 4/boot/dts/exynos/google/gs101-oriole.dts index d3dd411c9bd0..8df42bedbc03 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts @@ -8,290 +8,22 @@ =20 /dts-v1/; =20 -#include -#include -#include -#include "gs101-pinctrl.h" -#include "gs101.dtsi" +#include "gs101-pixel-common.dtsi" =20 / { model =3D "Oriole"; compatible =3D "google,gs101-oriole", "google,gs101"; - - aliases { - serial0 =3D &serial_0; - }; - - chosen { - /* Bootloader expects bootargs specified otherwise it crashes */ - bootargs =3D ""; - stdout-path =3D &serial_0; - - /* Use display framebuffer as setup by bootloader */ - framebuffer0: framebuffer-0 { - compatible =3D "simple-framebuffer"; - memory-region =3D <&cont_splash_mem>; - width =3D <1080>; - height =3D <2400>; - stride =3D <(1080 * 4)>; - format =3D "a8r8g8b8"; - }; - }; - - gpio-keys { - compatible =3D "gpio-keys"; - pinctrl-0 =3D <&key_voldown>, <&key_volup>, <&key_power>; - pinctrl-names =3D "default"; - - button-vol-down { - label =3D "KEY_VOLUMEDOWN"; - linux,code =3D ; - gpios =3D <&gpa7 3 GPIO_ACTIVE_LOW>; - wakeup-source; - }; - - button-vol-up { - label =3D "KEY_VOLUMEUP"; - linux,code =3D ; - gpios =3D <&gpa8 1 GPIO_ACTIVE_LOW>; - wakeup-source; - }; - - button-power { - label =3D "KEY_POWER"; - linux,code =3D ; - gpios =3D <&gpa10 1 GPIO_ACTIVE_LOW>; - wakeup-source; - }; - }; - - /* TODO: Remove this once PMIC is implemented */ - reg_placeholder: regulator-0 { - compatible =3D "regulator-fixed"; - regulator-name =3D "placeholder_reg"; - }; - - /* TODO: Remove this once S2MPG11 slave PMIC is implemented */ - ufs_0_fixed_vcc_reg: regulator-1 { - compatible =3D "regulator-fixed"; - regulator-name =3D "ufs-vcc"; - gpio =3D <&gpp0 1 GPIO_ACTIVE_HIGH>; - regulator-boot-on; - enable-active-high; - }; - - reserved-memory { - cont_splash_mem: splash@fac00000 { - reg =3D <0x0 0xfac00000 (1080 * 2400 * 4)>; - no-map; - }; - }; -}; - -&ext_24_5m { - clock-frequency =3D <24576000>; -}; - -&ext_200m { - clock-frequency =3D <200000000>; -}; - -&hsi2c_8 { - status =3D "okay"; - - eeprom: eeprom@50 { - compatible =3D "atmel,24c08"; - reg =3D <0x50>; - }; -}; - -&hsi2c_12 { - status =3D "okay"; - /* TODO: add the devices once drivers exist */ - - usb-typec@25 { - compatible =3D "maxim,max77759-tcpci", "maxim,max33359"; - reg =3D <0x25>; - interrupts-extended =3D <&gpa8 2 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 =3D <&typec_int>; - pinctrl-names =3D "default"; - - connector { - compatible =3D "usb-c-connector"; - label =3D "USB-C"; - data-role =3D "dual"; - power-role =3D "dual"; - self-powered; - try-power-role =3D "sink"; - op-sink-microwatt =3D <2600000>; - slow-charger-loop; - /* - * max77759 operating in reverse boost mode (0xA) can - * source up to 1.5A while extboost can only do ~1A. - * Since extboost is the primary path, advertise 900mA. - */ - source-pdos =3D ; - sink-pdos =3D ; - sink-vdos =3D ; - sink-vdos-v1 =3D ; - /* - * Until bootloader is updated to set those two when - * console is enabled, we disable PD here. - */ - pd-disable; - typec-power-opmode =3D "default"; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - port@0 { - reg =3D <0>; - - usbc0_orien_sw: endpoint { - remote-endpoint =3D <&usbdrd31_phy_orien_switch>; - }; - }; - - port@1 { - reg =3D <1>; - - usbc0_role_sw: endpoint { - remote-endpoint =3D <&usbdrd31_dwc3_role_switch>; - }; - }; - }; - }; - }; -}; - -&pinctrl_far_alive { - key_voldown: key-voldown-pins { - samsung,pins =3D "gpa7-3"; - samsung,pin-function =3D ; - samsung,pin-pud =3D ; - samsung,pin-drv =3D ; - }; - - key_volup: key-volup-pins { - samsung,pins =3D "gpa8-1"; - samsung,pin-function =3D ; - samsung,pin-pud =3D ; - samsung,pin-drv =3D ; - }; - - typec_int: typec-int-pins { - samsung,pins =3D "gpa8-2"; - samsung,pin-function =3D ; - samsung,pin-pud =3D ; - samsung,pin-drv =3D ; - }; -}; - -&pinctrl_gpio_alive { - key_power: key-power-pins { - samsung,pins =3D "gpa10-1"; - samsung,pin-function =3D ; - samsung,pin-pud =3D ; - samsung,pin-drv =3D ; - }; -}; - -&serial_0 { - status =3D "okay"; -}; - -&ufs_0 { - status =3D "okay"; - vcc-supply =3D <&ufs_0_fixed_vcc_reg>; -}; - -&ufs_0_phy { - status =3D "okay"; -}; - -&usbdrd31 { - vdd10-supply =3D <®_placeholder>; - vdd33-supply =3D <®_placeholder>; - status =3D "okay"; -}; - -&usbdrd31_dwc3 { - dr_mode =3D "otg"; - usb-role-switch; - role-switch-default-mode =3D "peripheral"; - maximum-speed =3D "super-speed-plus"; - status =3D "okay"; - - port { - usbdrd31_dwc3_role_switch: endpoint { - remote-endpoint =3D <&usbc0_role_sw>; - }; - }; -}; - -&usbdrd31_phy { - orientation-switch; - /* TODO: Update these once PMIC is implemented */ - pll-supply =3D <®_placeholder>; - dvdd-usb20-supply =3D <®_placeholder>; - vddh-usb20-supply =3D <®_placeholder>; - vdd33-usb20-supply =3D <®_placeholder>; - vdda-usbdp-supply =3D <®_placeholder>; - vddh-usbdp-supply =3D <®_placeholder>; - status =3D "okay"; - - port { - usbdrd31_phy_orien_switch: endpoint { - remote-endpoint =3D <&usbc0_orien_sw>; - }; - }; -}; - -&usi_uart { - samsung,clkreq-on; /* needed for UART mode */ - status =3D "okay"; -}; - -&usi8 { - samsung,mode =3D ; - status =3D "okay"; }; =20 -&usi12 { - samsung,mode =3D ; +&cont_splash_mem { + reg =3D <0x0 0xfac00000 (1080 * 2400 * 4)>; status =3D "okay"; }; =20 -&watchdog_cl0 { - timeout-sec =3D <30>; +&framebuffer0 { + width =3D <1080>; + height =3D <2400>; + stride =3D <(1080 * 4)>; + format =3D "a8r8g8b8"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm6= 4/boot/dts/exynos/google/gs101-pixel-common.dtsi similarity index 96% copy from arch/arm64/boot/dts/exynos/google/gs101-oriole.dts copy to arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi index d3dd411c9bd0..b25230495c64 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts +++ b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Oriole Device Tree + * Device Tree nodes common for all GS101-based Pixel * * Copyright 2021-2023 Google LLC * Copyright 2023 Linaro Ltd - @@ -15,9 +15,6 @@ #include "gs101.dtsi" =20 / { - model =3D "Oriole"; - compatible =3D "google,gs101-oriole", "google,gs101"; - aliases { serial0 =3D &serial_0; }; @@ -31,10 +28,8 @@ chosen { framebuffer0: framebuffer-0 { compatible =3D "simple-framebuffer"; memory-region =3D <&cont_splash_mem>; - width =3D <1080>; - height =3D <2400>; - stride =3D <(1080 * 4)>; - format =3D "a8r8g8b8"; + /* format properties to be added by actual board */ + status =3D "disabled"; }; }; =20 @@ -82,8 +77,10 @@ ufs_0_fixed_vcc_reg: regulator-1 { =20 reserved-memory { cont_splash_mem: splash@fac00000 { - reg =3D <0x0 0xfac00000 (1080 * 2400 * 4)>; + /* size to be updated by actual board */ + reg =3D <0x0 0xfac00000 0x0>; no-map; + status =3D "disabled"; }; }; }; --=20 2.48.0.rc2.279.g1de40edade-goog