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[34.91.20.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab384f87065sm199197966b.133.2025.01.17.09.09.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jan 2025 09:09:57 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Fri, 17 Jan 2025 17:09:54 +0000 Subject: [PATCH v4 1/4] dt-bindings: arm: google: add gs101-raven Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250117-gs101-simplefb-v4-1-a5b90ca2f917@linaro.org> References: <20250117-gs101-simplefb-v4-0-a5b90ca2f917@linaro.org> In-Reply-To: <20250117-gs101-simplefb-v4-0-a5b90ca2f917@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: Will McVicker , kernel-team@android.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.13.0 Raven is Google's code name for Pixel 6 Pro. Since there are differences compared to Pixel 6 (Oriole), we need to add a separate compatible for it. Reviewed-by: Peter Griffin Acked-by: Rob Herring (Arm) Signed-off-by: Andr=C3=A9 Draszik --- Documentation/devicetree/bindings/arm/google.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/google.yaml b/Documentat= ion/devicetree/bindings/arm/google.yaml index e20b5c9b16bc..99961e5282e5 100644 --- a/Documentation/devicetree/bindings/arm/google.yaml +++ b/Documentation/devicetree/bindings/arm/google.yaml @@ -34,10 +34,11 @@ properties: const: '/' compatible: oneOf: - - description: Google Pixel 6 / Oriole + - description: Google Pixel 6 or 6 Pro (Oriole or Raven) items: - enum: - google,gs101-oriole + - google,gs101-raven - const: google,gs101 =20 # Bootloader requires empty ect node to be present --=20 2.48.0.rc2.279.g1de40edade-goog From nobody Wed Dec 17 19:35:59 2025 Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com [209.85.218.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38F0F19F461 for ; Fri, 17 Jan 2025 17:10:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737133801; cv=none; b=Zn7OjDmB7fWy4AKgDerBj4mADneM7dkCLGVSl0GM3fBdcAewzKcbfZkEQKYJMnhxnea/0VVL2K7ndxqglaD9AhiRuceG4Rb7zPZiqKV9sadjshLyhVBCN6K83+0l1pj1AjmdKdqbfknu063UrLX0ROP5LqAT/GCLQJbW2vA6oOs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737133801; c=relaxed/simple; bh=rQoO8RKg4WTsMiIUSVBxqtIekUiWXYwM6p1WeORMqYA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=g0vxzvwwf3Jg/Lmf2+2PvnjdUy1g5cpyVpcAPe2xpOf7EcomXrO3HJ14OYDU5lxBDRjKMG0vz+K4rD+3JaPMLJ7pkxbgPLsHKDRkfRxLp51el0ZGfFzoq7Dpe5mTGgCRpzK/k01FfSzp67Stwn7Ec6gDeSXAzPjgiU6K7VNpdJM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Ky2a9uqi; arc=none smtp.client-ip=209.85.218.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Ky2a9uqi" Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-ab2bb0822a4so449603866b.3 for ; Fri, 17 Jan 2025 09:09:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1737133798; x=1737738598; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=4mvgaOsWInJVnUwy76tgQ13g6HWxVD9Bi2miL5uycY0=; b=Ky2a9uqie95Lxjvf4lZPIKCb7edIylkZ4z+Y/l5FYi2rc2vU3nIZXo6aIZOGBQztSo /leLaAZ79/FYMjd1+o7ETZhsJe1SLbT++CTirVT9uB8Rky4LAsSfFo60umLj4OtWbrrm Rhnonmtn/fYca0EcMpWVqdMOfSBLZWn5bweaxosfROB+97LO4DyY3JKUgb3RmGqsPSLo c7e8Wg/vYvcMx1malEtRc/f1/XYE6CosYRv5dou2WpJJmzEm6xd4PdCIMtPUhppBMfNE 1m/n08J1NSmnBLlt7k4ez7n5oxzMqHoz4aSWjhA7rB1FLWpc41qwLt+srilGA8ClDBQr LnFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737133798; x=1737738598; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4mvgaOsWInJVnUwy76tgQ13g6HWxVD9Bi2miL5uycY0=; b=UNSZlCdc3qPRHSJirnyYRW5DgRzNZ0WlbLLSqoHvKGpc4JUdV/D8CFNfggBYmAbTDy qndNzir7PpeCbdhJnj2kWmr/6eZbTd4TnRQ6eN0hMDes+43rZP3W8qWAhQGF5vgT30Qj sXvWkzO08xfZsGntx/TFFZZHDe4ucnEVzL/I4NME+l+dBkByiu5FB0SOZXldXshK4gEM YyfecjDnLlSGHPzylrMoW3Ca+tVcios56yQKdNAdxSv0VNOYzzHFkMwRXOxvtJFK2kzJ PYpZ0brd0H2d1qvBCya5Mcgm7UFlcZRLeyrQSlg/V3Lj8Wbi+V96zte5arcQ1w+DtHz2 k+9A== X-Forwarded-Encrypted: i=1; AJvYcCW7foIBUk6EYsWt2bLHZxREny9D0bPKu83ljrGSJ7344B3xuq1Ui33Bz8YB3ACBQlp29D8fIMDEetFMVgc=@vger.kernel.org X-Gm-Message-State: AOJu0YxLMJ+GgsKJgopqc0qk2Mvg54DJfBWrI4sN5zf3ZgSc4mlgtEon ywE8SLNkr0aFdY1TEux7lM/HV601Txbx5F0c+1mHNWRyqUFztuqQvmYrHuu/6kieGcSNCCcB//K Yhbs= X-Gm-Gg: ASbGnctr3/HfbvRd2tG+RNU+yRV+uGF+sSYXcbeUhl2xr6CV8s2k9rDo9YZ4gYWfz9W TnU2KtZunMN0/uZRdCStOw/SJGNfwSJQpFZYQG40Q4fhJ3fSa7h025bUfDxvwPOtKLRJTumeAf9 wtSS6bJtNUgCptag2SODTQesirYKMrx4bv55LBj1e+tiTcj/QQQD8dv8SwT3FHve13IYHOBkR1d p4O0yJhNRLv/OzzEp71UxSmPD4eu9QJvzQ+WoxHcMVWJ8MLjv6N6BBxuhiVYQ8mjNd4hLjFWhs6 Km9xigq3m56jdJvHPBPVYhjae7nWG8JWUiaT5+q1 X-Google-Smtp-Source: AGHT+IHFyQYdgqGM488OpiNHw7vcW4pRUxUqyprfrU9ASQpRrjBWSc8OuKo4zMQb49X3a2Y83Biqaw== X-Received: by 2002:a17:907:7296:b0:ab3:4c32:aa6c with SMTP id a640c23a62f3a-ab38b10cfa4mr328196666b.20.1737133798469; Fri, 17 Jan 2025 09:09:58 -0800 (PST) Received: from puffmais.c.googlers.com (140.20.91.34.bc.googleusercontent.com. [34.91.20.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab384f87065sm199197966b.133.2025.01.17.09.09.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jan 2025 09:09:58 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Fri, 17 Jan 2025 17:09:55 +0000 Subject: [PATCH v4 2/4] arm64: dts: exynos: gs101-oriole: configure simple-framebuffer Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250117-gs101-simplefb-v4-2-a5b90ca2f917@linaro.org> References: <20250117-gs101-simplefb-v4-0-a5b90ca2f917@linaro.org> In-Reply-To: <20250117-gs101-simplefb-v4-0-a5b90ca2f917@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: Will McVicker , kernel-team@android.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.13.0 The bootloader configures the display hardware for a framebuffer at the given address, let's add a simple-framebuffer node here until we get a proper DRM driver. This has several benefits since it's an OLED display: * energy consumption goes down significantly, as it changes from white (as left by bootloader) to black (linux console), and we generally don't run out of battery anymore when plugged into a USB port * less of a burn-in effect I assume * phone stays cooler due to reduced energy consumption by display Signed-off-by: Andr=C3=A9 Draszik Reviewed-by: Peter Griffin --- v3: - replace property 'reg' with 'memory-region' and related properties to reduce churn in preparation for Pixel 6Pro support - drop tags due to that --- arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm6= 4/boot/dts/exynos/google/gs101-oriole.dts index e58881c61d53..d3dd411c9bd0 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts @@ -26,6 +26,16 @@ chosen { /* Bootloader expects bootargs specified otherwise it crashes */ bootargs =3D ""; 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[34.91.20.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab384f87065sm199197966b.133.2025.01.17.09.09.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jan 2025 09:09:58 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Fri, 17 Jan 2025 17:09:56 +0000 Subject: [PATCH v4 3/4] arm64: dts: exynos: gs101-oriole: move common Pixel6 & 6Pro parts into a .dtsi Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250117-gs101-simplefb-v4-3-a5b90ca2f917@linaro.org> References: <20250117-gs101-simplefb-v4-0-a5b90ca2f917@linaro.org> In-Reply-To: <20250117-gs101-simplefb-v4-0-a5b90ca2f917@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: Will McVicker , kernel-team@android.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.13.0 In order to support Pixel 6 (Oriole), Pixel 6 Pro (Raven), Pixel 6a (Bluejay), and all other versions correctly, we have to be able to distinguish them properly as we add support for more features. For example, Raven has a larger display. There are other differences, like battery design capacity, etc. Move all the parts that are common for now into a gs101-pixel-common.dtsi, and just leave the display related things in gs101-oriole.dts. Signed-off-by: Andr=C3=A9 Draszik Reviewed-by: Peter Griffin --- Note: MAINTAINERS doesn't need updating, it covers this whole directory v3: - separate DTBs for Pixel 6 and Pixel 6 Pro like in v1 (Krzysztof) - override/extend nodes ordered by label name (Krzysztof) - name common include gs101-pixel-common.dtsi instead of gs101-raviole.dtsi v2: - use a generic gs101-based Pixel base board DTB with different additions to it that make up the different versions 6, 6Pro, 6a, etc.) using overlays, rather than one DTB per version to avoid needless increase of binary sizes and reflect reality - switch to memory-region instead of reg for framebuffer memory --- arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 284 +----------------= ---- .../{gs101-oriole.dts =3D> gs101-pixel-common.dtsi} | 15 +- 2 files changed, 14 insertions(+), 285 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm6= 4/boot/dts/exynos/google/gs101-oriole.dts index d3dd411c9bd0..8df42bedbc03 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts @@ -8,290 +8,22 @@ =20 /dts-v1/; =20 -#include -#include -#include -#include "gs101-pinctrl.h" -#include "gs101.dtsi" +#include "gs101-pixel-common.dtsi" =20 / { model =3D "Oriole"; compatible =3D "google,gs101-oriole", "google,gs101"; - - aliases { - serial0 =3D &serial_0; - }; - - chosen { - /* Bootloader expects bootargs specified otherwise it crashes */ - bootargs =3D ""; - stdout-path =3D &serial_0; - - /* Use display framebuffer as setup by bootloader */ - framebuffer0: framebuffer-0 { - compatible =3D "simple-framebuffer"; - memory-region =3D <&cont_splash_mem>; - width =3D <1080>; - height =3D <2400>; - stride =3D <(1080 * 4)>; - format =3D "a8r8g8b8"; - }; - }; - - gpio-keys { - compatible =3D "gpio-keys"; - pinctrl-0 =3D <&key_voldown>, <&key_volup>, <&key_power>; - pinctrl-names =3D "default"; - - button-vol-down { - label =3D "KEY_VOLUMEDOWN"; - linux,code =3D ; - gpios =3D <&gpa7 3 GPIO_ACTIVE_LOW>; - wakeup-source; - }; - - button-vol-up { - label =3D "KEY_VOLUMEUP"; - linux,code =3D ; - gpios =3D <&gpa8 1 GPIO_ACTIVE_LOW>; - wakeup-source; - }; - - button-power { - label =3D "KEY_POWER"; - linux,code =3D ; - gpios =3D <&gpa10 1 GPIO_ACTIVE_LOW>; - wakeup-source; - }; - }; - - /* TODO: Remove this once PMIC is implemented */ - reg_placeholder: regulator-0 { - compatible =3D "regulator-fixed"; - regulator-name =3D "placeholder_reg"; - }; - - /* TODO: Remove this once S2MPG11 slave PMIC is implemented */ - ufs_0_fixed_vcc_reg: regulator-1 { - compatible =3D "regulator-fixed"; - regulator-name =3D "ufs-vcc"; - gpio =3D <&gpp0 1 GPIO_ACTIVE_HIGH>; - regulator-boot-on; - enable-active-high; - }; - - reserved-memory { - cont_splash_mem: splash@fac00000 { - reg =3D <0x0 0xfac00000 (1080 * 2400 * 4)>; - no-map; - }; - }; -}; - -&ext_24_5m { - clock-frequency =3D <24576000>; -}; - -&ext_200m { - clock-frequency =3D <200000000>; -}; - -&hsi2c_8 { - status =3D "okay"; - - eeprom: eeprom@50 { - compatible =3D "atmel,24c08"; - reg =3D <0x50>; - }; -}; - -&hsi2c_12 { - status =3D "okay"; - /* TODO: add the devices once drivers exist */ - - usb-typec@25 { - compatible =3D "maxim,max77759-tcpci", "maxim,max33359"; - reg =3D <0x25>; - interrupts-extended =3D <&gpa8 2 IRQ_TYPE_LEVEL_LOW>; - pinctrl-0 =3D <&typec_int>; - pinctrl-names =3D "default"; - - connector { - compatible =3D "usb-c-connector"; - label =3D "USB-C"; - data-role =3D "dual"; - power-role =3D "dual"; - self-powered; - try-power-role =3D "sink"; - op-sink-microwatt =3D <2600000>; - slow-charger-loop; - /* - * max77759 operating in reverse boost mode (0xA) can - * source up to 1.5A while extboost can only do ~1A. - * Since extboost is the primary path, advertise 900mA. - */ - source-pdos =3D ; - sink-pdos =3D ; - sink-vdos =3D ; - sink-vdos-v1 =3D ; - /* - * Until bootloader is updated to set those two when - * console is enabled, we disable PD here. - */ - pd-disable; - typec-power-opmode =3D "default"; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - port@0 { - reg =3D <0>; - - usbc0_orien_sw: endpoint { - remote-endpoint =3D <&usbdrd31_phy_orien_switch>; - }; - }; - - port@1 { - reg =3D <1>; - - usbc0_role_sw: endpoint { - remote-endpoint =3D <&usbdrd31_dwc3_role_switch>; - }; - }; - }; - }; - }; -}; - -&pinctrl_far_alive { - key_voldown: key-voldown-pins { - samsung,pins =3D "gpa7-3"; - samsung,pin-function =3D ; - samsung,pin-pud =3D ; - samsung,pin-drv =3D ; - }; - - key_volup: key-volup-pins { - samsung,pins =3D "gpa8-1"; - samsung,pin-function =3D ; - samsung,pin-pud =3D ; - samsung,pin-drv =3D ; - }; - - typec_int: typec-int-pins { - samsung,pins =3D "gpa8-2"; - samsung,pin-function =3D ; - samsung,pin-pud =3D ; - samsung,pin-drv =3D ; - }; -}; - -&pinctrl_gpio_alive { - key_power: key-power-pins { - samsung,pins =3D "gpa10-1"; - samsung,pin-function =3D ; - samsung,pin-pud =3D ; - samsung,pin-drv =3D ; - }; -}; - -&serial_0 { - status =3D "okay"; -}; - -&ufs_0 { - status =3D "okay"; - vcc-supply =3D <&ufs_0_fixed_vcc_reg>; -}; - -&ufs_0_phy { - status =3D "okay"; -}; - -&usbdrd31 { - vdd10-supply =3D <®_placeholder>; - vdd33-supply =3D <®_placeholder>; - status =3D "okay"; -}; - -&usbdrd31_dwc3 { - dr_mode =3D "otg"; - usb-role-switch; - role-switch-default-mode =3D "peripheral"; - maximum-speed =3D "super-speed-plus"; - status =3D "okay"; - - port { - usbdrd31_dwc3_role_switch: endpoint { - remote-endpoint =3D <&usbc0_role_sw>; - }; - }; -}; - -&usbdrd31_phy { - orientation-switch; - /* TODO: Update these once PMIC is implemented */ - pll-supply =3D <®_placeholder>; - dvdd-usb20-supply =3D <®_placeholder>; - vddh-usb20-supply =3D <®_placeholder>; - vdd33-usb20-supply =3D <®_placeholder>; - vdda-usbdp-supply =3D <®_placeholder>; - vddh-usbdp-supply =3D <®_placeholder>; - status =3D "okay"; - - port { - usbdrd31_phy_orien_switch: endpoint { - remote-endpoint =3D <&usbc0_orien_sw>; - }; - }; -}; - -&usi_uart { - samsung,clkreq-on; /* needed for UART mode */ - status =3D "okay"; -}; - -&usi8 { - samsung,mode =3D ; - status =3D "okay"; }; =20 -&usi12 { - samsung,mode =3D ; +&cont_splash_mem { + reg =3D <0x0 0xfac00000 (1080 * 2400 * 4)>; status =3D "okay"; }; =20 -&watchdog_cl0 { - timeout-sec =3D <30>; +&framebuffer0 { + width =3D <1080>; + height =3D <2400>; + stride =3D <(1080 * 4)>; + format =3D "a8r8g8b8"; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm6= 4/boot/dts/exynos/google/gs101-pixel-common.dtsi similarity index 96% copy from arch/arm64/boot/dts/exynos/google/gs101-oriole.dts copy to arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi index d3dd411c9bd0..b25230495c64 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts +++ b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Oriole Device Tree + * Device Tree nodes common for all GS101-based Pixel * * Copyright 2021-2023 Google LLC * Copyright 2023 Linaro Ltd - @@ -15,9 +15,6 @@ #include "gs101.dtsi" =20 / { - model =3D "Oriole"; - compatible =3D "google,gs101-oriole", "google,gs101"; - aliases { serial0 =3D &serial_0; }; @@ -31,10 +28,8 @@ chosen { framebuffer0: framebuffer-0 { compatible =3D "simple-framebuffer"; memory-region =3D <&cont_splash_mem>; - width =3D <1080>; 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[34.91.20.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab384f87065sm199197966b.133.2025.01.17.09.10.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jan 2025 09:10:06 -0800 (PST) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Fri, 17 Jan 2025 17:09:57 +0000 Subject: [PATCH v4 4/4] arm64: dts: exynos: gs101-raven: add new board file Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250117-gs101-simplefb-v4-4-a5b90ca2f917@linaro.org> References: <20250117-gs101-simplefb-v4-0-a5b90ca2f917@linaro.org> In-Reply-To: <20250117-gs101-simplefb-v4-0-a5b90ca2f917@linaro.org> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , Tudor Ambarus , Alim Akhtar Cc: Will McVicker , kernel-team@android.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.13.0 Raven is Google's code name for Pixel 6 Pro. Similar to Pixel 6 (Oriole), this is also based around its Tensor gs101 SoC. For now, the relevant difference here is the display resolution: 1440 x 3120 instead of 1080 x 2400. Create a new board file to reflect this difference. Signed-off-by: Andr=C3=A9 Draszik Reviewed-by: Peter Griffin --- Note: MAINTAINERS doesn't need updating, it covers this whole directory --- arch/arm64/boot/dts/exynos/google/Makefile | 1 + arch/arm64/boot/dts/exynos/google/gs101-raven.dts | 29 +++++++++++++++++++= ++++ 2 files changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/Makefile b/arch/arm64/boot/d= ts/exynos/google/Makefile index 0a6d5e1fe4ee..7385f82b03c9 100644 --- a/arch/arm64/boot/dts/exynos/google/Makefile +++ b/arch/arm64/boot/dts/exynos/google/Makefile @@ -2,3 +2,4 @@ =20 dtb-$(CONFIG_ARCH_EXYNOS) +=3D \ gs101-oriole.dtb \ + gs101-raven.dtb diff --git a/arch/arm64/boot/dts/exynos/google/gs101-raven.dts b/arch/arm64= /boot/dts/exynos/google/gs101-raven.dts new file mode 100644 index 000000000000..1e7e6b34b864 --- /dev/null +++ b/arch/arm64/boot/dts/exynos/google/gs101-raven.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Raven Device Tree + * + * Copyright 2021-2023 Google LLC + * Copyright 2023-2025 Linaro Ltd + */ + +/dts-v1/; + +#include "gs101-pixel-common.dtsi" + +/ { + model =3D "Raven"; + compatible =3D "google,gs101-raven", "google,gs101"; +}; + +&cont_splash_mem { + reg =3D <0x0 0xfac00000 (1440 * 3120 * 4)>; + status =3D "okay"; +}; + +&framebuffer0 { + width =3D <1440>; + height =3D <3120>; + stride =3D <(1440 * 4)>; + format =3D "a8r8g8b8"; + status =3D "okay"; +}; --=20 2.48.0.rc2.279.g1de40edade-goog