From nobody Sun Feb 8 11:45:22 2026 Received: from out-186.mta1.migadu.com (out-186.mta1.migadu.com [95.215.58.186]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D690241696 for ; Thu, 16 Jan 2025 22:42:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.186 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737067326; cv=none; b=ORWvHkrrbm4dMonxmSvfI/ZTs/ZdjsfTzmMiIotxXQuvtIQfNUq7LvTeUUbttkYIaUiufzTSVWIUA0rkKNb0kzHq/2qJ1fGHcZYIbbQxMTRgBagV63SkjOgKOCUElheSgUPAq2JK3y5gkpZh7aL2ohgWOgYWlLsPhJysl2R4Ocw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737067326; c=relaxed/simple; bh=GParvZMxicrgKugmo7RTNnKjduftg+maWHqcb4yjK8o=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=TgEXMeRQKRSZo2sFkEASRYIv6E5XxGlpX7nlUHLbFwp+mEBXD7hpKBCIiubmybn2HI5hlv42UPVf+gCTm+X2iolveUksqqVszNN0ZpQ/mHRs9XtHZLCMnkZ9f/tc9IXBISAydwGEazhSX7OuyMflQSLBD/04Kum2SJbHVu0/Mc8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=E3m2SaJh; arc=none smtp.client-ip=95.215.58.186 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="E3m2SaJh" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1737067322; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=AkN93+yrdYBKl9xNfe45DamaUFWg9UXT6+TMNaEpy3s=; b=E3m2SaJhGMjqIJ6YCBPI+okrl46/kRMWEsArLRQR/WPgQsimn5anLiRebH/PpuBv4jcj1F MJmswt+Iwkhf3ml4X6QzCmhCPkN4vPnTTQkbK44lhpM5vnO1okBfoTQmw1As2Im3nHzZEd N+Xs/b87Xy99V89smS/j2jewSBSi6eM= From: Sean Anderson To: Mark Brown , Michal Simek , linux-spi@vger.kernel.org Cc: Miquel Raynal , Amit Kumar Mahapatra , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jinjie Ruan , Sean Anderson Subject: [PATCH 3/5] spi: zynqmp-gqspi: Add helpers for enabling/disabling DMA Date: Thu, 16 Jan 2025 17:41:28 -0500 Message-Id: <20250116224130.2684544-4-sean.anderson@linux.dev> In-Reply-To: <20250116224130.2684544-1-sean.anderson@linux.dev> References: <20250116224130.2684544-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" DMA is enabled and disabled several times in the driver. Add some helper functions for this task. Signed-off-by: Sean Anderson --- drivers/spi/spi-zynqmp-gqspi.c | 61 +++++++++++++++++++--------------- 1 file changed, 34 insertions(+), 27 deletions(-) diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c index 79dd1d56d05c..d18fa1282dde 100644 --- a/drivers/spi/spi-zynqmp-gqspi.c +++ b/drivers/spi/spi-zynqmp-gqspi.c @@ -739,6 +739,33 @@ static void zynqmp_qspi_fillgenfifo(struct zynqmp_qspi= *xqspi, u8 nbits, } } =20 +/** + * zynqmp_qspi_disable_dma() - Disable DMA mode + * @xqspi: GQSPI instance + */ +static void zynqmp_qspi_disable_dma(struct zynqmp_qspi *xqspi) +{ + u32 config_reg =3D zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); + + config_reg &=3D ~GQSPI_CFG_MODE_EN_MASK; + zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg); + xqspi->mode =3D GQSPI_MODE_IO; +} + +/** + * zynqmp_qspi_enable_dma() - Enable DMA mode + * @xqspi: GQSPI instance + */ +static void zynqmp_qspi_enable_dma(struct zynqmp_qspi *xqspi) +{ + u32 config_reg =3D zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); + + config_reg &=3D ~GQSPI_CFG_MODE_EN_MASK; + config_reg |=3D GQSPI_CFG_MODE_EN_DMA_MASK; + zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg); + xqspi->mode =3D GQSPI_MODE_DMA; +} + /** * zynqmp_process_dma_irq - Handler for DMA done interrupt of QSPI * controller @@ -748,7 +775,7 @@ static void zynqmp_qspi_fillgenfifo(struct zynqmp_qspi = *xqspi, u8 nbits, */ static void zynqmp_process_dma_irq(struct zynqmp_qspi *xqspi) { - u32 config_reg, genfifoentry; + u32 genfifoentry; =20 dma_unmap_single(xqspi->dev, xqspi->dma_addr, xqspi->dma_rx_bytes, DMA_FROM_DEVICE); @@ -762,9 +789,7 @@ static void zynqmp_process_dma_irq(struct zynqmp_qspi *= xqspi) =20 if (xqspi->bytes_to_receive > 0) { /* Switch to IO mode,for remaining bytes to receive */ - config_reg =3D zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); - config_reg &=3D ~GQSPI_CFG_MODE_EN_MASK; - zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg); + zynqmp_qspi_disable_dma(xqspi); =20 /* Initiate the transfer of remaining bytes */ genfifoentry =3D xqspi->genfifoentry; @@ -849,17 +874,14 @@ static irqreturn_t zynqmp_qspi_irq(int irq, void *dev= _id) */ static int zynqmp_qspi_setuprxdma(struct zynqmp_qspi *xqspi) { - u32 rx_bytes, rx_rem, config_reg; + u32 rx_bytes, rx_rem; dma_addr_t addr; u64 dma_align =3D (u64)(uintptr_t)xqspi->rxbuf; =20 if (xqspi->bytes_to_receive < 8 || ((dma_align & GQSPI_DMA_UNALIGN) !=3D 0x0)) { /* Setting to IO mode */ - config_reg =3D zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); - config_reg &=3D ~GQSPI_CFG_MODE_EN_MASK; - zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg); - xqspi->mode =3D GQSPI_MODE_IO; + zynqmp_qspi_disable_dma(xqspi); xqspi->dma_rx_bytes =3D 0; return 0; } @@ -882,14 +904,7 @@ static int zynqmp_qspi_setuprxdma(struct zynqmp_qspi *= xqspi) zynqmp_gqspi_write(xqspi, GQSPI_QSPIDMA_DST_ADDR_MSB_OFST, ((u32)addr) & 0xfff); =20 - /* Enabling the DMA mode */ - config_reg =3D zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); - config_reg &=3D ~GQSPI_CFG_MODE_EN_MASK; - config_reg |=3D GQSPI_CFG_MODE_EN_DMA_MASK; - zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, config_reg); - - /* Switch to DMA mode */ - xqspi->mode =3D GQSPI_MODE_DMA; + zynqmp_qspi_enable_dma(xqspi); =20 /* Write the number of bytes to transfer */ zynqmp_gqspi_write(xqspi, GQSPI_QSPIDMA_DST_SIZE_OFST, rx_bytes); @@ -909,18 +924,10 @@ static int zynqmp_qspi_setuprxdma(struct zynqmp_qspi = *xqspi) static void zynqmp_qspi_write_op(struct zynqmp_qspi *xqspi, u8 tx_nbits, u32 genfifoentry) { - u32 config_reg; - zynqmp_qspi_fillgenfifo(xqspi, tx_nbits, genfifoentry); zynqmp_qspi_filltxfifo(xqspi, GQSPI_TXD_DEPTH); - if (xqspi->mode =3D=3D GQSPI_MODE_DMA) { - config_reg =3D zynqmp_gqspi_read(xqspi, - GQSPI_CONFIG_OFST); - config_reg &=3D ~GQSPI_CFG_MODE_EN_MASK; - zynqmp_gqspi_write(xqspi, GQSPI_CONFIG_OFST, - config_reg); - xqspi->mode =3D GQSPI_MODE_IO; - } + if (xqspi->mode =3D=3D GQSPI_MODE_DMA) + zynqmp_qspi_disable_dma(xqspi); } =20 /** --=20 2.35.1.1320.gc452695387.dirty