From nobody Wed Feb 5 14:14:12 2025 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 06E4F24A7C6 for ; Thu, 16 Jan 2025 03:52:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736999556; cv=none; b=bJicObJ2sBNpaQbjWA8kdX3/Wx1/3yB85SD3Wnj8mMVu6ERL2ngLGTVp/B5D+bUcCwOAdOqPnHB2Bmo0JujMSt/LVz4cAEj1RRUQaBNugomVykq/GueztBLdQJJLvon/defAkyf2lO+zfr4+gEFckW1+o5+27QS6LJGWIYUgG/g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736999556; c=relaxed/simple; bh=5FROOi57hFH0/NPJsEln0YgJ3Y3TIc963i6nA6m7TAI=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=p15rR5WWBopERX3oxEER3N4jYvURYGEcX2rXmzD2MHwWRqIDhep0adrd7VAVf05ITaKwiP9TCVp6d7jgGFp7LOpaDD4u2dIone/wirUFJvncWpxbC6hWfVAW4NeKL2eyWGDKUg6KjMzai5nGnYMueS0tUPbnZh2BJtP46gF/LPE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=ghfFe12V; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="ghfFe12V" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 50G3qBDE3873040 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 15 Jan 2025 21:52:11 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1736999531; bh=MjvGgCGSCeQvRGRuwkiPIiN1y+2mykr23IUZce21P28=; h=From:To:CC:Subject:Date; b=ghfFe12VKIRJrfl8NquWjVn4W44r3WInv1osxv2TN7DdD6HLSQAW9IRKoFCWkwkAz cys/d9YYRbs1XMuTJml2vQjQ/CSX9qsf9D4ID4HW1eoTJC/Nty4Kx9JVBURRWu3Z09 v67jCN1nUwaQ1pTwBdCWGw1iPBsxeefiLJXMesKA= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 50G3qBif008210 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 15 Jan 2025 21:52:11 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 15 Jan 2025 21:52:10 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 15 Jan 2025 21:52:10 -0600 Received: from santhoshkumark.dhcp.ti.com (santhoshkumark.dhcp.ti.com [172.24.227.241]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 50G3q7mq094079; Wed, 15 Jan 2025 21:52:08 -0600 From: Santhosh Kumar K To: , CC: , , , , , Subject: [PATCH v2] arm64: defconfig: Enable SPI NAND flashes Date: Thu, 16 Jan 2025 09:21:45 +0530 Message-ID: <20250116035145.370734-1-s-k6@ti.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Add support for SPI NAND flashes on ARM64 boards/EVMs such as: 1. W35N01JW on AM62x LP SK, AM62A7 SK, J721S2 EVM, J784S4 EVM, J722S EVM, J742S2 EVM 2. W25N01JW on AM62Lx EVM by enabling the MTD_SPI_NAND config as a module. Signed-off-by: Santhosh Kumar K --- Changes in v2: - Fix commit message - Rebase on next - Link to v1: https://lore.kernel.org/linux-arm-kernel/20250102120043.1404= 843-1-s-k6@ti.com/ =20 Repo: https://github.com/santhosh21/linux/tree/uL_next Test results: https://gist.github.com/santhosh21/71ab6646dccc238a0b3c47c038= 2f219a --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e729948b7d69..35f312a39e38 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -283,6 +283,7 @@ CONFIG_MTD_NAND_BRCMNAND=3Dm CONFIG_MTD_NAND_FSL_IFC=3Dy CONFIG_MTD_NAND_QCOM=3Dy CONFIG_MTD_SPI_NOR=3Dy +CONFIG_MTD_SPI_NAND=3Dm CONFIG_MTD_UBI=3Dm CONFIG_MTD_HYPERBUS=3Dm CONFIG_HBMC_AM654=3Dm --=20 2.34.1