From nobody Sun Dec 14 06:21:57 2025 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC3EF14B094 for ; Thu, 16 Jan 2025 17:43:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737049403; cv=none; b=GLpSiU9pBTMtOTtrdsiNom4NxzhgIWOt7wl5SdQQtlldCvrRam/nc8EPsg0105vpxjpmj5OvPzd0R25+/X3d1mGJb0JNqAjfzboS/zlyuOwuXj6MGWenHThdVIodL7H+tIetuc12lgeGfPGzZN6jtaNnnzqk9Dxd8O+AscYrDsw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737049403; c=relaxed/simple; bh=6KoalZ0ghIt/CsoIyMX4CFT3D6yl8EI9lw0o7rdluiY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JXFCXghGGoO/7BizFWgXwboa4n3zcygrudKISV8/sW2SX2SYxV6xwGk/P/5er1SKO53WhSSLNKKt59yNK3sR/hK25Vaa0Qa0eBUbkSUXO2LoVji6tOlKN8HLIJeLM2+NkMRp7Y8/Kbh7SE5AOllXWB1jbfcyJvAgbIbJ48jy/Vo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=YZ8oURHv; arc=none smtp.client-ip=209.85.128.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="YZ8oURHv" Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-4364a37a1d7so11483845e9.3 for ; Thu, 16 Jan 2025 09:43:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1737049400; x=1737654200; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=sFUmY5bxO6t8UNGqtBvm5S37BxnI3MNuaB1bun9ydgk=; b=YZ8oURHvJ0IqQuXfk5VZi5uJFqJC+Zn+ATXbI6rzy2Z6gfk9RGRTRueBgnWWLhXkNZ rhKiNAx3rr/7EgoQ78uODaWzcSR3rzCHT4Ex9RVy0ajBDKGkRGZUzljm2waWFbNjD3tb etYsoHkaBAUendQOw9bKayFK4maZqXXmMV8oIyD87AS/3GJQyizwb2pKK79vRWFD0Yex jIsrV4XKfbeFrno+QcG+7nS6vu6KpgPzHky/KvAKOETHQAiXHpxwGpmO2RylMFVQx4ou hYEypRzh8plIgsFB+SvuNMoTvpzbpYnCknym//G6xGzDPzlEarEsB4qOVP4HmQhs1mCh 8b1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737049400; x=1737654200; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sFUmY5bxO6t8UNGqtBvm5S37BxnI3MNuaB1bun9ydgk=; b=rFmkXdf1MIRpO8WlgCA9sN+dERcdOgQa5l/mEuVgE5RKPaKwS20qJSap3kGUCgXKqo 5nBsz0v2H9a0tzwRpDYyDWbCAC915F+SvBq2Krb4V36qwrrrD4mXL3O5qVYFyzZ/FGPn 6/+Py6KvBBj6WoD1kxOX3C7NvxACdplH5Lsh02cJSKe6ngn/G1Fd2HGPHfviRt7D4IjS AnPWEn/w6bf9Uubx/TCPb4LZYFbABEWZmcIMBda/WNQx+hVakPGSROW5blQ1Azt8sOpl 4F74DDHeaYRIbRKcBz0T+dWz4qj31dppVdYQhwmnqL8ax38hXZaIchpAkrdK7TWTWaME bNTg== X-Forwarded-Encrypted: i=1; AJvYcCWaEo55o50pVkCItsDL8/mzbQJyg4DpcdHJTIPpocwM0FGjr/aczDyKARIzUSz6NzNfrNLUexbajAl0v+M=@vger.kernel.org X-Gm-Message-State: AOJu0Ywtct4P1GPv3CKohN1QaW2nuLJk6x8qorkvG++PG7IqEsN29bg0 73gE1UA/vZ61jlZCDwxGrbV5xqcbpYE6O/J0Gr5NV1qaW6v5J4Dc8XkjiU/6A1aQNrPT+PKrDvb 0 X-Gm-Gg: ASbGncvnxRWQrShRgIz22dCbT9NswofqzbKrwNKG6eF6KiOYtxYuGDyaypQiyrKka/9 +0wmvfu0K4kZPkj4JWVTfXVFRe6oPLn+5e9BthPdQpDnijvEEAYmijogJym+nXUdhGOahhiqzrg iJDkjs1JWtcNgPqwzscNGQ7eiH2hb9mPoGpP+BERv99PcSxaW8VA7s6AReH8gYDT+zV9TZ4UpaY gvQXAYD0nn0cXPKlTARrxjF2YsuHrEhAD/lCAKr8/ARwk8P X-Google-Smtp-Source: AGHT+IFC+OXvCmVsIdw8ejrPDR+0n3pDOimziwX8sqXmNsprU+6Q0BH+anPzv5EQJWOZscqpxZePGw== X-Received: by 2002:a05:600c:3149:b0:434:f297:8e78 with SMTP id 5b1f17b1804b1-436e267fbe1mr324889155e9.7.1737049400135; Thu, 16 Jan 2025 09:43:20 -0800 (PST) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-43890413053sm6302515e9.10.2025.01.16.09.43.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jan 2025 09:43:19 -0800 (PST) From: Dave Stevenson Date: Thu, 16 Jan 2025 17:43:09 +0000 Subject: [PATCH v2 1/3] media: i2c: imx415: Add read/write control of VBLANK Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250116-media-imx415-v2-1-735263f04652@raspberrypi.com> References: <20250116-media-imx415-v2-0-735263f04652@raspberrypi.com> In-Reply-To: <20250116-media-imx415-v2-0-735263f04652@raspberrypi.com> To: Sakari Ailus , Michael Riesch , Mauro Carvalho Chehab Cc: Gerald Loacker , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, Dave Stevenson X-Mailer: b4 0.14.1 This also requires that the ranges for the exposure control are updated. Signed-off-by: Dave Stevenson Reviewed-by: Michael Riesch --- drivers/media/i2c/imx415.c | 52 ++++++++++++++++++++++++++++++------------= ---- 1 file changed, 34 insertions(+), 18 deletions(-) diff --git a/drivers/media/i2c/imx415.c b/drivers/media/i2c/imx415.c index 3f7924aa1bd3..fa7ffb9220e5 100644 --- a/drivers/media/i2c/imx415.c +++ b/drivers/media/i2c/imx415.c @@ -26,6 +26,7 @@ #define IMX415_PIXEL_ARRAY_WIDTH 3864 #define IMX415_PIXEL_ARRAY_HEIGHT 2192 #define IMX415_PIXEL_ARRAY_VBLANK 58 +#define IMX415_EXPOSURE_OFFSET 8 =20 #define IMX415_NUM_CLK_PARAM_REGS 11 =20 @@ -51,6 +52,7 @@ #define IMX415_OUTSEL CCI_REG8(0x30c0) #define IMX415_DRV CCI_REG8(0x30c1) #define IMX415_VMAX CCI_REG24_LE(0x3024) +#define IMX415_VMAX_MAX 0xfffff #define IMX415_HMAX CCI_REG16_LE(0x3028) #define IMX415_SHR0 CCI_REG24_LE(0x3050) #define IMX415_GAIN_PCG_0 CCI_REG16_LE(0x3090) @@ -447,7 +449,6 @@ static const struct imx415_clk_params imx415_clk_params= [] =3D { =20 /* all-pixel 2-lane 720 Mbps 15.74 Hz mode */ static const struct cci_reg_sequence imx415_mode_2_720[] =3D { - { IMX415_VMAX, 0x08CA }, { IMX415_HMAX, 0x07F0 }, { IMX415_LANEMODE, IMX415_LANEMODE_2 }, { IMX415_TCLKPOST, 0x006F }, @@ -463,7 +464,6 @@ static const struct cci_reg_sequence imx415_mode_2_720[= ] =3D { =20 /* all-pixel 2-lane 1440 Mbps 30.01 Hz mode */ static const struct cci_reg_sequence imx415_mode_2_1440[] =3D { - { IMX415_VMAX, 0x08CA }, { IMX415_HMAX, 0x042A }, { IMX415_LANEMODE, IMX415_LANEMODE_2 }, { IMX415_TCLKPOST, 0x009F }, @@ -479,7 +479,6 @@ static const struct cci_reg_sequence imx415_mode_2_1440= [] =3D { =20 /* all-pixel 4-lane 891 Mbps 30 Hz mode */ static const struct cci_reg_sequence imx415_mode_4_891[] =3D { - { IMX415_VMAX, 0x08CA }, { IMX415_HMAX, 0x044C }, { IMX415_LANEMODE, IMX415_LANEMODE_4 }, { IMX415_TCLKPOST, 0x007F }, @@ -600,6 +599,7 @@ struct imx415 { struct v4l2_ctrl *vblank; struct v4l2_ctrl *hflip; struct v4l2_ctrl *vflip; + struct v4l2_ctrl *exposure; =20 unsigned int cur_mode; unsigned int num_data_lanes; @@ -730,17 +730,38 @@ static int imx415_s_ctrl(struct v4l2_ctrl *ctrl) ctrls); const struct v4l2_mbus_framefmt *format; struct v4l2_subdev_state *state; + u32 exposure_max; unsigned int vmax; unsigned int flip; int ret; =20 - if (!pm_runtime_get_if_in_use(sensor->dev)) - return 0; - state =3D v4l2_subdev_get_locked_active_state(&sensor->subdev); format =3D v4l2_subdev_state_get_format(state, 0); =20 + if (ctrl->id =3D=3D V4L2_CID_VBLANK) { + exposure_max =3D format->height + ctrl->val - + IMX415_EXPOSURE_OFFSET; + __v4l2_ctrl_modify_range(sensor->exposure, + sensor->exposure->minimum, + exposure_max, sensor->exposure->step, + sensor->exposure->default_value); + } + + if (!pm_runtime_get_if_in_use(sensor->dev)) + return 0; + switch (ctrl->id) { + case V4L2_CID_VBLANK: + ret =3D cci_write(sensor->regmap, IMX415_VMAX, + format->height + ctrl->val, NULL); + if (ret) + return ret; + /* + * Exposure is set based on VMAX which has just changed, so + * program exposure register as well + */ + ctrl =3D sensor->exposure; + fallthrough; case V4L2_CID_EXPOSURE: /* clamp the exposure value to VMAX. */ vmax =3D format->height + sensor->vblank->cur.val; @@ -787,7 +808,8 @@ static int imx415_ctrls_init(struct imx415 *sensor) u64 pixel_rate =3D supported_modes[sensor->cur_mode].pixel_rate; u64 lane_rate =3D supported_modes[sensor->cur_mode].lane_rate; u32 exposure_max =3D IMX415_PIXEL_ARRAY_HEIGHT + - IMX415_PIXEL_ARRAY_VBLANK - 8; + IMX415_PIXEL_ARRAY_VBLANK - + IMX415_EXPOSURE_OFFSET; u32 hblank; unsigned int i; int ret; @@ -816,8 +838,9 @@ static int imx415_ctrls_init(struct imx415 *sensor) if (ctrl) ctrl->flags |=3D V4L2_CTRL_FLAG_READ_ONLY; =20 - v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, V4L2_CID_EXPOSURE, - 4, exposure_max, 1, exposure_max); + sensor->exposure =3D v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, + V4L2_CID_EXPOSURE, 4, + exposure_max, 1, exposure_max); =20 v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, IMX415_AGAIN_MIN, @@ -834,16 +857,9 @@ static int imx415_ctrls_init(struct imx415 *sensor) sensor->vblank =3D v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, V4L2_CID_VBLANK, IMX415_PIXEL_ARRAY_VBLANK, - IMX415_PIXEL_ARRAY_VBLANK, 1, - IMX415_PIXEL_ARRAY_VBLANK); - if (sensor->vblank) - sensor->vblank->flags |=3D V4L2_CTRL_FLAG_READ_ONLY; + IMX415_VMAX_MAX - IMX415_PIXEL_ARRAY_HEIGHT, + 1, IMX415_PIXEL_ARRAY_VBLANK); =20 - /* - * The pixel rate used here is a virtual value and can be used for - * calculating the frame rate together with hblank. It may not - * necessarily be the physically correct pixel clock. - */ v4l2_ctrl_new_std(&sensor->ctrls, NULL, V4L2_CID_PIXEL_RATE, pixel_rate, pixel_rate, 1, pixel_rate); =20 --=20 2.34.1 From nobody Sun Dec 14 06:21:57 2025 Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3434155756 for ; Thu, 16 Jan 2025 17:43:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737049404; cv=none; b=U9hDiSUWcI0OQRlS69PfyRVPdQBZTJc3eJXJe6/9d2l1KNGZeInzAT6FspAAfQbTg8syM9msVaK9dxcpr5nEhLDiKCmFgPDp6Ek5Bk5ULz7W29+BZOC8X2SODPSGF8hVaRNXlS/Kjemg8AOKyDYtvXGjglXQNuXn5h3pAN1GE10= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737049404; c=relaxed/simple; bh=7PTUaE8JgkH+IFjyTT/YXB1fdLn2K44DQcIAUbn59zA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=k/F2czIuLKVqN91xA5nxRQypDGwmT6GZWEWKRP/uOQ6kMU4BFIfIpWyxbr/0zGjCMMWcbMHcz8zMfDizsnCmAcceyinTdueS6c94FjWnJGqNLWiu58bpuLk8oFe6DjugOHzSt2qQlTTRk7/4Lb7g69Aws28gYq6O2Kt2iukFTo8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=ocF8OCjA; arc=none smtp.client-ip=209.85.128.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="ocF8OCjA" Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-4361b6f9faeso8072645e9.1 for ; Thu, 16 Jan 2025 09:43:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1737049401; x=1737654201; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=e4P7LDYMxTkeBW5tzguw3DNocT1SYMj4Wwsqt793ul8=; b=ocF8OCjAMvxbAbs26Q8L1E+wy6DNmbOCcV9qnuJwboumOaXoVrGFWHE+piTLmdF+Ae vqQJeWqTr9gC/PwsXHyFKrCWZd1zXMc4DgkMql//qYHwkYp6X4BmaCoch9GzM3IgceP4 mvLLoKB1l016fPy52v/Cl9iMJWkYdYk16j+DAwVQJvcRRAAOyqhzNY9kXNbIHjLIt/Zo cZTWn58pFQivJDmZ0JkGYy52CVWFY44chpIVznsb7GHkdG56DAlMk2Mli0Zb+ADbKKRN zxhqFlmJnUaylGjQSqWeKasxAKhpetk3h5uIy1mkrcqO4lc4pC8CPvDIjY0NAOF8v4B2 eS7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737049401; x=1737654201; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e4P7LDYMxTkeBW5tzguw3DNocT1SYMj4Wwsqt793ul8=; b=AIXqfxxNywqlRMQjJpzoMxcnvpfc2xVAaXXT0kWmR96pexEgMpcLepvIuiYkOvQx36 N3zAlUSpdiZr/lv3A44HtA0JUeAUZqJMMQiA8vAQ6ZpeRZByZHYdYv+Kp2RPsKx3sOcz bJpSX4mycBwKaW8H1Q5vhiFUrk/2EQj+F8TWCa7SdLBj2e0xYeNzAPlOMD+m2E8Y3GLH p51+d0cSnt8cRFRRXxYinF0NuNy2MfyEiBjBaNrpS5aWH6xSzgpfXLSqXethaedU1cns 57LjcdKZtrwhxjv+TLXBRqVbmp935NlsX5tVgjmxTyDYHn9n3Xqq6ZwcxHpSas5ZUln+ 3/CQ== X-Forwarded-Encrypted: i=1; AJvYcCWTX81H/Ha5vpP+1/IjA7C4hkGSTSSNhLIuaG4eoyynjLxAbq8x2pwug8hiPwNfeJFqYYHeWFGbVNfKbfY=@vger.kernel.org X-Gm-Message-State: AOJu0YyyXfDciLqMD+kPNfaJ2/z0HNV9abAtGLkxYDz9IxN0lOFfFErS AJyJdvTcbbSAACRrE6eK50y7RDEEO2K2AZfcooe30ffooyv08eEMSsQoWbQSWxE= X-Gm-Gg: ASbGnctYiX8L0diXKdAeqHCFe3sQ/AJrsmfYezBdbTfWpnlP+nUqrjfuxMeafOSAjUM HxGKJICuZYiK0Nl9a1D+L0N9u1weHdL7mQKSi/sMBKtweX8Du9WbigQlIiyR7xJUPgBADB3G2hD ZoeYhY5Efjju0G+Gs4FUO7lhUUoB3AVAAoz136VS6V8XF95z6UMlhEU7BBjB3PNF8aC2y9XdRzf B+Q/bPeKVQc/SYVZBulxZ13z24/RYJTq7tkKotQp4ASKx+R X-Google-Smtp-Source: AGHT+IHAgVBSJ8ZY/NqW0LreuzZcmoNo6KoRW0AkecvteQBt+RaD9wBriFRUtwpi197mTywx/YONow== X-Received: by 2002:a05:600c:1588:b0:436:747d:55c9 with SMTP id 5b1f17b1804b1-437c6af20d2mr66019365e9.5.1737049401061; Thu, 16 Jan 2025 09:43:21 -0800 (PST) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-43890413053sm6302515e9.10.2025.01.16.09.43.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jan 2025 09:43:20 -0800 (PST) From: Dave Stevenson Date: Thu, 16 Jan 2025 17:43:10 +0000 Subject: [PATCH v2 2/3] media: i2c: imx415: Make HBLANK controllable and in consistent units Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250116-media-imx415-v2-2-735263f04652@raspberrypi.com> References: <20250116-media-imx415-v2-0-735263f04652@raspberrypi.com> In-Reply-To: <20250116-media-imx415-v2-0-735263f04652@raspberrypi.com> To: Sakari Ailus , Michael Riesch , Mauro Carvalho Chehab Cc: Gerald Loacker , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, Dave Stevenson X-Mailer: b4 0.14.1 The control of HMAX documented in the datasheet is consistent with being in terms of a scaled INCK, being always 72MHz or 74.25MHz. It is NOT link frequency dependent, but the minimum value for HMAX is dictated by the link frequency. If PIXEL_RATE is defined as being 12 times the 72 or 74.25MHz, and all values are scaled down again when writing HMAX, then the numbers all work out regardless of INCK or link frequency. Retain an hmax_min (set to the same value as the previous fixed hmax register value) to set as the default value to avoid changing the behaviour for existing users. Signed-off-by: Dave Stevenson Reviewed-by: Michael Riesch --- drivers/media/i2c/imx415.c | 87 +++++++++++++++++++++---------------------= ---- 1 file changed, 39 insertions(+), 48 deletions(-) diff --git a/drivers/media/i2c/imx415.c b/drivers/media/i2c/imx415.c index fa7ffb9220e5..24633d17cb09 100644 --- a/drivers/media/i2c/imx415.c +++ b/drivers/media/i2c/imx415.c @@ -28,6 +28,9 @@ #define IMX415_PIXEL_ARRAY_VBLANK 58 #define IMX415_EXPOSURE_OFFSET 8 =20 +#define IMX415_PIXEL_RATE_74_25MHZ 891000000 +#define IMX415_PIXEL_RATE_72MHZ 864000000 + #define IMX415_NUM_CLK_PARAM_REGS 11 =20 #define IMX415_MODE CCI_REG8(0x3000) @@ -54,6 +57,8 @@ #define IMX415_VMAX CCI_REG24_LE(0x3024) #define IMX415_VMAX_MAX 0xfffff #define IMX415_HMAX CCI_REG16_LE(0x3028) +#define IMX415_HMAX_MAX 0xffff +#define IMX415_HMAX_MULTIPLIER 12 #define IMX415_SHR0 CCI_REG24_LE(0x3050) #define IMX415_GAIN_PCG_0 CCI_REG16_LE(0x3090) #define IMX415_AGAIN_MIN 0 @@ -449,7 +454,6 @@ static const struct imx415_clk_params imx415_clk_params= [] =3D { =20 /* all-pixel 2-lane 720 Mbps 15.74 Hz mode */ static const struct cci_reg_sequence imx415_mode_2_720[] =3D { - { IMX415_HMAX, 0x07F0 }, { IMX415_LANEMODE, IMX415_LANEMODE_2 }, { IMX415_TCLKPOST, 0x006F }, { IMX415_TCLKPREPARE, 0x002F }, @@ -464,7 +468,6 @@ static const struct cci_reg_sequence imx415_mode_2_720[= ] =3D { =20 /* all-pixel 2-lane 1440 Mbps 30.01 Hz mode */ static const struct cci_reg_sequence imx415_mode_2_1440[] =3D { - { IMX415_HMAX, 0x042A }, { IMX415_LANEMODE, IMX415_LANEMODE_2 }, { IMX415_TCLKPOST, 0x009F }, { IMX415_TCLKPREPARE, 0x0057 }, @@ -479,7 +482,6 @@ static const struct cci_reg_sequence imx415_mode_2_1440= [] =3D { =20 /* all-pixel 4-lane 891 Mbps 30 Hz mode */ static const struct cci_reg_sequence imx415_mode_4_891[] =3D { - { IMX415_HMAX, 0x044C }, { IMX415_LANEMODE, IMX415_LANEMODE_4 }, { IMX415_TCLKPOST, 0x007F }, { IMX415_TCLKPREPARE, 0x0037 }, @@ -497,39 +499,10 @@ struct imx415_mode_reg_list { const struct cci_reg_sequence *regs; }; =20 -/* - * Mode : number of lanes, lane rate and frame rate dependent settings - * - * pixel_rate and hmax_pix are needed to calculate hblank for the v4l2 ctrl - * interface. These values can not be found in the data sheet and should be - * treated as virtual values. Use following table when adding new modes. - * - * lane_rate lanes fps hmax_pix pixel_rate - * - * 594 2 10.000 4400 99000000 - * 891 2 15.000 4400 148500000 - * 720 2 15.748 4064 144000000 - * 1782 2 30.000 4400 297000000 - * 2079 2 30.000 4400 297000000 - * 1440 2 30.019 4510 304615385 - * - * 594 4 20.000 5500 247500000 - * 594 4 25.000 4400 247500000 - * 720 4 25.000 4400 247500000 - * 720 4 30.019 4510 304615385 - * 891 4 30.000 4400 297000000 - * 1440 4 30.019 4510 304615385 - * 1440 4 60.038 4510 609230769 - * 1485 4 60.000 4400 594000000 - * 1782 4 60.000 4400 594000000 - * 2079 4 60.000 4400 594000000 - * 2376 4 90.164 4392 891000000 - */ struct imx415_mode { u64 lane_rate; u32 lanes; - u32 hmax_pix; - u64 pixel_rate; + u32 hmax_min; struct imx415_mode_reg_list reg_list; }; =20 @@ -538,8 +511,7 @@ static const struct imx415_mode supported_modes[] =3D { { .lane_rate =3D 720000000, .lanes =3D 2, - .hmax_pix =3D 4064, - .pixel_rate =3D 144000000, + .hmax_min =3D 2032, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(imx415_mode_2_720), .regs =3D imx415_mode_2_720, @@ -548,8 +520,7 @@ static const struct imx415_mode supported_modes[] =3D { { .lane_rate =3D 1440000000, .lanes =3D 2, - .hmax_pix =3D 4510, - .pixel_rate =3D 304615385, + .hmax_min =3D 1066, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(imx415_mode_2_1440), .regs =3D imx415_mode_2_1440, @@ -558,8 +529,7 @@ static const struct imx415_mode supported_modes[] =3D { { .lane_rate =3D 891000000, .lanes =3D 4, - .hmax_pix =3D 4400, - .pixel_rate =3D 297000000, + .hmax_min =3D 1100, .reg_list =3D { .num_of_regs =3D ARRAY_SIZE(imx415_mode_4_891), .regs =3D imx415_mode_4_891, @@ -586,6 +556,7 @@ static const char *const imx415_test_pattern_menu[] =3D= { struct imx415 { struct device *dev; struct clk *clk; + unsigned long pixel_rate; struct regulator_bulk_data supplies[ARRAY_SIZE(imx415_supply_names)]; struct gpio_desc *reset; struct regmap *regmap; @@ -597,6 +568,7 @@ struct imx415 { =20 struct v4l2_ctrl_handler ctrls; struct v4l2_ctrl *vblank; + struct v4l2_ctrl *hblank; struct v4l2_ctrl *hflip; struct v4l2_ctrl *vflip; struct v4l2_ctrl *exposure; @@ -787,6 +759,12 @@ static int imx415_s_ctrl(struct v4l2_ctrl *ctrl) ret =3D imx415_set_testpattern(sensor, ctrl->val); break; =20 + case V4L2_CID_HBLANK: + return cci_write(sensor->regmap, IMX415_HMAX, + (format->width + ctrl->val) / + IMX415_HMAX_MULTIPLIER, + NULL); + default: ret =3D -EINVAL; break; @@ -805,12 +783,11 @@ static int imx415_ctrls_init(struct imx415 *sensor) { struct v4l2_fwnode_device_properties props; struct v4l2_ctrl *ctrl; - u64 pixel_rate =3D supported_modes[sensor->cur_mode].pixel_rate; u64 lane_rate =3D supported_modes[sensor->cur_mode].lane_rate; u32 exposure_max =3D IMX415_PIXEL_ARRAY_HEIGHT + IMX415_PIXEL_ARRAY_VBLANK - IMX415_EXPOSURE_OFFSET; - u32 hblank; + u32 hblank_min, hblank_max; unsigned int i; int ret; =20 @@ -847,12 +824,14 @@ static int imx415_ctrls_init(struct imx415 *sensor) IMX415_AGAIN_MAX, IMX415_AGAIN_STEP, IMX415_AGAIN_MIN); =20 - hblank =3D supported_modes[sensor->cur_mode].hmax_pix - - IMX415_PIXEL_ARRAY_WIDTH; + hblank_min =3D (supported_modes[sensor->cur_mode].hmax_min * + IMX415_HMAX_MULTIPLIER) - IMX415_PIXEL_ARRAY_WIDTH; + hblank_max =3D (IMX415_HMAX_MAX * IMX415_HMAX_MULTIPLIER) - + IMX415_PIXEL_ARRAY_WIDTH; ctrl =3D v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, - V4L2_CID_HBLANK, hblank, hblank, 1, hblank); - if (ctrl) - ctrl->flags |=3D V4L2_CTRL_FLAG_READ_ONLY; + V4L2_CID_HBLANK, hblank_min, + hblank_max, IMX415_HMAX_MULTIPLIER, + hblank_min); =20 sensor->vblank =3D v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, V4L2_CID_VBLANK, @@ -860,8 +839,9 @@ static int imx415_ctrls_init(struct imx415 *sensor) IMX415_VMAX_MAX - IMX415_PIXEL_ARRAY_HEIGHT, 1, IMX415_PIXEL_ARRAY_VBLANK); =20 - v4l2_ctrl_new_std(&sensor->ctrls, NULL, V4L2_CID_PIXEL_RATE, pixel_rate, - pixel_rate, 1, pixel_rate); + v4l2_ctrl_new_std(&sensor->ctrls, NULL, V4L2_CID_PIXEL_RATE, + sensor->pixel_rate, sensor->pixel_rate, 1, + sensor->pixel_rate); =20 sensor->hflip =3D v4l2_ctrl_new_std(&sensor->ctrls, &imx415_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); @@ -1333,6 +1313,17 @@ static int imx415_parse_hw_config(struct imx415 *sen= sor) "no valid sensor mode defined\n"); goto done_endpoint_free; } + switch (inck) { + case 27000000: + case 37125000: + case 74250000: + sensor->pixel_rate =3D IMX415_PIXEL_RATE_74_25MHZ; + break; + case 24000000: + case 72000000: + sensor->pixel_rate =3D IMX415_PIXEL_RATE_72MHZ; + break; + } =20 lane_rate =3D supported_modes[sensor->cur_mode].lane_rate; for (i =3D 0; i < ARRAY_SIZE(imx415_clk_params); ++i) { --=20 2.34.1 From nobody Sun Dec 14 06:21:57 2025 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86EE222BAC2 for ; Thu, 16 Jan 2025 17:43:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737049405; cv=none; b=TYXyVaFAu9IsLoSCZGO9xVdkcF6oaeOYm9YMT57ZI+Hzy7fvHYj4W8sNV4ysM4+YBGBIATyS0TlwXpUUDgIDBNXopvTdJEGygMf/70DTHHW0ua+BtaXujSMjcNiS9slYI64VIRJlrLH6ZXq840M7XR5KzI1BNZhIi6zL8zYfd/Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737049405; c=relaxed/simple; bh=eWJgCm/jjyutYsF0u2FHRMTAmQxi4fcBGQ/dHrMP+UM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bzcqVsiWgil2zRrhHPBbfXkTH4T3nmV9mlClpvQ4PxeMnnrCQx1RUMpat8TP5nlPQSZOHSTdE4bTfUIGlXtMlPmEw32zg4fMZUE6/Wt6MzW5ihVVY3WFyPYMj6iYnAhnIaDQdrFxxHXT9Cetzdqf4IUI912Z/UH7sAa401IJ2Jo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com; spf=pass smtp.mailfrom=raspberrypi.com; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b=l4YsjycP; arc=none smtp.client-ip=209.85.128.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=raspberrypi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="l4YsjycP" Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-436341f575fso12782085e9.1 for ; Thu, 16 Jan 2025 09:43:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; t=1737049402; x=1737654202; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=3c5ov7st4tFk0rMU34jT12B0MxOAS1BPe9J0SsPXA2Q=; b=l4YsjycPU2K1PPwqkPfZbO+7gxn+mSM/QVzG9885bn6kK17jaLYIeUZSsvb9wJsp5o 9wsES9CFOTFo46bf4jwWn1aTM+4D9QU+q3Uw8z5Ko1q1Jub0GNAYCU3+uDSWMVUD2YJ6 YuSJcR1KyHVzsYAbnAWU7KNFN4WWBawdoSh2knGrUygrW2df4P829SEjabjmpIJIIh7J WjynWVgL79TY39AofORjw1ZPzNfAbQZ/hbi9z3h6m5d2WOc3a5IXx7EgNr1hOxFBOS1o 2/+iVhM+8iA1KnEE4hWVgM2ciLvtEHpZFAQWL80JhMraoWgMkiW8IUVHEYMTZD87ba4f Igwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737049402; x=1737654202; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3c5ov7st4tFk0rMU34jT12B0MxOAS1BPe9J0SsPXA2Q=; b=J9QuaskFjzFKm4XFCtxNitVxDIklgZ6T7KsGfKu84ir+YHJT6ABnZXzLQw8j2nNb6A ADI7O9R5pveW/CrHZ/53Fkwow0BKsAC6nvLIpLoTlqGyt029b3a3b76ia8x6kp0WIX2C qOuCLfXWXOJsxyam/8BVKfZL0pFsaC6namFDyKt8/wemOqK3zV9Rxs2NU++hjugh+VzN Yk/wfVsbD3KljeW+S2JQK/ZZqvXi32pJL22UHWBl5tF4eEYxOxdh5caJmJnqVihOHfoO /wbtM974QwXSHl76JwAOHzFs8OjWTupQkNC+Vjb5VLLU5Nb02jHr/U2ZA2YdWgmcEKY3 RiXQ== X-Forwarded-Encrypted: i=1; AJvYcCXaHf4jtMUhDknaA6Utfqlv7xhrEsPHB/KL2W4yCklPyvwQ91bZREbcXPBQWfiiVH3jwu9CfHRgOu+b528=@vger.kernel.org X-Gm-Message-State: AOJu0Yx12EAaeAZSTl5GkfVmaHfSDwlVzmMEGO4Qf+ppFSPUoVFIZsfH zs29q00hPuvmtrWQVdDSlDsrHmm6mg4MDWfD5bz6MQGZBlswvM7cOXPSCGSfxFI= X-Gm-Gg: ASbGncsQGlTzT1tpCRKwxUgss5nCs2hEui/TyykvT14P8Ol5qw2X1db4qXlnfd10/1S luRHfQDzhyEPG6G4atILCq1pMaeiZ34cAsBJUhUS7NsMtzjJTFEzAzHmpCpibzpBlcdOD94Or6N mQgB+te2HZEGodY5+raLUY7Rzpnrc9p1Furx97wQNlxbJtwA56wVZc7Q4fZxI1l5Rs5G+BGL9Bo obvE4dofgRPVJmOOR649Qkey25AFjKCNqJpABRbcfnzqG2L X-Google-Smtp-Source: AGHT+IEQXYtZhwUYeCeL1LvktSO96MXKLnY+XjiG9kqdgpPIWu4aDWvI2TS60uQHB/HnbLr716bFxw== X-Received: by 2002:a05:600c:1c9a:b0:428:d31:ef25 with SMTP id 5b1f17b1804b1-436e26975f1mr354804105e9.12.1737049401790; Thu, 16 Jan 2025 09:43:21 -0800 (PST) Received: from [127.0.1.1] ([2a00:1098:3142:e::8]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-43890413053sm6302515e9.10.2025.01.16.09.43.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jan 2025 09:43:21 -0800 (PST) From: Dave Stevenson Date: Thu, 16 Jan 2025 17:43:11 +0000 Subject: [PATCH v2 3/3] media: i2c: imx415: Link frequencies are not exclusive to num lanes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250116-media-imx415-v2-3-735263f04652@raspberrypi.com> References: <20250116-media-imx415-v2-0-735263f04652@raspberrypi.com> In-Reply-To: <20250116-media-imx415-v2-0-735263f04652@raspberrypi.com> To: Sakari Ailus , Michael Riesch , Mauro Carvalho Chehab Cc: Gerald Loacker , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, Dave Stevenson X-Mailer: b4 0.14.1 The link frequencies are equally valid in 2 or 4 lane modes, but they change the hmax_min value for the mode as the MIPI block has to have sufficient time to send the pixel data for each line. Remove the association with number of lanes, and add hmax_min configuration for both lane options. Signed-off-by: Dave Stevenson Reviewed-by: Michael Riesch --- drivers/media/i2c/imx415.c | 53 ++++++++++++++++++++++--------------------= ---- 1 file changed, 25 insertions(+), 28 deletions(-) diff --git a/drivers/media/i2c/imx415.c b/drivers/media/i2c/imx415.c index 24633d17cb09..5729edf06add 100644 --- a/drivers/media/i2c/imx415.c +++ b/drivers/media/i2c/imx415.c @@ -452,9 +452,8 @@ static const struct imx415_clk_params imx415_clk_params= [] =3D { }, }; =20 -/* all-pixel 2-lane 720 Mbps 15.74 Hz mode */ -static const struct cci_reg_sequence imx415_mode_2_720[] =3D { - { IMX415_LANEMODE, IMX415_LANEMODE_2 }, +/* 720 Mbps CSI configuration */ +static const struct cci_reg_sequence imx415_linkrate_720mbps[] =3D { { IMX415_TCLKPOST, 0x006F }, { IMX415_TCLKPREPARE, 0x002F }, { IMX415_TCLKTRAIL, 0x002F }, @@ -466,9 +465,8 @@ static const struct cci_reg_sequence imx415_mode_2_720[= ] =3D { { IMX415_TLPX, 0x0027 }, }; =20 -/* all-pixel 2-lane 1440 Mbps 30.01 Hz mode */ -static const struct cci_reg_sequence imx415_mode_2_1440[] =3D { - { IMX415_LANEMODE, IMX415_LANEMODE_2 }, +/* 1440 Mbps CSI configuration */ +static const struct cci_reg_sequence imx415_linkrate_1440mbps[] =3D { { IMX415_TCLKPOST, 0x009F }, { IMX415_TCLKPREPARE, 0x0057 }, { IMX415_TCLKTRAIL, 0x0057 }, @@ -480,9 +478,8 @@ static const struct cci_reg_sequence imx415_mode_2_1440= [] =3D { { IMX415_TLPX, 0x004F }, }; =20 -/* all-pixel 4-lane 891 Mbps 30 Hz mode */ -static const struct cci_reg_sequence imx415_mode_4_891[] =3D { - { IMX415_LANEMODE, IMX415_LANEMODE_4 }, +/* 891 Mbps CSI configuration */ +static const struct cci_reg_sequence imx415_linkrate_891mbps[] =3D { { IMX415_TCLKPOST, 0x007F }, { IMX415_TCLKPREPARE, 0x0037 }, { IMX415_TCLKTRAIL, 0x0037 }, @@ -501,8 +498,7 @@ struct imx415_mode_reg_list { =20 struct imx415_mode { u64 lane_rate; - u32 lanes; - u32 hmax_min; + u32 hmax_min[2]; struct imx415_mode_reg_list reg_list; }; =20 @@ -510,29 +506,26 @@ struct imx415_mode { static const struct imx415_mode supported_modes[] =3D { { .lane_rate =3D 720000000, - .lanes =3D 2, - .hmax_min =3D 2032, + .hmax_min =3D { 2032, 1066 }, .reg_list =3D { - .num_of_regs =3D ARRAY_SIZE(imx415_mode_2_720), - .regs =3D imx415_mode_2_720, + .num_of_regs =3D ARRAY_SIZE(imx415_linkrate_720mbps), + .regs =3D imx415_linkrate_720mbps, }, }, { .lane_rate =3D 1440000000, - .lanes =3D 2, - .hmax_min =3D 1066, + .hmax_min =3D { 1066, 533 }, .reg_list =3D { - .num_of_regs =3D ARRAY_SIZE(imx415_mode_2_1440), - .regs =3D imx415_mode_2_1440, + .num_of_regs =3D ARRAY_SIZE(imx415_linkrate_1440mbps), + .regs =3D imx415_linkrate_1440mbps, }, }, { .lane_rate =3D 891000000, - .lanes =3D 4, - .hmax_min =3D 1100, + .hmax_min =3D { 2200, 1100 }, .reg_list =3D { - .num_of_regs =3D ARRAY_SIZE(imx415_mode_4_891), - .regs =3D imx415_mode_4_891, + .num_of_regs =3D ARRAY_SIZE(imx415_linkrate_891mbps), + .regs =3D imx415_linkrate_891mbps, }, }, }; @@ -783,7 +776,8 @@ static int imx415_ctrls_init(struct imx415 *sensor) { struct v4l2_fwnode_device_properties props; struct v4l2_ctrl *ctrl; - u64 lane_rate =3D supported_modes[sensor->cur_mode].lane_rate; + const struct imx415_mode *cur_mode =3D &supported_modes[sensor->cur_mode]; + u64 lane_rate =3D cur_mode->lane_rate; u32 exposure_max =3D IMX415_PIXEL_ARRAY_HEIGHT + IMX415_PIXEL_ARRAY_VBLANK - IMX415_EXPOSURE_OFFSET; @@ -824,7 +818,7 @@ static int imx415_ctrls_init(struct imx415 *sensor) IMX415_AGAIN_MAX, IMX415_AGAIN_STEP, IMX415_AGAIN_MIN); =20 - hblank_min =3D (supported_modes[sensor->cur_mode].hmax_min * + hblank_min =3D (cur_mode->hmax_min[sensor->num_data_lanes =3D=3D 2 ? 0 : = 1] * IMX415_HMAX_MULTIPLIER) - IMX415_PIXEL_ARRAY_WIDTH; hblank_max =3D (IMX415_HMAX_MAX * IMX415_HMAX_MULTIPLIER) - IMX415_PIXEL_ARRAY_WIDTH; @@ -886,7 +880,12 @@ static int imx415_set_mode(struct imx415 *sensor, int = mode) IMX415_NUM_CLK_PARAM_REGS, &ret); =20 - return 0; + ret =3D cci_write(sensor->regmap, IMX415_LANEMODE, + sensor->num_data_lanes =3D=3D 2 ? IMX415_LANEMODE_2 : + IMX415_LANEMODE_4, + NULL); + + return ret; } =20 static int imx415_setup(struct imx415 *sensor, struct v4l2_subdev_state *s= tate) @@ -1297,8 +1296,6 @@ static int imx415_parse_hw_config(struct imx415 *sens= or) } =20 for (j =3D 0; j < ARRAY_SIZE(supported_modes); ++j) { - if (sensor->num_data_lanes !=3D supported_modes[j].lanes) - continue; if (bus_cfg.link_frequencies[i] * 2 !=3D supported_modes[j].lane_rate) continue; --=20 2.34.1