From nobody Wed Feb 5 20:32:09 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B00223F282; Wed, 15 Jan 2025 10:29:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736936988; cv=none; b=us8hqdkSPNII0hfDgy32G5fZncjCP2LvVv3y9z9cQDRbRFO8CNuhwZ/aQZ18WUEp3PN4Lql2vix75w3gsg1qHfa6Ftr5siAOkTuZWREuNDjTYqzsdtkinc+ua+lgI3Nx4s/Z7Ru+d2y3vzh5S1oQS6fqQVcARdM1skpaHZtFfU0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736936988; c=relaxed/simple; bh=bZB8wY5GPpQ6Ij8HzLPuECw1iQfeE2kH9xQl80QDmWw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=d0Uql1Jz/IxPPkswSxyFd1vW0H0T8Kq4C4LxvCg9845ok9h4FCrjh+7E6uqIBtVPEPdXxfL3gzdALjX6O4zwhDOY89ntR5++Ox++pMgRxtSmI/YDW83q2kAzkQB3RiGTqGPcyU4Im7St2HZXhyUshn+rzpfMQMWPVs/PIlMsWeY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=Oco2YgeL; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Oco2YgeL" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1736936979; bh=bZB8wY5GPpQ6Ij8HzLPuECw1iQfeE2kH9xQl80QDmWw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Oco2YgeL+qWZvjGiMDbeH+vhFy9m+1/KGipT5dMXfldHcfVtUWRxaclBoyOrflVXG hQOrftU4tM2SzgbN66XaooXMN3K2vj0CyHhIGGFB0PUeHDuqT3bj3wpxpoTRlrnc4h mT8IyCYQTVKKIfT8OF3YBO2xTVAOndw0yGyOLLwHbZVMjrDNTulzpKoCMUxwwC0Zt4 I/UM4tTmbd9449MKDvw3m7s7vnut2h5Wcx5oM4RHnecTtSQn3hRm82ORKUF+IswmNK 5Oz/1ZdLgceOsgj8Xrz9dvyekPnSDhdPQHMtkffzDPAzjnfZqTMxs+wP46LNsunzlf fnHre0P9Fl1Aw== Received: from fedora.home (lfbn-tou-1-1147-231.w90-76.abo.wanadoo.fr [90.76.208.231]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laeyraud) by bali.collaboradmins.com (Postfix) with ESMTPSA id 936FA17E0DD8; Wed, 15 Jan 2025 11:29:37 +0100 (CET) From: Louis-Alexis Eyraud Date: Wed, 15 Jan 2025 11:29:02 +0100 Subject: [PATCH v2 1/4] dt-bindings: arm: mediatek: add mt8370-evk board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250115-dts_mt8370-genio-510-v2-1-fc9b01d08834@collabora.com> References: <20250115-dts_mt8370-genio-510-v2-0-fc9b01d08834@collabora.com> In-Reply-To: <20250115-dts_mt8370-genio-510-v2-0-fc9b01d08834@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Sean Wang Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, Louis-Alexis Eyraud X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1736936976; l=1347; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=bZB8wY5GPpQ6Ij8HzLPuECw1iQfeE2kH9xQl80QDmWw=; b=k5DqrUoLPzbQjqBNU6/bRAXRTjdcXKgZrSGjgRhO1GbvE8zRVY2LkBtInkEjx2Vn7LZB5LJMO f19lst/PGYXChoXB7cjooK45VkwqNElF8/Tr0qo3fpo9F7wCFYvk9ZU X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= 1. Add compatible for MT8370. 2. Add bindings for the MediaTek mt8370-evk board, also known as the "Genio 510-EVK". The MT8370, MT8390 and MT8188 belong to the same SoC family. It is a less powerful variant of MT8390 SoC and their main differences are: - Arm Cortex-A55 cores number (4 vs 6) - Arm Cortex-A78 core speed (2.0 GHz vs 2.2 Ghz) - Arm Mali-G57 GPU core number (2 vs 3) Like MT8390, MT8370 hardware register maps are identical to MT8188. Signed-off-by: Louis-Alexis Eyraud Reviewed-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/arm/mediatek.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Document= ation/devicetree/bindings/arm/mediatek.yaml index 3ce34d68c213acae44c27bdee3a9bb0b9dbcd1fd..108ae5e0185d93976556a037685= 95961961bcc33 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -412,6 +412,11 @@ properties: - enum: - mediatek,mt8365-evk - const: mediatek,mt8365 + - items: + - enum: + - mediatek,mt8370-evk + - const: mediatek,mt8370 + - const: mediatek,mt8188 - items: - enum: - mediatek,mt8390-evk --=20 2.48.0 From nobody Wed Feb 5 20:32:09 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F667241695; Wed, 15 Jan 2025 10:29:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736936990; cv=none; b=n+YOGsfnTK+6/WPLrW9tnAEjjO/+6BimvJVEcDGitU48ZfZkR4cLhGtW2f/clmIUuMVcGxt2zqHj4TnBWxwPagG/eXub4tIokxbo97UdCoyOTSxthmcz9F890snXgHlh9xLwCnA75HnPnZw+yYgW8V3hufouqy9Osx60ijf6r1k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736936990; c=relaxed/simple; bh=s2hudm/9G24yMYWoXmUzYddQItAemdzK4MaLW2IhpwA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PkbCEejPJnf8MJ7718kMRVKDHx6/my1wuHoQDrJhKB2uNFJFfLOy2qYIKz0Rdhb5xTIPmGSzRdgdxW/9BFXqxf6PKrFeo3e+LWGp/zNPPy4Xc5fUDIx5nR1mvxXO8nEL0dABIRt+IVcvMJzMkHxe+q9atZXRU3UKZMqaZcilxEk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=EYza1LZP; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="EYza1LZP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1736936981; bh=s2hudm/9G24yMYWoXmUzYddQItAemdzK4MaLW2IhpwA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=EYza1LZPJrixGBPSfKLn/aYZtHSczrtUTFbL6gPIOFZpN3RHZdrmtH0Prg/kneLs/ MVW0vClLtjN/9Trkn4ivR721MQ5A9KAOhFylbi3pvK2Osn2CrSP6chjv4E4sR/4nNz 6UZL6yQgjH26Zre9LBNCyzPRGhG0LozCgQS/QGxDvQmKZhALHPVzMmjGHzWVksZTUZ jT/GU5aammM6grGOHkbzkagpzYbtEm5HcWPyFGFax1t8r0RJwUKjZoh8DvBSWn2vwB gELWgPQmUrHTch5K+pYdEwqZ+HnPf7T/0XuBeEwfGHj3lfHt5ycDOCZPNQVf6nPLHw CyWAsmlvEIsdQ== Received: from fedora.home (lfbn-tou-1-1147-231.w90-76.abo.wanadoo.fr [90.76.208.231]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laeyraud) by bali.collaboradmins.com (Postfix) with ESMTPSA id BE9CB17E0DE6; Wed, 15 Jan 2025 11:29:39 +0100 (CET) From: Louis-Alexis Eyraud Date: Wed, 15 Jan 2025 11:29:03 +0100 Subject: [PATCH v2 2/4] arm64: dts: mediatek: add support for MT8370 SoC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250115-dts_mt8370-genio-510-v2-2-fc9b01d08834@collabora.com> References: <20250115-dts_mt8370-genio-510-v2-0-fc9b01d08834@collabora.com> In-Reply-To: <20250115-dts_mt8370-genio-510-v2-0-fc9b01d08834@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Sean Wang Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, Louis-Alexis Eyraud X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1736936976; l=4097; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=s2hudm/9G24yMYWoXmUzYddQItAemdzK4MaLW2IhpwA=; b=/hQGoMzTN/tilwsBGwhVJrvyaWrGV45/WGTeFhhPRaaEFcjM63YtYK4ZjdRK8EJi3usrmLaY4 VWqB874OvYJCskGR3xrC1+DRxEHMyzRdOdZ7l8M2RQj3UqvKJrkKpS9 X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= This commit adds the support of the Mediatek MT8370 SoC. It is a less powerful variant of MT8390 SoC and their main differences are: - Arm Cortex-A55 cores number (4 vs 6) - Arm Cortex-A78 core speed (2.0 GHz vs 2.2 Ghz) - Arm Mali-G57 GPU core number (2 vs 3) Like MT8390, MT8370 hardware register maps are identical to MT8188. Note: In this commit, the mt8370.dtsi does not contain the needed overrides to support the Mali GPU (to be done in a future commit). Signed-off-by: Louis-Alexis Eyraud Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8188.dtsi | 8 ++-- arch/arm64/boot/dts/mediatek/mt8370.dtsi | 64 ++++++++++++++++++++++++++++= ++++ 2 files changed, 68 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts= /mediatek/mt8188.dtsi index 338120930b819645662465fa7b3c6be6491764ff..5d78f51c6183c15018986df2c76= e6fdc1f9f43b4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -492,7 +492,7 @@ cpu_little0_crit: trip-crit { }; =20 cooling-maps { - map0 { + cpu_little0_cooling_map0: map0 { trip =3D <&cpu_little0_alert0>; cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, @@ -530,7 +530,7 @@ cpu_little1_crit: trip-crit { }; =20 cooling-maps { - map0 { + cpu_little1_cooling_map0: map0 { trip =3D <&cpu_little1_alert0>; cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, @@ -568,7 +568,7 @@ cpu_little2_crit: trip-crit { }; =20 cooling-maps { - map0 { + cpu_little2_cooling_map0: map0 { trip =3D <&cpu_little2_alert0>; cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, @@ -606,7 +606,7 @@ cpu_little3_crit: trip-crit { }; =20 cooling-maps { - map0 { + cpu_little3_cooling_map0: map0 { trip =3D <&cpu_little3_alert0>; cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, diff --git a/arch/arm64/boot/dts/mediatek/mt8370.dtsi b/arch/arm64/boot/dts= /mediatek/mt8370.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..cf1a3759451ff899ce9e63e5a00= f192fb483f6e5 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8370.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (c) 2025 Collabora Ltd. + * Author: Louis-Alexis Eyraud + */ + +/dts-v1/; +#include "mt8188.dtsi" + +/ { + compatible =3D "mediatek,mt8370"; + + cpus { + /delete-node/ cpu@400; + /delete-node/ cpu@500; + + cpu-map { + cluster0 { + /delete-node/ core4; + /delete-node/ core5; + }; + }; + }; +}; + +&cpu6 { + clock-frequency =3D <2200000000>; +}; + +&cpu7 { + clock-frequency =3D <2200000000>; +}; + +&cpu_little0_cooling_map0 { + cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; +}; + +&cpu_little1_cooling_map0 { + cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; +}; + +&cpu_little2_cooling_map0 { + cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; +}; + +&cpu_little3_cooling_map0 { + cooling-device =3D <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 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Wed, 15 Jan 2025 11:29:41 +0100 (CET) From: Louis-Alexis Eyraud Date: Wed, 15 Jan 2025 11:29:04 +0100 Subject: [PATCH v2 3/4] arm64: dts: mediatek: mt8390-genio-700-evk: Move common parts to dtsi Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250115-dts_mt8370-genio-510-v2-3-fc9b01d08834@collabora.com> References: <20250115-dts_mt8370-genio-510-v2-0-fc9b01d08834@collabora.com> In-Reply-To: <20250115-dts_mt8370-genio-510-v2-0-fc9b01d08834@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Sean Wang Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, Louis-Alexis Eyraud X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1736936976; l=51089; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=vWA43wGD/MV13wvRZYScfNRbkyi1+ipddm9ITL5OxqY=; b=I/E6HSjoSEgUFs7+Tt0MW9tsbkvkzHMyyhw5AiFd9OoJcK1unLwvc2e9p6pMzbW9tzT4h3WRC rvtayidDleMCPEVwujoMEvCPwV2IaImuRV/6rUAO52FZprADKpuaU8Q X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= In preparation for introducing the Genio 510 EVK board support, this commit splits mt8390-genio-700-evk.dts file in two to create mt8390-genio-common.dtsi file, containing common definitions for both boards. Signed-off-by: Louis-Alexis Eyraud Reviewed-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8390-genio-700-evk.dts | 1033 +---------------= --- .../boot/dts/mediatek/mt8390-genio-common.dtsi | 1040 ++++++++++++++++= ++++ 2 files changed, 1041 insertions(+), 1032 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts b/arch/a= rm64/boot/dts/mediatek/mt8390-genio-700-evk.dts index 04e4a2f73799d04d50476eb1664b1afdbc66c124..612336713a64ee0681f6ebead04= ba4ea293d1a53 100644 --- a/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts @@ -8,1047 +8,16 @@ /dts-v1/; =20 #include "mt8188.dtsi" -#include "mt6359.dtsi" -#include -#include -#include -#include -#include -#include -#include +#include "mt8390-genio-common.dtsi" =20 / { model =3D "MediaTek Genio-700 EVK"; compatible =3D "mediatek,mt8390-evk", "mediatek,mt8390", "mediatek,mt8188"; =20 - aliases { - ethernet0 =3D ð - i2c0 =3D &i2c0; - i2c1 =3D &i2c1; - i2c2 =3D &i2c2; - i2c3 =3D &i2c3; - i2c4 =3D &i2c4; - i2c5 =3D &i2c5; - i2c6 =3D &i2c6; - mmc0 =3D &mmc0; - mmc1 =3D &mmc1; - serial0 =3D &uart0; - }; - - chosen { - stdout-path =3D "serial0:921600n8"; - }; - - firmware { - optee { - compatible =3D "linaro,optee-tz"; - method =3D "smc"; - }; - }; - memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0x2 0x00000000>; }; - - reserved-memory { - #address-cells =3D <2>; - #size-cells =3D <2>; - ranges; - - /* - * 12 MiB reserved for OP-TEE (BL32) - * +-----------------------+ 0x43e0_0000 - * | SHMEM 2MiB | - * +-----------------------+ 0x43c0_0000 - * | | TA_RAM 8MiB | - * + TZDRAM +--------------+ 0x4340_0000 - * | | TEE_RAM 2MiB | - * +-----------------------+ 0x4320_0000 - */ - optee_reserved: optee@43200000 { - no-map; - reg =3D <0 0x43200000 0 0x00c00000>; - }; - - scp_mem: memory@50000000 { - compatible =3D "shared-dma-pool"; - reg =3D <0 0x50000000 0 0x2900000>; - no-map; - }; - - /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ - bl31_secmon_reserved: memory@54600000 { - no-map; - reg =3D <0 0x54600000 0x0 0x200000>; - }; - - apu_mem: memory@55000000 { - compatible =3D "shared-dma-pool"; - reg =3D <0 0x55000000 0 0x1400000>; /* 20 MB */ - }; - - vpu_mem: memory@57000000 { - compatible =3D "shared-dma-pool"; - reg =3D <0 0x57000000 0 0x1400000>; /* 20 MB */ - }; - - adsp_mem: memory@60000000 { - compatible =3D "shared-dma-pool"; - reg =3D <0 0x60000000 0 0xf00000>; - no-map; - }; - - afe_dma_mem: memory@60f00000 { - compatible =3D "shared-dma-pool"; - reg =3D <0 0x60f00000 0 0x100000>; - no-map; - }; - - adsp_dma_mem: memory@61000000 { - compatible =3D "shared-dma-pool"; - reg =3D <0 0x61000000 0 0x100000>; - no-map; - }; - }; - - common_fixed_5v: regulator-0 { - compatible =3D "regulator-fixed"; - regulator-name =3D "vdd_5v"; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - gpio =3D <&pio 10 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-always-on; - vin-supply =3D <®_vsys>; - }; - - edp_panel_fixed_3v3: regulator-1 { - compatible =3D "regulator-fixed"; - regulator-name =3D "vedp_3v3"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - enable-active-high; - gpio =3D <&pio 15 GPIO_ACTIVE_HIGH>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&edp_panel_3v3_en_pins>; - vin-supply =3D <®_vsys>; - }; - - gpio_fixed_3v3: regulator-2 { - compatible =3D "regulator-fixed"; - regulator-name =3D "ext_3v3"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - gpio =3D <&pio 9 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-always-on; - vin-supply =3D <®_vsys>; - }; - - /* system wide 4.2V power rail from charger */ - reg_vsys: regulator-vsys { - compatible =3D "regulator-fixed"; - regulator-name =3D "vsys"; - regulator-always-on; - regulator-boot-on; - }; - - /* used by mmc2 */ - sdio_fixed_1v8: regulator-3 { - compatible =3D "regulator-fixed"; - regulator-name =3D "vio18_conn"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - enable-active-high; - regulator-always-on; - }; - - /* used by mmc2 */ - sdio_fixed_3v3: regulator-4 { - compatible =3D "regulator-fixed"; - regulator-name =3D "wifi_3v3"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - gpio =3D <&pio 74 GPIO_ACTIVE_HIGH>; - enable-active-high; - regulator-always-on; - vin-supply =3D <®_vsys>; - }; - - touch0_fixed_3v3: regulator-5 { - compatible =3D "regulator-fixed"; - regulator-name =3D "vio33_tp1"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - gpio =3D <&pio 119 GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply =3D <®_vsys>; - }; - - usb_hub_fixed_3v3: regulator-6 { - compatible =3D "regulator-fixed"; - regulator-name =3D "vhub_3v3"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - gpio =3D <&pio 112 GPIO_ACTIVE_HIGH>; /* HUB_3V3_EN */ - startup-delay-us =3D <10000>; - enable-active-high; - vin-supply =3D <®_vsys>; - }; - - usb_p0_vbus: regulator-7 { - compatible =3D "regulator-fixed"; - regulator-name =3D "vbus_p0"; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - gpio =3D <&pio 84 GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply =3D <®_vsys>; - }; - - usb_p1_vbus: regulator-8 { - compatible =3D "regulator-fixed"; - regulator-name =3D "vbus_p1"; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - gpio =3D <&pio 87 GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply =3D <®_vsys>; - }; - - /* used by ssusb2 */ - usb_p2_vbus: regulator-9 { - compatible =3D "regulator-fixed"; - regulator-name =3D "wifi_3v3"; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - enable-active-high; - }; -}; - -&adsp { - memory-region =3D <&adsp_dma_mem>, <&adsp_mem>; - status =3D "okay"; -}; - -&afe { - memory-region =3D <&afe_dma_mem>; - status =3D "okay"; -}; - -&gpu { - mali-supply =3D <&mt6359_vproc2_buck_reg>; - status =3D "okay"; -}; - -&i2c0 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c0_pins>; - clock-frequency =3D <400000>; - status =3D "okay"; - - touchscreen@5d { - compatible =3D "goodix,gt9271"; - reg =3D <0x5d>; - interrupt-parent =3D <&pio>; - interrupts-extended =3D <&pio 6 IRQ_TYPE_EDGE_RISING>; - irq-gpios =3D <&pio 6 GPIO_ACTIVE_HIGH>; - reset-gpios =3D <&pio 5 GPIO_ACTIVE_HIGH>; - AVDD28-supply =3D <&touch0_fixed_3v3>; - VDDIO-supply =3D <&mt6359_vio18_ldo_reg>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&touch_pins>; - }; -}; - -&i2c1 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c1_pins>; - clock-frequency =3D <400000>; - status =3D "okay"; -}; - -&i2c2 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c2_pins>; - clock-frequency =3D <400000>; - status =3D "okay"; -}; - -&i2c3 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c3_pins>; - clock-frequency =3D <400000>; - status =3D "okay"; -}; - -&i2c4 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c4_pins>; - clock-frequency =3D <1000000>; - status =3D "okay"; -}; - -&i2c5 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c5_pins>; - clock-frequency =3D <400000>; - status =3D "okay"; -}; - -&i2c6 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c6_pins>; - clock-frequency =3D <400000>; - status =3D "okay"; -}; - -&mfg0 { - domain-supply =3D <&mt6359_vproc2_buck_reg>; -}; - -&mfg1 { - domain-supply =3D <&mt6359_vsram_others_ldo_reg>; -}; - -&mmc0 { - status =3D "okay"; - pinctrl-names =3D "default", "state_uhs"; - pinctrl-0 =3D <&mmc0_default_pins>; - pinctrl-1 =3D <&mmc0_uhs_pins>; - bus-width =3D <8>; - max-frequency =3D <200000000>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - mmc-hs400-1_8v; - supports-cqe; - cap-mmc-hw-reset; - no-sdio; - no-sd; - hs400-ds-delay =3D <0x1481b>; - vmmc-supply =3D <&mt6359_vemc_1_ldo_reg>; - vqmmc-supply =3D <&mt6359_vufs_ldo_reg>; - non-removable; -}; - -&mmc1 { - status =3D "okay"; - pinctrl-names =3D "default", "state_uhs"; - pinctrl-0 =3D <&mmc1_default_pins>; - pinctrl-1 =3D <&mmc1_uhs_pins>; - bus-width =3D <4>; - max-frequency =3D <200000000>; - cap-sd-highspeed; - sd-uhs-sdr50; - sd-uhs-sdr104; - no-mmc; - no-sdio; - cd-gpios =3D <&pio 2 GPIO_ACTIVE_LOW>; - vmmc-supply =3D <&mt6359_vpa_buck_reg>; - vqmmc-supply =3D <&mt6359_vsim1_ldo_reg>; -}; - -&mt6359_vbbck_ldo_reg { - regulator-always-on; -}; - -&mt6359_vcn18_ldo_reg { - regulator-name =3D "vcn18_pmu"; - regulator-always-on; -}; - -&mt6359_vcn33_2_bt_ldo_reg { - regulator-name =3D "vcn33_2_pmu"; - regulator-always-on; -}; - -&mt6359_vcore_buck_reg { - regulator-name =3D "dvdd_proc_l"; - regulator-always-on; -}; - -&mt6359_vgpu11_buck_reg { - regulator-name =3D "dvdd_core"; - regulator-always-on; -}; - -&mt6359_vpa_buck_reg { - regulator-name =3D "vpa_pmu"; - regulator-max-microvolt =3D <3100000>; -}; - -&mt6359_vproc2_buck_reg { - /* The name "vgpu" is required by mtk-regulator-coupler */ - regulator-name =3D "vgpu"; - regulator-min-microvolt =3D <550000>; - regulator-max-microvolt =3D <800000>; - regulator-coupled-with =3D <&mt6359_vsram_others_ldo_reg>; - regulator-coupled-max-spread =3D <6250>; -}; - -&mt6359_vpu_buck_reg { - regulator-name =3D "dvdd_adsp"; - regulator-always-on; -}; - -&mt6359_vrf12_ldo_reg { - regulator-name =3D "va12_abb2_pmu"; - regulator-always-on; -}; - -&mt6359_vsim1_ldo_reg { - regulator-name =3D "vsim1_pmu"; - regulator-enable-ramp-delay =3D <480>; -}; - -&mt6359_vsram_others_ldo_reg { - /* The name "vsram_gpu" is required by mtk-regulator-coupler */ - regulator-name =3D "vsram_gpu"; - regulator-min-microvolt =3D <750000>; - regulator-max-microvolt =3D <800000>; - regulator-coupled-with =3D <&mt6359_vproc2_buck_reg>; - regulator-coupled-max-spread =3D <6250>; -}; - -&mt6359_vufs_ldo_reg { - regulator-name =3D "vufs18_pmu"; - regulator-always-on; -}; - -&mt6359codec { - mediatek,mic-type-0 =3D <1>; /* ACC */ - mediatek,mic-type-1 =3D <3>; /* DCC */ -}; - -&pcie { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pcie_pins_default>; - status =3D "okay"; -}; - -&pciephy { - status =3D "okay"; -}; - -&pio { - audio_default_pins: audio-default-pins { - pins-cmd-dat { - pinmux =3D , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - }; - - dptx_pins: dptx-pins { - pins-cmd-dat { - pinmux =3D ; - bias-pull-up; - }; - }; - - edp_panel_3v3_en_pins: edp-panel-3v3-en-pins { - pins1 { - pinmux =3D ; - output-high; - }; - }; - - eth_default_pins: eth-default-pins { - pins-cc { - pinmux =3D , - , - , - ; - drive-strength =3D <8>; - }; - - pins-mdio { - pinmux =3D , - ; - drive-strength =3D <8>; - input-enable; - }; - - pins-power { - pinmux =3D , - ; - output-high; - }; - - pins-rxd { - pinmux =3D , - , - , - ; - drive-strength =3D <8>; - }; - - pins-txd { - pinmux =3D , - , - , - ; - drive-strength =3D <8>; - }; - }; - - eth_sleep_pins: eth-sleep-pins { - pins-cc { - pinmux =3D , - , - , - ; - }; - - pins-mdio { - pinmux =3D , - ; - input-disable; - bias-disable; - }; - - pins-rxd { - pinmux =3D , - , - , - ; - }; - - pins-txd { - pinmux =3D , - , - , - ; - }; - }; - - i2c0_pins: i2c0-pins { - pins { - pinmux =3D , - ; - bias-pull-up =3D ; - drive-strength-microamp =3D <1000>; - }; - }; - - i2c1_pins: i2c1-pins { - pins { - pinmux =3D , - ; - bias-pull-up =3D ; - drive-strength-microamp =3D <1000>; - }; - }; - - i2c2_pins: i2c2-pins { - pins { - pinmux =3D , - ; - bias-pull-up =3D ; - drive-strength-microamp =3D <1000>; - }; - }; - - i2c3_pins: i2c3-pins { - pins { - pinmux =3D , - ; - bias-pull-up =3D ; - drive-strength-microamp =3D <1000>; - }; - }; - - i2c4_pins: i2c4-pins { - pins { - pinmux =3D , - ; - bias-pull-up =3D ; - drive-strength-microamp =3D <1000>; - }; - }; - - i2c5_pins: i2c5-pins { - pins { - pinmux =3D , - ; - bias-pull-up =3D ; - drive-strength-microamp =3D <1000>; - }; - }; - - i2c6_pins: i2c6-pins { - pins { - pinmux =3D , - ; - bias-pull-up =3D ; - drive-strength-microamp =3D <1000>; - }; - }; - - gpio_key_pins: gpio-key-pins { - pins { - pinmux =3D , - , - ; - }; - }; - - mmc0_default_pins: mmc0-default-pins { - pins-clk { - pinmux =3D ; - drive-strength =3D <6>; - bias-pull-down =3D ; - }; - - pins-cmd-dat { - pinmux =3D , - , - , - , - , - , - , - , - ; - input-enable; - drive-strength =3D <6>; - bias-pull-up =3D ; - }; - - pins-rst { - pinmux =3D ; - drive-strength =3D <6>; - bias-pull-up =3D ; - }; - }; - - mmc0_uhs_pins: mmc0-uhs-pins { - pins-clk { - pinmux =3D ; - drive-strength =3D <8>; - bias-pull-down =3D ; - }; - - pins-cmd-dat { - pinmux =3D , - , - , - , - , - , - , - , - ; - input-enable; - drive-strength =3D <8>; - bias-pull-up =3D ; - }; - - pins-ds { - pinmux =3D ; - drive-strength =3D <8>; - bias-pull-down =3D ; - }; - - pins-rst { - pinmux =3D ; - drive-strength =3D <8>; - bias-pull-up =3D ; - }; - }; - - mmc1_default_pins: mmc1-default-pins { - pins-clk { - pinmux =3D ; - drive-strength =3D <6>; - bias-pull-down =3D ; - }; - - pins-cmd-dat { - pinmux =3D , - , - , - , - ; - input-enable; - drive-strength =3D <6>; - bias-pull-up =3D ; - }; - - pins-insert { - pinmux =3D ; - bias-pull-up; - }; - }; - - mmc1_uhs_pins: mmc1-uhs-pins { - pins-clk { - pinmux =3D ; - drive-strength =3D <6>; - bias-pull-down =3D ; - }; - - pins-cmd-dat { - pinmux =3D , - , - , - , - ; - input-enable; - drive-strength =3D <6>; - bias-pull-up =3D ; - }; - }; - - mmc2_default_pins: mmc2-default-pins { - pins-clk { - pinmux =3D ; - drive-strength =3D <4>; - bias-pull-down =3D ; - }; - - pins-cmd-dat { - pinmux =3D , - , - , - , - ; - input-enable; - drive-strength =3D <6>; - bias-pull-up =3D ; - }; - - pins-pcm { - pinmux =3D ; - }; - }; - - mmc2_uhs_pins: mmc2-uhs-pins { - pins-clk { - pinmux =3D ; - drive-strength =3D <4>; - bias-pull-down =3D ; - }; - - pins-cmd-dat { - pinmux =3D , - , - , - , - ; - input-enable; - drive-strength =3D <6>; - bias-pull-up =3D ; - }; - }; - - mmc2_eint_pins: mmc2-eint-pins { - pins-dat1 { - pinmux =3D ; - input-enable; - bias-pull-up =3D ; - }; - }; - - mmc2_dat1_pins: mmc2-dat1-pins { - pins-dat1 { - pinmux =3D ; - input-enable; - drive-strength =3D <6>; - bias-pull-up =3D ; - }; - }; - - panel_default_pins: panel-default-pins { - pins-dcdc { - pinmux =3D ; - output-low; - }; - - pins-en { - pinmux =3D ; - output-low; - }; - - pins-rst { - pinmux =3D ; - output-high; - }; - }; - - pcie_pins_default: pcie-default { - mux { - pinmux =3D , - , - ; - bias-pull-up; - }; - }; - - rt1715_int_pins: rt1715-int-pins { - pins_cmd0_dat { - pinmux =3D ; - bias-pull-up; - input-enable; - }; - }; - - spi0_pins: spi0-pins { - pins-spi { - pinmux =3D , - , - , - ; - bias-disable; - }; - }; - - spi1_pins: spi1-pins { - pins-spi { - pinmux =3D , - , - , - ; - bias-disable; - }; - }; - - spi2_pins: spi2-pins { - pins-spi { - pinmux =3D , - , - , - ; - bias-disable; - }; - }; - - touch_pins: touch-pins { - pins-irq { - pinmux =3D ; - input-enable; - bias-disable; - }; - - pins-reset { - pinmux =3D ; - output-high; - }; - }; - - uart0_pins: uart0-pins { - pins { - pinmux =3D , - ; - bias-pull-up; - }; - }; - - uart1_pins: uart1-pins { - pins { - pinmux =3D , - ; - bias-pull-up; - }; - }; - - uart2_pins: uart2-pins { - pins { - pinmux =3D , - ; - bias-pull-up; - }; - }; - - usb_default_pins: usb-default-pins { - pins-iddig { - pinmux =3D ; - input-enable; - bias-pull-up; - }; - - pins-valid { - pinmux =3D ; - input-enable; - }; - - pins-vbus { - pinmux =3D ; - output-high; - }; - - }; - - usb1_default_pins: usb1-default-pins { - pins-valid { - pinmux =3D ; - input-enable; - }; - - pins-usb-hub-3v3-en { - pinmux =3D ; - output-high; - }; - }; - - wifi_pwrseq_pins: wifi-pwrseq-pins { - pins-wifi-enable { - pinmux =3D ; - output-low; - }; - }; -}; - -ð { - phy-mode =3D"rgmii-id"; - phy-handle =3D <ðernet_phy0>; - pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <ð_default_pins>; - pinctrl-1 =3D <ð_sleep_pins>; - mediatek,mac-wol; - snps,reset-gpio =3D <&pio 147 GPIO_ACTIVE_HIGH>; - snps,reset-delays-us =3D <0 10000 10000>; - status =3D "okay"; -}; - -ð_mdio { - ethernet_phy0: ethernet-phy@1 { - compatible =3D "ethernet-phy-id001c.c916"; - reg =3D <0x1>; - }; -}; - -&pmic { - interrupt-parent =3D <&pio>; - interrupts =3D <222 IRQ_TYPE_LEVEL_HIGH>; - - mt6359keys: keys { - compatible =3D "mediatek,mt6359-keys"; - mediatek,long-press-mode =3D <1>; - power-off-time-sec =3D <0>; - - power-key { - linux,keycodes =3D ; - wakeup-source; - }; - }; -}; - -&scp { - memory-region =3D <&scp_mem>; - status =3D "okay"; -}; - -&sound { - compatible =3D "mediatek,mt8390-mt6359-evk", "mediatek,mt8188-mt6359-evb"; - model =3D "mt8390-evk"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&audio_default_pins>; - audio-routing =3D - "Headphone", "Headphone L", - "Headphone", "Headphone R"; - mediatek,adsp =3D <&adsp>; - status =3D "okay"; - - dai-link-0 { - link-name =3D "DL_SRC_BE"; - - codec { - sound-dai =3D <&pmic 0>; - }; - }; -}; - -&spi2 { - pinctrl-0 =3D <&spi2_pins>; - pinctrl-names =3D "default"; - mediatek,pad-select =3D <0>; - #address-cells =3D <1>; - #size-cells =3D <0>; - status =3D "okay"; }; =20 -&uart0 { - pinctrl-0 =3D <&uart0_pins>; - pinctrl-names =3D "default"; - status =3D "okay"; -}; - -&uart1 { - pinctrl-0 =3D <&uart1_pins>; - pinctrl-names =3D "default"; - status =3D "okay"; -}; - -&uart2 { - pinctrl-0 =3D <&uart2_pins>; - pinctrl-names =3D "default"; - status =3D "okay"; -}; - -&u3phy0 { - status =3D "okay"; -}; - -&u3phy1 { - status =3D "okay"; -}; - -&u3phy2 { - status =3D "okay"; -}; - -&xhci0 { - status =3D "okay"; - vusb33-supply =3D <&mt6359_vusb_ldo_reg>; -}; - -&xhci1 { - status =3D "okay"; - vusb33-supply =3D <&mt6359_vusb_ldo_reg>; - #address-cells =3D <1>; - #size-cells =3D <0>; - - hub_2_0: hub@1 { - compatible =3D "usb451,8025"; - reg =3D <1>; - peer-hub =3D <&hub_3_0>; - reset-gpios =3D <&pio 7 GPIO_ACTIVE_HIGH>; - vdd-supply =3D <&usb_hub_fixed_3v3>; - }; - - hub_3_0: hub@2 { - compatible =3D "usb451,8027"; - reg =3D <2>; - peer-hub =3D <&hub_2_0>; - reset-gpios =3D <&pio 7 GPIO_ACTIVE_HIGH>; - vdd-supply =3D <&usb_hub_fixed_3v3>; - }; -}; - -&xhci2 { - status =3D "okay"; - vusb33-supply =3D <&mt6359_vusb_ldo_reg>; - vbus-supply =3D <&sdio_fixed_3v3>; /* wifi_3v3 */ -}; diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi b/arch/a= rm64/boot/dts/mediatek/mt8390-genio-common.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..f559e5fe547120c793a7707ed58= 79a0576a20610 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi @@ -0,0 +1,1040 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (c) 2025 Collabora Ltd. + * Author: Louis-Alexis Eyraud + */ + +#include "mt6359.dtsi" +#include +#include +#include +#include +#include +#include +#include + +/ { + aliases { + ethernet0 =3D ð + i2c0 =3D &i2c0; + i2c1 =3D &i2c1; + i2c2 =3D &i2c2; + i2c3 =3D &i2c3; + i2c4 =3D &i2c4; + i2c5 =3D &i2c5; + i2c6 =3D &i2c6; + mmc0 =3D &mmc0; + mmc1 =3D &mmc1; + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:921600n8"; + }; + + firmware { + optee { + compatible =3D "linaro,optee-tz"; + method =3D "smc"; + }; + }; + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + /* + * 12 MiB reserved for OP-TEE (BL32) + * +-----------------------+ 0x43e0_0000 + * | SHMEM 2MiB | + * +-----------------------+ 0x43c0_0000 + * | | TA_RAM 8MiB | + * + TZDRAM +--------------+ 0x4340_0000 + * | | TEE_RAM 2MiB | + * +-----------------------+ 0x4320_0000 + */ + optee_reserved: optee@43200000 { + no-map; + reg =3D <0 0x43200000 0 0x00c00000>; + }; + + scp_mem: memory@50000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x50000000 0 0x2900000>; + no-map; + }; + + /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ + bl31_secmon_reserved: memory@54600000 { + no-map; + reg =3D <0 0x54600000 0x0 0x200000>; + }; + + apu_mem: memory@55000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x55000000 0 0x1400000>; /* 20 MB */ + }; + + vpu_mem: memory@57000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x57000000 0 0x1400000>; /* 20 MB */ + }; + + adsp_mem: memory@60000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x60000000 0 0xf00000>; + no-map; + }; + + afe_dma_mem: memory@60f00000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x60f00000 0 0x100000>; + no-map; + }; + + adsp_dma_mem: memory@61000000 { + compatible =3D "shared-dma-pool"; + reg =3D <0 0x61000000 0 0x100000>; + no-map; + }; + }; + + common_fixed_5v: regulator-0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd_5v"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&pio 10 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + vin-supply =3D <®_vsys>; + }; + + edp_panel_fixed_3v3: regulator-1 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vedp_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpio =3D <&pio 15 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&edp_panel_3v3_en_pins>; + vin-supply =3D <®_vsys>; + }; + + gpio_fixed_3v3: regulator-2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "ext_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpio =3D <&pio 9 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + vin-supply =3D <®_vsys>; + }; + + /* system wide 4.2V power rail from charger */ + reg_vsys: regulator-vsys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vsys"; + regulator-always-on; + regulator-boot-on; + }; + + /* used by mmc2 */ + sdio_fixed_1v8: regulator-3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vio18_conn"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + enable-active-high; + regulator-always-on; + }; + + /* used by mmc2 */ + sdio_fixed_3v3: regulator-4 { + compatible =3D "regulator-fixed"; + regulator-name =3D "wifi_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpio =3D <&pio 74 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + vin-supply =3D <®_vsys>; + }; + + touch0_fixed_3v3: regulator-5 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vio33_tp1"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpio =3D <&pio 119 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply =3D <®_vsys>; + }; + + usb_hub_fixed_3v3: regulator-6 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vhub_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpio =3D <&pio 112 GPIO_ACTIVE_HIGH>; /* HUB_3V3_EN */ + startup-delay-us =3D <10000>; + enable-active-high; + vin-supply =3D <®_vsys>; + }; + + usb_p0_vbus: regulator-7 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vbus_p0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&pio 84 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply =3D <®_vsys>; + }; + + usb_p1_vbus: regulator-8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vbus_p1"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&pio 87 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply =3D <®_vsys>; + }; + + /* used by ssusb2 */ + usb_p2_vbus: regulator-9 { + compatible =3D "regulator-fixed"; + regulator-name =3D "wifi_3v3"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + }; +}; + +&adsp { + memory-region =3D <&adsp_dma_mem>, <&adsp_mem>; + status =3D "okay"; +}; + +&afe { + memory-region =3D <&afe_dma_mem>; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&mt6359_vproc2_buck_reg>; + status =3D "okay"; +}; + +&i2c0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0_pins>; + clock-frequency =3D <400000>; + status =3D "okay"; + + touchscreen@5d { + compatible =3D "goodix,gt9271"; + reg =3D <0x5d>; + interrupt-parent =3D <&pio>; + interrupts-extended =3D <&pio 6 IRQ_TYPE_EDGE_RISING>; + irq-gpios =3D <&pio 6 GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&pio 5 GPIO_ACTIVE_HIGH>; + AVDD28-supply =3D <&touch0_fixed_3v3>; + VDDIO-supply =3D <&mt6359_vio18_ldo_reg>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&touch_pins>; + }; +}; + +&i2c1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1_pins>; + clock-frequency =3D <400000>; + status =3D "okay"; +}; + +&i2c2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c2_pins>; + clock-frequency =3D <400000>; + status =3D "okay"; +}; + +&i2c3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c3_pins>; + clock-frequency =3D <400000>; + status =3D "okay"; +}; + +&i2c4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c4_pins>; + clock-frequency =3D <1000000>; + status =3D "okay"; +}; + +&i2c5 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c5_pins>; + clock-frequency =3D <400000>; + status =3D "okay"; +}; + +&i2c6 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c6_pins>; + clock-frequency =3D <400000>; + status =3D "okay"; +}; + +&mfg0 { + domain-supply =3D <&mt6359_vproc2_buck_reg>; +}; + +&mfg1 { + domain-supply =3D <&mt6359_vsram_others_ldo_reg>; +}; + +&mmc0 { + status =3D "okay"; + pinctrl-names =3D "default", "state_uhs"; + pinctrl-0 =3D <&mmc0_default_pins>; + pinctrl-1 =3D <&mmc0_uhs_pins>; + bus-width =3D <8>; + max-frequency =3D <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + supports-cqe; + cap-mmc-hw-reset; + no-sdio; + no-sd; + hs400-ds-delay =3D <0x1481b>; + vmmc-supply =3D <&mt6359_vemc_1_ldo_reg>; + vqmmc-supply =3D <&mt6359_vufs_ldo_reg>; + non-removable; +}; + +&mmc1 { + status =3D "okay"; + pinctrl-names =3D "default", "state_uhs"; + pinctrl-0 =3D <&mmc1_default_pins>; + pinctrl-1 =3D <&mmc1_uhs_pins>; + bus-width =3D <4>; + max-frequency =3D <200000000>; + cap-sd-highspeed; + sd-uhs-sdr50; + sd-uhs-sdr104; + no-mmc; + no-sdio; + cd-gpios =3D <&pio 2 GPIO_ACTIVE_LOW>; + vmmc-supply =3D <&mt6359_vpa_buck_reg>; + vqmmc-supply =3D <&mt6359_vsim1_ldo_reg>; +}; + +&mt6359_vbbck_ldo_reg { + regulator-always-on; +}; + +&mt6359_vcn18_ldo_reg { + regulator-name =3D "vcn18_pmu"; + regulator-always-on; +}; + +&mt6359_vcn33_2_bt_ldo_reg { + regulator-name =3D "vcn33_2_pmu"; + regulator-always-on; +}; + +&mt6359_vcore_buck_reg { + regulator-name =3D "dvdd_proc_l"; + regulator-always-on; +}; + +&mt6359_vgpu11_buck_reg { + regulator-name =3D "dvdd_core"; + regulator-always-on; +}; + +&mt6359_vpa_buck_reg { + regulator-name =3D "vpa_pmu"; + regulator-max-microvolt =3D <3100000>; +}; + +&mt6359_vproc2_buck_reg { + /* The name "vgpu" is required by mtk-regulator-coupler */ + regulator-name =3D "vgpu"; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <800000>; + regulator-coupled-with =3D <&mt6359_vsram_others_ldo_reg>; + regulator-coupled-max-spread =3D <6250>; +}; + +&mt6359_vpu_buck_reg { + regulator-name =3D "dvdd_adsp"; + regulator-always-on; +}; + +&mt6359_vrf12_ldo_reg { + regulator-name =3D "va12_abb2_pmu"; + regulator-always-on; +}; + +&mt6359_vsim1_ldo_reg { + regulator-name =3D "vsim1_pmu"; + regulator-enable-ramp-delay =3D <480>; +}; + +&mt6359_vsram_others_ldo_reg { + /* The name "vsram_gpu" is required by mtk-regulator-coupler */ + regulator-name =3D "vsram_gpu"; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <800000>; + regulator-coupled-with =3D <&mt6359_vproc2_buck_reg>; + regulator-coupled-max-spread =3D <6250>; +}; + +&mt6359_vufs_ldo_reg { + regulator-name =3D "vufs18_pmu"; + regulator-always-on; +}; + +&mt6359codec { + mediatek,mic-type-0 =3D <1>; /* ACC */ + mediatek,mic-type-1 =3D <3>; /* DCC */ +}; + +&pcie { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie_pins_default>; + status =3D "okay"; +}; + +&pciephy { + status =3D "okay"; +}; + +&pio { + audio_default_pins: audio-default-pins { + pins-cmd-dat { + pinmux =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + + dptx_pins: dptx-pins { + pins-cmd-dat { + pinmux =3D ; + bias-pull-up; + }; + }; + + edp_panel_3v3_en_pins: edp-panel-3v3-en-pins { + pins1 { + pinmux =3D ; + output-high; + }; + }; + + eth_default_pins: eth-default-pins { + pins-cc { + pinmux =3D , + , + , + ; + drive-strength =3D <8>; + }; + + pins-mdio { + pinmux =3D , + ; + drive-strength =3D <8>; + input-enable; + }; + + pins-power { + pinmux =3D , + ; + output-high; + }; + + pins-rxd { + pinmux =3D , + , + , + ; + drive-strength =3D <8>; + }; + + pins-txd { + pinmux =3D , + , + , + ; + drive-strength =3D <8>; + }; + }; + + eth_sleep_pins: eth-sleep-pins { + pins-cc { + pinmux =3D , + , + , + ; + }; + + pins-mdio { + pinmux =3D , + ; + input-disable; + bias-disable; + }; + + pins-rxd { + pinmux =3D , + , + , + ; + }; + + pins-txd { + pinmux =3D , + , + , + ; + }; + }; + + i2c0_pins: i2c0-pins { + pins { + pinmux =3D , + ; + bias-pull-up =3D ; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c1_pins: i2c1-pins { + pins { + pinmux =3D , + ; + bias-pull-up =3D ; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c2_pins: i2c2-pins { + pins { + pinmux =3D , + ; + bias-pull-up =3D ; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c3_pins: i2c3-pins { + pins { + pinmux =3D , + ; + bias-pull-up =3D ; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c4_pins: i2c4-pins { + pins { + pinmux =3D , + ; + bias-pull-up =3D ; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c5_pins: i2c5-pins { + pins { + pinmux =3D , + ; + bias-pull-up =3D ; + drive-strength-microamp =3D <1000>; + }; + }; + + i2c6_pins: i2c6-pins { + pins { + pinmux =3D , + ; + bias-pull-up =3D ; + drive-strength-microamp =3D <1000>; + }; + }; + + gpio_key_pins: gpio-key-pins { + pins { + pinmux =3D , + , + ; + }; + }; + + mmc0_default_pins: mmc0-default-pins { + pins-clk { + pinmux =3D ; + drive-strength =3D <6>; + bias-pull-down =3D ; + }; + + pins-cmd-dat { + pinmux =3D , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + + pins-rst { + pinmux =3D ; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + }; + + mmc0_uhs_pins: mmc0-uhs-pins { + pins-clk { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-down =3D ; + }; + + pins-cmd-dat { + pinmux =3D , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength =3D <8>; + bias-pull-up =3D ; + }; + + pins-ds { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-down =3D ; + }; + + pins-rst { + pinmux =3D ; + drive-strength =3D <8>; + bias-pull-up =3D ; + }; + }; + + mmc1_default_pins: mmc1-default-pins { + pins-clk { + pinmux =3D ; + drive-strength =3D <6>; + bias-pull-down =3D ; + }; + + pins-cmd-dat { + pinmux =3D , + , + , + , + ; + input-enable; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + + pins-insert { + pinmux =3D ; + bias-pull-up; + }; + }; + + mmc1_uhs_pins: mmc1-uhs-pins { + pins-clk { + pinmux =3D ; + drive-strength =3D <6>; + bias-pull-down =3D ; + }; + + pins-cmd-dat { + pinmux =3D , + , + , + , + ; + input-enable; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + }; + + mmc2_default_pins: mmc2-default-pins { + pins-clk { + pinmux =3D ; + drive-strength =3D <4>; + bias-pull-down =3D ; + }; + + pins-cmd-dat { + pinmux =3D , + , + , + , + ; + input-enable; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + + pins-pcm { + pinmux =3D ; + }; + }; + + mmc2_uhs_pins: mmc2-uhs-pins { + pins-clk { + pinmux =3D ; + drive-strength =3D <4>; + bias-pull-down =3D ; + }; + + pins-cmd-dat { + pinmux =3D , + , + , + , + ; + input-enable; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + }; + + mmc2_eint_pins: mmc2-eint-pins { + pins-dat1 { + pinmux =3D ; + input-enable; + bias-pull-up =3D ; + }; + }; + + mmc2_dat1_pins: mmc2-dat1-pins { + pins-dat1 { + pinmux =3D ; + input-enable; + drive-strength =3D <6>; + bias-pull-up =3D ; + }; + }; + + panel_default_pins: panel-default-pins { + pins-dcdc { + pinmux =3D ; + output-low; + }; + + pins-en { + pinmux =3D ; + output-low; + }; + + pins-rst { + pinmux =3D ; + output-high; + }; + }; + + pcie_pins_default: pcie-default { + mux { + pinmux =3D , + , + ; + bias-pull-up; + }; + }; + + rt1715_int_pins: rt1715-int-pins { + pins_cmd0_dat { + pinmux =3D ; + bias-pull-up; + input-enable; + }; + }; + + spi0_pins: spi0-pins { + pins-spi { + pinmux =3D , + , + , + ; + bias-disable; + }; + }; + + spi1_pins: spi1-pins { + pins-spi { + pinmux =3D , + , + , + ; + bias-disable; + }; + }; + + spi2_pins: spi2-pins { + pins-spi { + pinmux =3D , + , + , + ; + bias-disable; + }; + }; + + touch_pins: touch-pins { + pins-irq { + pinmux =3D ; + input-enable; + bias-disable; + }; + + pins-reset { + pinmux =3D ; + output-high; + }; + }; + + uart0_pins: uart0-pins { + pins { + pinmux =3D , + ; + bias-pull-up; + }; + }; + + uart1_pins: uart1-pins { + pins { + pinmux =3D , + ; + bias-pull-up; + }; + }; + + uart2_pins: uart2-pins { + pins { + pinmux =3D , + ; + bias-pull-up; + }; + }; + + usb_default_pins: usb-default-pins { + pins-iddig { + pinmux =3D ; + input-enable; + bias-pull-up; + }; + + pins-valid { + pinmux =3D ; + input-enable; + }; + + pins-vbus { + pinmux =3D ; + output-high; + }; + + }; + + usb1_default_pins: usb1-default-pins { + pins-valid { + pinmux =3D ; + input-enable; + }; + + pins-usb-hub-3v3-en { + pinmux =3D ; + output-high; + }; + }; + + wifi_pwrseq_pins: wifi-pwrseq-pins { + pins-wifi-enable { + pinmux =3D ; + output-low; + }; + }; +}; + +ð { + phy-mode =3D"rgmii-id"; + phy-handle =3D <ðernet_phy0>; + pinctrl-names =3D "default", "sleep"; + pinctrl-0 =3D <ð_default_pins>; + pinctrl-1 =3D <ð_sleep_pins>; + mediatek,mac-wol; + snps,reset-gpio =3D <&pio 147 GPIO_ACTIVE_HIGH>; + snps,reset-delays-us =3D <0 10000 10000>; + status =3D "okay"; +}; + +ð_mdio { + ethernet_phy0: ethernet-phy@1 { + compatible =3D "ethernet-phy-id001c.c916"; + reg =3D <0x1>; + }; +}; + +&pmic { + interrupt-parent =3D <&pio>; + interrupts =3D <222 IRQ_TYPE_LEVEL_HIGH>; + + mt6359keys: keys { + compatible =3D "mediatek,mt6359-keys"; + mediatek,long-press-mode =3D <1>; + power-off-time-sec =3D <0>; + + power-key { + linux,keycodes =3D ; + wakeup-source; + }; + }; +}; + +&scp { + memory-region =3D <&scp_mem>; + status =3D "okay"; +}; + +&sound { + compatible =3D "mediatek,mt8390-mt6359-evk", "mediatek,mt8188-mt6359-evb"; + model =3D "mt8390-evk"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&audio_default_pins>; + audio-routing =3D + "Headphone", "Headphone L", + "Headphone", "Headphone R"; + mediatek,adsp =3D <&adsp>; + status =3D "okay"; + + dai-link-0 { + link-name =3D "DL_SRC_BE"; + + codec { + sound-dai =3D <&pmic 0>; + }; + }; +}; + +&spi2 { + pinctrl-0 =3D <&spi2_pins>; + pinctrl-names =3D "default"; + mediatek,pad-select =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; +}; + +&uart0 { + pinctrl-0 =3D <&uart0_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&uart1 { + pinctrl-0 =3D <&uart1_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&uart2 { + pinctrl-0 =3D <&uart2_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&u3phy0 { + status =3D "okay"; +}; + +&u3phy1 { + status =3D "okay"; +}; + +&u3phy2 { + status =3D "okay"; +}; + +&xhci0 { + status =3D "okay"; + vusb33-supply =3D <&mt6359_vusb_ldo_reg>; +}; + +&xhci1 { + status =3D "okay"; + vusb33-supply =3D <&mt6359_vusb_ldo_reg>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + hub_2_0: hub@1 { + compatible =3D "usb451,8025"; + reg =3D <1>; + peer-hub =3D <&hub_3_0>; + reset-gpios =3D <&pio 7 GPIO_ACTIVE_HIGH>; + vdd-supply =3D <&usb_hub_fixed_3v3>; + }; + + hub_3_0: hub@2 { + compatible =3D "usb451,8027"; + reg =3D <2>; + peer-hub =3D <&hub_2_0>; + reset-gpios =3D <&pio 7 GPIO_ACTIVE_HIGH>; + vdd-supply =3D <&usb_hub_fixed_3v3>; + }; +}; + +&xhci2 { + status =3D "okay"; + vusb33-supply =3D <&mt6359_vusb_ldo_reg>; + vbus-supply =3D <&sdio_fixed_3v3>; /* wifi_3v3 */ +}; --=20 2.48.0 From nobody Wed Feb 5 20:32:09 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6267B24168A; Wed, 15 Jan 2025 10:29:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; 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Wed, 15 Jan 2025 11:29:43 +0100 (CET) From: Louis-Alexis Eyraud Date: Wed, 15 Jan 2025 11:29:05 +0100 Subject: [PATCH v2 4/4] arm64: dts: mediatek: add device-tree for Genio 510 EVK board Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250115-dts_mt8370-genio-510-v2-4-fc9b01d08834@collabora.com> References: <20250115-dts_mt8370-genio-510-v2-0-fc9b01d08834@collabora.com> In-Reply-To: <20250115-dts_mt8370-genio-510-v2-0-fc9b01d08834@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Sean Wang Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, Louis-Alexis Eyraud X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1736936976; l=2890; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=vYUmyhuOJQnrwxQ2P5C/EI1ew8zRUHoQg3KS4baBR74=; b=8dXxL1PAcD6gY53ZeZi5gctjQ99oX4rNPm+G8jlUv6Hx86p0hL4W753jV7Gm6UBEwAXmqZbej vzeLhFtml/lB3iBQizjVVWnoa0XaKBv0Ag2RLQTe7t8Pv4xQEUlUuzm X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= This commit adds a basic device-tree (mt8370-genio-510-evk.dts) in order to be able to boot the Genio 510 EVK board, based on MediaTek MT8370 SoC. As being very close to the Genio 700 EVK board, the dts includes mt8390-genio-common.dtsi file to use common definitions. The Genio 510 EVK has following features: - MT8370 SoC - MT6365 PMIC - MT6319 Buck IC - 4GB LPDDR4X - 64GB eMMC 5.1 - 12V DC Jack - Micro SD card slot - Push Button x 4 (Power, Reset, Download and Home Key) - LED x 4 (Power, Reset, System on and Charging Status) - USB Device Port x 1 (Micro USB Connector) - USB Host Port x 1 (Type-C USB Connector) - 3.5mm Earphone Jack x 1 (with Microphone Input) - 3.5mm Line Out Audio Jack x 1 - Analog Microphone x 1 - Digital Microphone x 2 - Gigabit Ethernet with RJ45 connector - HDMI 2.0 TX port with Type A HDMI connector - eDP port - 3x UART with serial-to-usb converters and micro USB connectors - M.2 Slot x 2 - I2C Capacitive Touch Pad - 4-Lane DSI x 2 - 4-Data Lane CSI x 2 - I2S Pin header - 40-Pin 2.54mm Pin Header x 1 Signed-off-by: Louis-Alexis Eyraud Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dts | 19 +++++++++++++++= ++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/me= diatek/Makefile index b763b73788a45af0a4ea773d308734fa128272f8..ae1147eca9a915f117487101e2a= d4acead97adfe 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -95,6 +95,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-cherry-tomato-r3.= dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-demo.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8365-evk.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8370-genio-510-evk.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8395-genio-1200-evk.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8390-genio-700-evk.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8395-kontron-3-5-sbc-i1200.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dts b/arch/a= rm64/boot/dts/mediatek/mt8370-genio-510-evk.dts new file mode 100644 index 0000000000000000000000000000000000000000..71a8cbed1df6a1d976e7dc8ccaf= ac3c21b04614b --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8370-genio-510-evk.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (c) 2025 Collabora Ltd. + * Author: Louis-Alexis Eyraud + */ +/dts-v1/; + +#include "mt8370.dtsi" +#include "mt8390-genio-common.dtsi" + +/ { + model =3D "MediaTek Genio-510 EVK"; + compatible =3D "mediatek,mt8370-evk", "mediatek,mt8370", "mediatek,mt8188= "; + + memory@40000000 { + device_type =3D "memory"; + reg =3D <0 0x40000000 0x1 0x00000000>; + }; +}; --=20 2.48.0