From nobody Tue Dec 16 07:21:24 2025 Received: from exchange.fintech.ru (exchange.fintech.ru [195.54.195.159]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF662132122 for ; Tue, 14 Jan 2025 14:00:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.54.195.159 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736863224; cv=none; b=Oy6paowh02Yotj5Qxuz+QYUxUvkKt9TQ3TuJAghQYg5M0ftji/kW+uciwArx1sOzwj9EUoCjI4ap8h5pJbuTdcY6brFANddBn49JkUetw6z+Op7i8ccqmdQjnwt+0ebOKhJCoixN21T18V3fdeXtgmg1jo5bJAeE3sNHAsH7Tj0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736863224; c=relaxed/simple; bh=kfU1FcVEAOSUyi8ts3V4Czw/xE1dxo9CFUpr/i6Hg3E=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=ZM6hF3I7Pb62PV1CTZNbBC+AtKylokcW0Vn164+1ogN7uCdPJFrFJSwBao9Fi8qov6SdU/I6JheHL0vZV+Is44cxMEONaknHsZG2pi97BsudaTubi0NvEaBVIS0DMPrTBE9I15C1ZBmQdDKMdpWK0+dQ/joc/q3uscmqFR6EeXo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fintech.ru; spf=pass smtp.mailfrom=fintech.ru; arc=none smtp.client-ip=195.54.195.159 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fintech.ru Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fintech.ru Received: from Ex16-01.fintech.ru (10.0.10.18) by exchange.fintech.ru (195.54.195.169) with Microsoft SMTP Server (TLS) id 14.3.498.0; Tue, 14 Jan 2025 16:59:03 +0300 Received: from localhost (10.0.253.138) by Ex16-01.fintech.ru (10.0.10.18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.4; Tue, 14 Jan 2025 16:59:02 +0300 From: Nikita Zhandarovich To: Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= CC: Nikita Zhandarovich , Xinhui Pan , David Airlie , Simona Vetter , , , , Subject: [PATCH] drm/radeon/ci_dpm: Remove needless NULL checks of dpm tables Date: Tue, 14 Jan 2025 05:58:56 -0800 Message-ID: <20250114135856.16192-1-n.zhandarovich@fintech.ru> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: Ex16-02.fintech.ru (10.0.10.19) To Ex16-01.fintech.ru (10.0.10.18) Content-Type: text/plain; charset="utf-8" This patch removes useless NULL pointer checks in functions like ci_set_private_data_variables_based_on_pptable() and ci_setup_default_dpm_tables(). The pointers in question are initialized as addresses to existing structures such as rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk by utilizing & operator and therefore are not in danger of being NULL. Fix this by removing extra checks thus cleaning the code a tiny bit. Found by Linux Verification Center (linuxtesting.org) with static analysis tool SVACE. Fixes: cc8dbbb4f62a ("drm/radeon: add dpm support for CI dGPUs (v2)") Signed-off-by: Nikita Zhandarovich --- drivers/gpu/drm/radeon/ci_dpm.c | 34 ++++++++++------------------------ 1 file changed, 10 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dp= m.c index abe9d65cc460..7c3a960f486a 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c @@ -3405,12 +3405,8 @@ static int ci_setup_default_dpm_tables(struct radeon= _device *rdev) &rdev->pm.dpm.dyn_state.cac_leakage_table; u32 i; =20 - if (allowed_sclk_vddc_table =3D=3D NULL) - return -EINVAL; if (allowed_sclk_vddc_table->count < 1) return -EINVAL; - if (allowed_mclk_table =3D=3D NULL) - return -EINVAL; if (allowed_mclk_table->count < 1) return -EINVAL; =20 @@ -3468,24 +3464,20 @@ static int ci_setup_default_dpm_tables(struct radeo= n_device *rdev) pi->dpm_table.vddc_table.count =3D allowed_sclk_vddc_table->count; =20 allowed_mclk_table =3D &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk; - if (allowed_mclk_table) { - for (i =3D 0; i < allowed_mclk_table->count; i++) { - pi->dpm_table.vddci_table.dpm_levels[i].value =3D - allowed_mclk_table->entries[i].v; - pi->dpm_table.vddci_table.dpm_levels[i].enabled =3D true; - } - pi->dpm_table.vddci_table.count =3D allowed_mclk_table->count; + for (i =3D 0; i < allowed_mclk_table->count; i++) { + pi->dpm_table.vddci_table.dpm_levels[i].value =3D + allowed_mclk_table->entries[i].v; + pi->dpm_table.vddci_table.dpm_levels[i].enabled =3D true; } + pi->dpm_table.vddci_table.count =3D allowed_mclk_table->count; =20 allowed_mclk_table =3D &rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk; - if (allowed_mclk_table) { - for (i =3D 0; i < allowed_mclk_table->count; i++) { - pi->dpm_table.mvdd_table.dpm_levels[i].value =3D - allowed_mclk_table->entries[i].v; - pi->dpm_table.mvdd_table.dpm_levels[i].enabled =3D true; - } - pi->dpm_table.mvdd_table.count =3D allowed_mclk_table->count; + for (i =3D 0; i < allowed_mclk_table->count; i++) { + pi->dpm_table.mvdd_table.dpm_levels[i].value =3D + allowed_mclk_table->entries[i].v; + pi->dpm_table.mvdd_table.dpm_levels[i].enabled =3D true; } + pi->dpm_table.mvdd_table.count =3D allowed_mclk_table->count; =20 ci_setup_default_pcie_tables(rdev); =20 @@ -4880,16 +4872,10 @@ static int ci_set_private_data_variables_based_on_p= ptable(struct radeon_device * struct radeon_clock_voltage_dependency_table *allowed_mclk_vddci_table = =3D &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk; =20 - if (allowed_sclk_vddc_table =3D=3D NULL) - return -EINVAL; if (allowed_sclk_vddc_table->count < 1) return -EINVAL; - if (allowed_mclk_vddc_table =3D=3D NULL) - return -EINVAL; if (allowed_mclk_vddc_table->count < 1) return -EINVAL; - if (allowed_mclk_vddci_table =3D=3D NULL) - return -EINVAL; if (allowed_mclk_vddci_table->count < 1) return -EINVAL;