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Tue, 14 Jan 2025 14:58:18 -0800 (PST) From: Atish Patra Date: Tue, 14 Jan 2025 14:57:26 -0800 Subject: [PATCH v2 01/21] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware aware grouping Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250114-counter_delegation-v2-1-8ba74cdb851b@rivosinc.com> References: <20250114-counter_delegation-v2-0-8ba74cdb851b@rivosinc.com> In-Reply-To: <20250114-counter_delegation-v2-0-8ba74cdb851b@rivosinc.com> To: Paul Walmsley , Palmer Dabbelt , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Anup Patel , Atish Patra , Will Deacon , Mark Rutland , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , weilin.wang@intel.com Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , Conor Dooley , devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, Atish Patra X-Mailer: b4 0.15-dev-13183 From: Weilin Wang These functions are added to parse event counter restrictions and counter availability info from json files so that the metric grouping method could do grouping based on the counter restriction of events and the counters that are available on the system. Signed-off-by: Weilin Wang --- tools/perf/pmu-events/empty-pmu-events.c | 299 ++++++++++++++++++++-------= ---- tools/perf/pmu-events/jevents.py | 205 ++++++++++++++++++++- tools/perf/pmu-events/pmu-events.h | 32 +++- 3 files changed, 419 insertions(+), 117 deletions(-) diff --git a/tools/perf/pmu-events/empty-pmu-events.c b/tools/perf/pmu-even= ts/empty-pmu-events.c index 1c7a2cfa321f..3a7ec31576f5 100644 --- a/tools/perf/pmu-events/empty-pmu-events.c +++ b/tools/perf/pmu-events/empty-pmu-events.c @@ -20,73 +20,73 @@ struct pmu_table_entry { =20 static const char *const big_c_string =3D /* offset=3D0 */ "tool\000" -/* offset=3D5 */ "duration_time\000tool\000Wall clock interval time in nan= oseconds\000config=3D1\000\00000\000\000" -/* offset=3D78 */ "user_time\000tool\000User (non-kernel) time in nanoseco= nds\000config=3D2\000\00000\000\000" -/* offset=3D145 */ "system_time\000tool\000System/kernel time in nanosecon= ds\000config=3D3\000\00000\000\000" -/* offset=3D210 */ "has_pmem\000tool\0001 if persistent memory installed o= therwise 0\000config=3D4\000\00000\000\000" -/* offset=3D283 */ "num_cores\000tool\000Number of cores. A core consists = of 1 or more thread, with each thread being associated with a logical Linux= CPU\000config=3D5\000\00000\000\000" -/* offset=3D425 */ "num_cpus\000tool\000Number of logical Linux CPUs. Ther= e may be multiple such CPUs on a core\000config=3D6\000\00000\000\000" -/* offset=3D525 */ "num_cpus_online\000tool\000Number of online logical Li= nux CPUs. There may be multiple such CPUs on a core\000config=3D7\000\00000= \000\000" -/* offset=3D639 */ "num_dies\000tool\000Number of dies. Each die has 1 or = more cores\000config=3D8\000\00000\000\000" -/* offset=3D712 */ "num_packages\000tool\000Number of packages. Each packa= ge has 1 or more die\000config=3D9\000\00000\000\000" -/* offset=3D795 */ "slots\000tool\000Number of functional units that in pa= rallel can execute parts of an instruction\000config=3D0xa\000\00000\000\00= 0" -/* offset=3D902 */ "smt_on\000tool\0001 if simultaneous multithreading (ak= a hyperthreading) is enable otherwise 0\000config=3D0xb\000\00000\000\000" -/* offset=3D1006 */ "system_tsc_freq\000tool\000The amount a Time Stamp Co= unter (TSC) increases per second\000config=3D0xc\000\00000\000\000" -/* offset=3D1102 */ "default_core\000" -/* offset=3D1115 */ "bp_l1_btb_correct\000branch\000L1 BTB Correction\000e= vent=3D0x8a\000\00000\000\000" -/* offset=3D1174 */ "bp_l2_btb_correct\000branch\000L2 BTB Correction\000e= vent=3D0x8b\000\00000\000\000" -/* offset=3D1233 */ "l3_cache_rd\000cache\000L3 cache access, read\000even= t=3D0x40\000\00000\000Attributable Level 3 cache access, read\000" -/* offset=3D1328 */ "segment_reg_loads.any\000other\000Number of segment r= egister loads\000event=3D6,period=3D200000,umask=3D0x80\000\00000\000\000" -/* offset=3D1427 */ "dispatch_blocked.any\000other\000Memory cluster signa= ls to block micro-op dispatch for any reason\000event=3D9,period=3D200000,u= mask=3D0x20\000\00000\000\000" -/* offset=3D1557 */ "eist_trans\000other\000Number of Enhanced Intel Speed= Step(R) Technology (EIST) transitions\000event=3D0x3a,period=3D200000\000\0= 0000\000\000" -/* offset=3D1672 */ "hisi_sccl,ddrc\000" -/* offset=3D1687 */ "uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write co= mmands\000event=3D2\000\00000\000DDRC write commands\000" -/* offset=3D1773 */ "uncore_cbox\000" -/* offset=3D1785 */ "unc_cbo_xsnp_response.miss_eviction\000uncore\000A cr= oss-core snoop resulted from L3 Eviction which misses in some processor cor= e\000event=3D0x22,umask=3D0x81\000\00000\000A cross-core snoop resulted fro= m L3 Eviction which misses in some processor core\000" -/* offset=3D2016 */ "event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=3D0= xe0\000\00000\000UNC_CBO_HYPHEN\000" -/* offset=3D2081 */ "event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event= =3D0xc0\000\00000\000UNC_CBO_TWO_HYPH\000" -/* offset=3D2152 */ "hisi_sccl,l3c\000" -/* offset=3D2166 */ "uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read = hits\000event=3D7\000\00000\000Total read hits\000" -/* offset=3D2246 */ "uncore_imc_free_running\000" -/* offset=3D2270 */ "uncore_imc_free_running.cache_miss\000uncore\000Total= cache misses\000event=3D0x12\000\00000\000Total cache misses\000" -/* offset=3D2365 */ "uncore_imc\000" -/* offset=3D2376 */ "uncore_imc.cache_hits\000uncore\000Total cache hits\0= 00event=3D0x34\000\00000\000Total cache hits\000" -/* offset=3D2454 */ "uncore_sys_ddr_pmu\000" -/* offset=3D2473 */ "sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycle= s event\000event=3D0x2b\000v8\00000\000\000" -/* offset=3D2546 */ "uncore_sys_ccn_pmu\000" -/* offset=3D2565 */ "sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles = event\000config=3D0x2c\0000x01\00000\000\000" -/* offset=3D2639 */ "uncore_sys_cmn_pmu\000" -/* offset=3D2658 */ "sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total = cache misses in first lookup result (high priority)\000eventid=3D1,type=3D5= \000(434|436|43c|43a).*\00000\000\000" -/* offset=3D2798 */ "CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000" -/* offset=3D2820 */ "IPC\000group1\000inst_retired.any / cpu_clk_unhalted.= thread\000\000\000\000\000\000\000\00000" -/* offset=3D2883 */ "Frontend_Bound_SMT\000\000idq_uops_not_delivered.core= / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_act= ive / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\00000" -/* offset=3D3049 */ "dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_re= tired.any\000\000\000\000\000\000\000\00000" -/* offset=3D3113 */ "icache_miss_cycles\000\000l1i\\-loads\\-misses / inst= _retired.any\000\000\000\000\000\000\000\00000" -/* offset=3D3180 */ "cache_miss_cycles\000group1\000dcache_miss_cpi + icac= he_miss_cycles\000\000\000\000\000\000\000\00000" -/* offset=3D3251 */ "DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit= + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\00000" -/* offset=3D3345 */ "DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_dat= a_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_mi= ss\000\000\000\000\000\000\000\00000" -/* offset=3D3479 */ "DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_A= ll_Miss\000\000\000\000\000\000\000\00000" -/* offset=3D3543 */ "DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCa= che_L2_All)\000\000\000\000\000\000\000\00000" -/* offset=3D3611 */ "DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, D= Cache_L2_All)\000\000\000\000\000\000\000\00000" -/* offset=3D3681 */ "M1\000\000ipc + M2\000\000\000\000\000\000\000\00000" -/* offset=3D3703 */ "M2\000\000ipc + M1\000\000\000\000\000\000\000\00000" -/* offset=3D3725 */ "M3\000\0001 / M3\000\000\000\000\000\000\000\00000" -/* offset=3D3745 */ "L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 /= duration_time\000\000\000\000\000\000\000\00000" +/* offset=3D5 */ "duration_time\000tool\000Wall clock interval time in nan= oseconds\000config=3D1\000\00000\000\000\000" +/* offset=3D79 */ "user_time\000tool\000User (non-kernel) time in nanoseco= nds\000config=3D2\000\00000\000\000\000" +/* offset=3D147 */ "system_time\000tool\000System/kernel time in nanosecon= ds\000config=3D3\000\00000\000\000\000" +/* offset=3D213 */ "has_pmem\000tool\0001 if persistent memory installed o= therwise 0\000config=3D4\000\00000\000\000\000" +/* offset=3D287 */ "num_cores\000tool\000Number of cores. A core consists = of 1 or more thread, with each thread being associated with a logical Linux= CPU\000config=3D5\000\00000\000\000\000" +/* offset=3D430 */ "num_cpus\000tool\000Number of logical Linux CPUs. Ther= e may be multiple such CPUs on a core\000config=3D6\000\00000\000\000\000" +/* offset=3D531 */ "num_cpus_online\000tool\000Number of online logical Li= nux CPUs. There may be multiple such CPUs on a core\000config=3D7\000\00000= \000\000\000" +/* offset=3D646 */ "num_dies\000tool\000Number of dies. Each die has 1 or = more cores\000config=3D8\000\00000\000\000\000" +/* offset=3D720 */ "num_packages\000tool\000Number of packages. Each packa= ge has 1 or more die\000config=3D9\000\00000\000\000\000" +/* offset=3D804 */ "slots\000tool\000Number of functional units that in pa= rallel can execute parts of an instruction\000config=3D0xa\000\00000\000\00= 0\000" +/* offset=3D912 */ "smt_on\000tool\0001 if simultaneous multithreading (ak= a hyperthreading) is enable otherwise 0\000config=3D0xb\000\00000\000\000\0= 00" +/* offset=3D1017 */ "system_tsc_freq\000tool\000The amount a Time Stamp Co= unter (TSC) increases per second\000config=3D0xc\000\00000\000\000\000" +/* offset=3D1114 */ "default_core\000" +/* offset=3D1127 */ "bp_l1_btb_correct\000branch\000L1 BTB Correction\000e= vent=3D0x8a\000\00000\000\000\000" +/* offset=3D1187 */ "bp_l2_btb_correct\000branch\000L2 BTB Correction\000e= vent=3D0x8b\000\00000\000\000\000" +/* offset=3D1247 */ "l3_cache_rd\000cache\000L3 cache access, read\000even= t=3D0x40\000\00000\000Attributable Level 3 cache access, read\000\000" +/* offset=3D1343 */ "segment_reg_loads.any\000other\000Number of segment r= egister loads\000event=3D6,period=3D200000,umask=3D0x80\000\00000\000\0000,= 1\000" +/* offset=3D1446 */ "dispatch_blocked.any\000other\000Memory cluster signa= ls to block micro-op dispatch for any reason\000event=3D9,period=3D200000,u= mask=3D0x20\000\00000\000\0000,1\000" +/* offset=3D1580 */ "eist_trans\000other\000Number of Enhanced Intel Speed= Step(R) Technology (EIST) transitions\000event=3D0x3a,period=3D200000\000\0= 0000\000\0000,1\000" +/* offset=3D1699 */ "hisi_sccl,ddrc\000" +/* offset=3D1714 */ "uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write co= mmands\000event=3D2\000\00000\000DDRC write commands\000\000" +/* offset=3D1801 */ "uncore_cbox\000" +/* offset=3D1813 */ "unc_cbo_xsnp_response.miss_eviction\000uncore\000A cr= oss-core snoop resulted from L3 Eviction which misses in some processor cor= e\000event=3D0x22,umask=3D0x81\000\00000\000A cross-core snoop resulted fro= m L3 Eviction which misses in some processor core\0000,1\000" +/* offset=3D2048 */ "event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=3D0= xe0\000\00000\000UNC_CBO_HYPHEN\000\000" +/* offset=3D2114 */ "event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event= =3D0xc0\000\00000\000UNC_CBO_TWO_HYPH\000\000" +/* offset=3D2186 */ "hisi_sccl,l3c\000" +/* offset=3D2200 */ "uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read = hits\000event=3D7\000\00000\000Total read hits\000\000" +/* offset=3D2281 */ "uncore_imc_free_running\000" +/* offset=3D2305 */ "uncore_imc_free_running.cache_miss\000uncore\000Total= cache misses\000event=3D0x12\000\00000\000Total cache misses\000\000" +/* offset=3D2401 */ "uncore_imc\000" +/* offset=3D2412 */ "uncore_imc.cache_hits\000uncore\000Total cache hits\0= 00event=3D0x34\000\00000\000Total cache hits\000\000" +/* offset=3D2491 */ "uncore_sys_ddr_pmu\000" +/* offset=3D2510 */ "sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycle= s event\000event=3D0x2b\000v8\00000\000\000\000" +/* offset=3D2584 */ "uncore_sys_ccn_pmu\000" +/* offset=3D2603 */ "sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles = event\000config=3D0x2c\0000x01\00000\000\000\000" +/* offset=3D2678 */ "uncore_sys_cmn_pmu\000" +/* offset=3D2697 */ "sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total = cache misses in first lookup result (high priority)\000eventid=3D1,type=3D5= \000(434|436|43c|43a).*\00000\000\000\000" +/* offset=3D2838 */ "CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000" +/* offset=3D2860 */ "IPC\000group1\000inst_retired.any / cpu_clk_unhalted.= thread\000\000\000\000\000\000\000\00000" +/* offset=3D2923 */ "Frontend_Bound_SMT\000\000idq_uops_not_delivered.core= / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_act= ive / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\00000" +/* offset=3D3089 */ "dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_re= tired.any\000\000\000\000\000\000\000\00000" +/* offset=3D3153 */ "icache_miss_cycles\000\000l1i\\-loads\\-misses / inst= _retired.any\000\000\000\000\000\000\000\00000" +/* offset=3D3220 */ "cache_miss_cycles\000group1\000dcache_miss_cpi + icac= he_miss_cycles\000\000\000\000\000\000\000\00000" +/* offset=3D3291 */ "DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit= + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\00000" +/* offset=3D3385 */ "DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_dat= a_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_mi= ss\000\000\000\000\000\000\000\00000" +/* offset=3D3519 */ "DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_A= ll_Miss\000\000\000\000\000\000\000\00000" +/* offset=3D3583 */ "DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCa= che_L2_All)\000\000\000\000\000\000\000\00000" +/* offset=3D3651 */ "DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, D= Cache_L2_All)\000\000\000\000\000\000\000\00000" +/* offset=3D3721 */ "M1\000\000ipc + M2\000\000\000\000\000\000\000\00000" +/* offset=3D3743 */ "M2\000\000ipc + M1\000\000\000\000\000\000\000\00000" +/* offset=3D3765 */ "M3\000\0001 / M3\000\000\000\000\000\000\000\00000" +/* offset=3D3785 */ "L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 /= duration_time\000\000\000\000\000\000\000\00000" ; =20 static const struct compact_pmu_event pmu_events__common_tool[] =3D { -{ 5 }, /* duration_time\000tool\000Wall clock interval time in nanoseconds= \000config=3D1\000\00000\000\000 */ -{ 210 }, /* has_pmem\000tool\0001 if persistent memory installed otherwise= 0\000config=3D4\000\00000\000\000 */ -{ 283 }, /* num_cores\000tool\000Number of cores. A core consists of 1 or = more thread, with each thread being associated with a logical Linux CPU\000= config=3D5\000\00000\000\000 */ -{ 425 }, /* num_cpus\000tool\000Number of logical Linux CPUs. There may be= multiple such CPUs on a core\000config=3D6\000\00000\000\000 */ -{ 525 }, /* num_cpus_online\000tool\000Number of online logical Linux CPUs= . There may be multiple such CPUs on a core\000config=3D7\000\00000\000\000= */ -{ 639 }, /* num_dies\000tool\000Number of dies. Each die has 1 or more cor= es\000config=3D8\000\00000\000\000 */ -{ 712 }, /* num_packages\000tool\000Number of packages. Each package has 1= or more die\000config=3D9\000\00000\000\000 */ -{ 795 }, /* slots\000tool\000Number of functional units that in parallel c= an execute parts of an instruction\000config=3D0xa\000\00000\000\000 */ -{ 902 }, /* smt_on\000tool\0001 if simultaneous multithreading (aka hypert= hreading) is enable otherwise 0\000config=3D0xb\000\00000\000\000 */ -{ 145 }, /* system_time\000tool\000System/kernel time in nanoseconds\000co= nfig=3D3\000\00000\000\000 */ -{ 1006 }, /* system_tsc_freq\000tool\000The amount a Time Stamp Counter (T= SC) increases per second\000config=3D0xc\000\00000\000\000 */ -{ 78 }, /* user_time\000tool\000User (non-kernel) time in nanoseconds\000c= onfig=3D2\000\00000\000\000 */ +{ 5 }, /* duration_time\000tool\000Wall clock interval time in nanoseconds= \000config=3D1\000\00000\000\000\000 */ +{ 213 }, /* has_pmem\000tool\0001 if persistent memory installed otherwise= 0\000config=3D4\000\00000\000\000\000 */ +{ 287 }, /* num_cores\000tool\000Number of cores. A core consists of 1 or = more thread, with each thread being associated with a logical Linux CPU\000= config=3D5\000\00000\000\000\000 */ +{ 430 }, /* num_cpus\000tool\000Number of logical Linux CPUs. There may be= multiple such CPUs on a core\000config=3D6\000\00000\000\000\000 */ +{ 531 }, /* num_cpus_online\000tool\000Number of online logical Linux CPUs= . There may be multiple such CPUs on a core\000config=3D7\000\00000\000\000= \000 */ +{ 646 }, /* num_dies\000tool\000Number of dies. Each die has 1 or more cor= es\000config=3D8\000\00000\000\000\000 */ +{ 720 }, /* num_packages\000tool\000Number of packages. Each package has 1= or more die\000config=3D9\000\00000\000\000\000 */ +{ 804 }, /* slots\000tool\000Number of functional units that in parallel c= an execute parts of an instruction\000config=3D0xa\000\00000\000\000\000 */ +{ 912 }, /* smt_on\000tool\0001 if simultaneous multithreading (aka hypert= hreading) is enable otherwise 0\000config=3D0xb\000\00000\000\000\000 */ +{ 147 }, /* system_time\000tool\000System/kernel time in nanoseconds\000co= nfig=3D3\000\00000\000\000\000 */ +{ 1017 }, /* system_tsc_freq\000tool\000The amount a Time Stamp Counter (T= SC) increases per second\000config=3D0xc\000\00000\000\000\000 */ +{ 79 }, /* user_time\000tool\000User (non-kernel) time in nanoseconds\000c= onfig=3D2\000\00000\000\000\000 */ =20 }; =20 @@ -99,29 +99,29 @@ const struct pmu_table_entry pmu_events__common[] =3D { }; =20 static const struct compact_pmu_event pmu_events__test_soc_cpu_default_cor= e[] =3D { -{ 1115 }, /* bp_l1_btb_correct\000branch\000L1 BTB Correction\000event=3D0= x8a\000\00000\000\000 */ -{ 1174 }, /* bp_l2_btb_correct\000branch\000L2 BTB Correction\000event=3D0= x8b\000\00000\000\000 */ -{ 1427 }, /* dispatch_blocked.any\000other\000Memory cluster signals to bl= ock micro-op dispatch for any reason\000event=3D9,period=3D200000,umask=3D0= x20\000\00000\000\000 */ -{ 1557 }, /* eist_trans\000other\000Number of Enhanced Intel SpeedStep(R) = Technology (EIST) transitions\000event=3D0x3a,period=3D200000\000\00000\000= \000 */ -{ 1233 }, /* l3_cache_rd\000cache\000L3 cache access, read\000event=3D0x40= \000\00000\000Attributable Level 3 cache access, read\000 */ -{ 1328 }, /* segment_reg_loads.any\000other\000Number of segment register = loads\000event=3D6,period=3D200000,umask=3D0x80\000\00000\000\000 */ +{ 1127 }, /* bp_l1_btb_correct\000branch\000L1 BTB Correction\000event=3D0= x8a\000\00000\000\000\000 */ +{ 1187 }, /* bp_l2_btb_correct\000branch\000L2 BTB Correction\000event=3D0= x8b\000\00000\000\000\000 */ +{ 1446 }, /* dispatch_blocked.any\000other\000Memory cluster signals to bl= ock micro-op dispatch for any reason\000event=3D9,period=3D200000,umask=3D0= x20\000\00000\000\0000,1\000 */ +{ 1580 }, /* eist_trans\000other\000Number of Enhanced Intel SpeedStep(R) = Technology (EIST) transitions\000event=3D0x3a,period=3D200000\000\00000\000= \0000,1\000 */ +{ 1247 }, /* l3_cache_rd\000cache\000L3 cache access, read\000event=3D0x40= \000\00000\000Attributable Level 3 cache access, read\000\000 */ +{ 1343 }, /* segment_reg_loads.any\000other\000Number of segment register = loads\000event=3D6,period=3D200000,umask=3D0x80\000\00000\000\0000,1\000 */ }; static const struct compact_pmu_event pmu_events__test_soc_cpu_hisi_sccl_d= drc[] =3D { -{ 1687 }, /* uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write commands\0= 00event=3D2\000\00000\000DDRC write commands\000 */ +{ 1714 }, /* uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write commands\0= 00event=3D2\000\00000\000DDRC write commands\000\000 */ }; static const struct compact_pmu_event pmu_events__test_soc_cpu_hisi_sccl_l= 3c[] =3D { -{ 2166 }, /* uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read hits\000= event=3D7\000\00000\000Total read hits\000 */ +{ 2200 }, /* uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read hits\000= event=3D7\000\00000\000Total read hits\000\000 */ }; static const struct compact_pmu_event pmu_events__test_soc_cpu_uncore_cbox= [] =3D { -{ 2016 }, /* event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=3D0xe0\000\= 00000\000UNC_CBO_HYPHEN\000 */ -{ 2081 }, /* event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event=3D0xc0\= 000\00000\000UNC_CBO_TWO_HYPH\000 */ -{ 1785 }, /* unc_cbo_xsnp_response.miss_eviction\000uncore\000A cross-core= snoop resulted from L3 Eviction which misses in some processor core\000eve= nt=3D0x22,umask=3D0x81\000\00000\000A cross-core snoop resulted from L3 Evi= ction which misses in some processor core\000 */ +{ 2048 }, /* event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=3D0xe0\000\= 00000\000UNC_CBO_HYPHEN\000\000 */ +{ 2114 }, /* event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event=3D0xc0\= 000\00000\000UNC_CBO_TWO_HYPH\000\000 */ +{ 1813 }, /* unc_cbo_xsnp_response.miss_eviction\000uncore\000A cross-core= snoop resulted from L3 Eviction which misses in some processor core\000eve= nt=3D0x22,umask=3D0x81\000\00000\000A cross-core snoop resulted from L3 Evi= ction which misses in some processor core\0000,1\000 */ }; static const struct compact_pmu_event pmu_events__test_soc_cpu_uncore_imc[= ] =3D { -{ 2376 }, /* uncore_imc.cache_hits\000uncore\000Total cache hits\000event= =3D0x34\000\00000\000Total cache hits\000 */ +{ 2412 }, /* uncore_imc.cache_hits\000uncore\000Total cache hits\000event= =3D0x34\000\00000\000Total cache hits\000\000 */ }; static const struct compact_pmu_event pmu_events__test_soc_cpu_uncore_imc_= free_running[] =3D { -{ 2270 }, /* uncore_imc_free_running.cache_miss\000uncore\000Total cache m= isses\000event=3D0x12\000\00000\000Total cache misses\000 */ +{ 2305 }, /* uncore_imc_free_running.cache_miss\000uncore\000Total cache m= isses\000event=3D0x12\000\00000\000Total cache misses\000\000 */ =20 }; =20 @@ -129,51 +129,51 @@ const struct pmu_table_entry pmu_events__test_soc_cpu= [] =3D { { .entries =3D pmu_events__test_soc_cpu_default_core, .num_entries =3D ARRAY_SIZE(pmu_events__test_soc_cpu_default_core), - .pmu_name =3D { 1102 /* default_core\000 */ }, + .pmu_name =3D { 1114 /* default_core\000 */ }, }, { .entries =3D pmu_events__test_soc_cpu_hisi_sccl_ddrc, .num_entries =3D ARRAY_SIZE(pmu_events__test_soc_cpu_hisi_sccl_ddrc), - .pmu_name =3D { 1672 /* hisi_sccl,ddrc\000 */ }, + .pmu_name =3D { 1699 /* hisi_sccl,ddrc\000 */ }, }, { .entries =3D pmu_events__test_soc_cpu_hisi_sccl_l3c, .num_entries =3D ARRAY_SIZE(pmu_events__test_soc_cpu_hisi_sccl_l3c), - .pmu_name =3D { 2152 /* hisi_sccl,l3c\000 */ }, + .pmu_name =3D { 2186 /* hisi_sccl,l3c\000 */ }, }, { .entries =3D pmu_events__test_soc_cpu_uncore_cbox, .num_entries =3D ARRAY_SIZE(pmu_events__test_soc_cpu_uncore_cbox), - .pmu_name =3D { 1773 /* uncore_cbox\000 */ }, + .pmu_name =3D { 1801 /* uncore_cbox\000 */ }, }, { .entries =3D pmu_events__test_soc_cpu_uncore_imc, .num_entries =3D ARRAY_SIZE(pmu_events__test_soc_cpu_uncore_imc), - .pmu_name =3D { 2365 /* uncore_imc\000 */ }, + .pmu_name =3D { 2401 /* uncore_imc\000 */ }, }, { .entries =3D pmu_events__test_soc_cpu_uncore_imc_free_running, .num_entries =3D ARRAY_SIZE(pmu_events__test_soc_cpu_uncore_imc_free_= running), - .pmu_name =3D { 2246 /* uncore_imc_free_running\000 */ }, + .pmu_name =3D { 2281 /* uncore_imc_free_running\000 */ }, }, }; =20 static const struct compact_pmu_event pmu_metrics__test_soc_cpu_default_co= re[] =3D { -{ 2798 }, /* CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000 */ -{ 3479 }, /* DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\= 000\000\000\000\000\000\000\00000 */ -{ 3251 }, /* DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rq= sts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\00000 */ -{ 3345 }, /* DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l= 2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\0= 00\000\000\000\000\000\00000 */ -{ 3543 }, /* DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_A= ll)\000\000\000\000\000\000\000\00000 */ -{ 3611 }, /* DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2= _All)\000\000\000\000\000\000\000\00000 */ -{ 2883 }, /* Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * = (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cp= u_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\00000 */ -{ 2820 }, /* IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\0= 00\000\000\000\000\000\000\00000 */ -{ 3745 }, /* L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duratio= n_time\000\000\000\000\000\000\000\00000 */ -{ 3681 }, /* M1\000\000ipc + M2\000\000\000\000\000\000\000\00000 */ -{ 3703 }, /* M2\000\000ipc + M1\000\000\000\000\000\000\000\00000 */ -{ 3725 }, /* M3\000\0001 / M3\000\000\000\000\000\000\000\00000 */ -{ 3180 }, /* cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_= cycles\000\000\000\000\000\000\000\00000 */ -{ 3049 }, /* dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.an= y\000\000\000\000\000\000\000\00000 */ -{ 3113 }, /* icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired= .any\000\000\000\000\000\000\000\00000 */ +{ 2838 }, /* CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000 */ +{ 3519 }, /* DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\= 000\000\000\000\000\000\000\00000 */ +{ 3291 }, /* DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rq= sts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\00000 */ +{ 3385 }, /* DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l= 2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\0= 00\000\000\000\000\000\00000 */ +{ 3583 }, /* DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_A= ll)\000\000\000\000\000\000\000\00000 */ +{ 3651 }, /* DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2= _All)\000\000\000\000\000\000\000\00000 */ +{ 2923 }, /* Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * = (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cp= u_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\00000 */ +{ 2860 }, /* IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\0= 00\000\000\000\000\000\000\00000 */ +{ 3785 }, /* L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duratio= n_time\000\000\000\000\000\000\000\00000 */ +{ 3721 }, /* M1\000\000ipc + M2\000\000\000\000\000\000\000\00000 */ +{ 3743 }, /* M2\000\000ipc + M1\000\000\000\000\000\000\000\00000 */ +{ 3765 }, /* M3\000\0001 / M3\000\000\000\000\000\000\000\00000 */ +{ 3220 }, /* cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_= cycles\000\000\000\000\000\000\000\00000 */ +{ 3089 }, /* dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.an= y\000\000\000\000\000\000\000\00000 */ +{ 3153 }, /* icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired= .any\000\000\000\000\000\000\000\00000 */ =20 }; =20 @@ -181,18 +181,18 @@ const struct pmu_table_entry pmu_metrics__test_soc_cp= u[] =3D { { .entries =3D pmu_metrics__test_soc_cpu_default_core, .num_entries =3D ARRAY_SIZE(pmu_metrics__test_soc_cpu_default_core), - .pmu_name =3D { 1102 /* default_core\000 */ }, + .pmu_name =3D { 1114 /* default_core\000 */ }, }, }; =20 static const struct compact_pmu_event pmu_events__test_soc_sys_uncore_sys_= ccn_pmu[] =3D { -{ 2565 }, /* sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\00= 0config=3D0x2c\0000x01\00000\000\000 */ +{ 2603 }, /* sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\00= 0config=3D0x2c\0000x01\00000\000\000\000 */ }; static const struct compact_pmu_event pmu_events__test_soc_sys_uncore_sys_= cmn_pmu[] =3D { -{ 2658 }, /* sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total cache mi= sses in first lookup result (high priority)\000eventid=3D1,type=3D5\000(434= |436|43c|43a).*\00000\000\000 */ +{ 2697 }, /* sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total cache mi= sses in first lookup result (high priority)\000eventid=3D1,type=3D5\000(434= |436|43c|43a).*\00000\000\000\000 */ }; static const struct compact_pmu_event pmu_events__test_soc_sys_uncore_sys_= ddr_pmu[] =3D { -{ 2473 }, /* sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycles event\= 000event=3D0x2b\000v8\00000\000\000 */ +{ 2510 }, /* sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycles event\= 000event=3D0x2b\000v8\00000\000\000\000 */ =20 }; =20 @@ -200,17 +200,17 @@ const struct pmu_table_entry pmu_events__test_soc_sys= [] =3D { { .entries =3D pmu_events__test_soc_sys_uncore_sys_ccn_pmu, .num_entries =3D ARRAY_SIZE(pmu_events__test_soc_sys_uncore_sys_ccn_p= mu), - .pmu_name =3D { 2546 /* uncore_sys_ccn_pmu\000 */ }, + .pmu_name =3D { 2584 /* uncore_sys_ccn_pmu\000 */ }, }, { .entries =3D pmu_events__test_soc_sys_uncore_sys_cmn_pmu, .num_entries =3D ARRAY_SIZE(pmu_events__test_soc_sys_uncore_sys_cmn_p= mu), - .pmu_name =3D { 2639 /* uncore_sys_cmn_pmu\000 */ }, + .pmu_name =3D { 2678 /* uncore_sys_cmn_pmu\000 */ }, }, { .entries =3D pmu_events__test_soc_sys_uncore_sys_ddr_pmu, .num_entries =3D ARRAY_SIZE(pmu_events__test_soc_sys_uncore_sys_ddr_p= mu), - .pmu_name =3D { 2454 /* uncore_sys_ddr_pmu\000 */ }, + .pmu_name =3D { 2491 /* uncore_sys_ddr_pmu\000 */ }, }, }; =20 @@ -227,6 +227,12 @@ struct pmu_metrics_table { uint32_t num_pmus; }; =20 +/* Struct used to make the PMU counter layout table implementation opaque = to callers. */ +struct pmu_layouts_table { + const struct compact_pmu_event *entries; + size_t length; +}; + /* * Map a CPU to its table of PMU events. The CPU is identified by the * cpuid field, which is an arch-specific identifier for the CPU. @@ -240,6 +246,7 @@ struct pmu_events_map { const char *cpuid; struct pmu_events_table event_table; struct pmu_metrics_table metric_table; + struct pmu_layouts_table layout_table; }; =20 /* @@ -273,6 +280,7 @@ const struct pmu_events_map pmu_events_map[] =3D { .cpuid =3D 0, .event_table =3D { 0, 0 }, .metric_table =3D { 0, 0 }, + .layout_table =3D { 0, 0 }, } }; =20 @@ -317,6 +325,8 @@ static void decompress_event(int offset, struct pmu_eve= nt *pe) pe->unit =3D (*p =3D=3D '\0' ? NULL : p); while (*p++); pe->long_desc =3D (*p =3D=3D '\0' ? NULL : p); + while (*p++); + pe->counters_list =3D (*p =3D=3D '\0' ? NULL : p); } =20 static void decompress_metric(int offset, struct pmu_metric *pm) @@ -348,6 +358,19 @@ static void decompress_metric(int offset, struct pmu_m= etric *pm) pm->event_grouping =3D *p - '0'; } =20 +static void decompress_layout(int offset, struct pmu_layout *pm) +{ + const char *p =3D &big_c_string[offset]; + + pm->pmu =3D (*p =3D=3D '\0' ? NULL : p); + while (*p++); + pm->desc =3D (*p =3D=3D '\0' ? NULL : p); + p++; + pm->counters_num_gp =3D *p - '0'; + p++; + pm->counters_num_fixed =3D *p - '0'; +} + static int pmu_events_table__for_each_event_pmu(const struct pmu_events_ta= ble *table, const struct pmu_table_ent= ry *pmu, pmu_event_iter_fn fn, @@ -503,6 +526,21 @@ int pmu_metrics_table__for_each_metric(const struct pm= u_metrics_table *table, return 0; } =20 +int pmu_layouts_table__for_each_layout(const struct pmu_layouts_table *tab= le, + pmu_layout_iter_fn fn, + void *data) { + for (size_t i =3D 0; i < table->length; i++) { + struct pmu_layout pm; + int ret; + + decompress_layout(table->entries[i].offset, &pm); + ret =3D fn(&pm, data); + if (ret) + return ret; + } + return 0; +} + static const struct pmu_events_map *map_for_cpu(struct perf_cpu cpu) { static struct { @@ -595,6 +633,34 @@ const struct pmu_metrics_table *pmu_metrics_table__fin= d(void) return map ? &map->metric_table : NULL; } =20 +const struct pmu_layouts_table *perf_pmu__find_layouts_table(void) +{ + const struct pmu_layouts_table *table =3D NULL; + struct perf_cpu cpu =3D {-1}; + char *cpuid =3D get_cpuid_allow_env_override(cpu); + int i; + + /* on some platforms which uses cpus map, cpuid can be NULL for + * PMUs other than CORE PMUs. + */ + if (!cpuid) + return NULL; + + i =3D 0; + for (;;) { + const struct pmu_events_map *map =3D &pmu_events_map[i++]; + if (!map->arch) + break; + + if (!strcmp_cpuid_str(map->cpuid, cpuid)) { + table =3D &map->layout_table; + break; + } + } + free(cpuid); + return table; +} + const struct pmu_events_table *find_core_events_table(const char *arch, co= nst char *cpuid) { for (const struct pmu_events_map *tables =3D &pmu_events_map[0]; @@ -616,6 +682,16 @@ const struct pmu_metrics_table *find_core_metrics_tabl= e(const char *arch, const } return NULL; } +const struct pmu_layouts_table *find_core_layouts_table(const char *arch, = const char *cpuid) +{ + for (const struct pmu_events_map *tables =3D &pmu_events_map[0]; + tables->arch; + tables++) { + if (!strcmp(tables->arch, arch) && !strcmp_cpuid_str(table= s->cpuid, cpuid)) + return &tables->layout_table; + } + return NULL; +} =20 int pmu_for_each_core_event(pmu_event_iter_fn fn, void *data) { @@ -644,6 +720,19 @@ int pmu_for_each_core_metric(pmu_metric_iter_fn fn, vo= id *data) return 0; } =20 +int pmu_for_each_core_layout(pmu_layout_iter_fn fn, void *data) +{ + for (const struct pmu_events_map *tables =3D &pmu_events_map[0]; + tables->arch; + tables++) { + int ret =3D pmu_layouts_table__for_each_layout(&tables->la= yout_table, fn, data); + + if (ret) + return ret; + } + return 0; +} + const struct pmu_events_table *find_sys_events_table(const char *name) { for (const struct pmu_sys_events *tables =3D &pmu_sys_event_tables= [0]; diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jeven= ts.py index d781a377757a..5fd906ac6642 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -23,6 +23,8 @@ _metric_tables =3D [] _sys_metric_tables =3D [] # Mapping between sys event table names and sys metric table names. _sys_event_table_to_metric_table_mapping =3D {} +# List of regular PMU counter layout tables. +_pmu_layouts_tables =3D [] # Map from an event name to an architecture standard # JsonEvent. Architecture standard events are in json files in the top # f'{_args.starting_dir}/{_args.arch}' directory. @@ -31,6 +33,10 @@ _arch_std_events =3D {} _pending_events =3D [] # Name of events table to be written out _pending_events_tblname =3D None +# PMU counter layout to write out when the layout table is closed +_pending_pmu_counts =3D [] +# Name of PMU counter layout table to be written out +_pending_pmu_counts_tblname =3D None # Metrics to write out when the table is closed _pending_metrics =3D [] # Name of metrics table to be written out @@ -51,6 +57,11 @@ _json_event_attributes =3D [ 'long_desc' ] =20 +# Attributes that are in pmu_unit_layout. +_json_layout_attributes =3D [ + 'pmu', 'desc' +] + # Attributes that are in pmu_metric rather than pmu_event. _json_metric_attributes =3D [ 'metric_name', 'metric_group', 'metric_expr', 'metric_threshold', @@ -265,7 +276,7 @@ class JsonEvent: =20 def unit_to_pmu(unit: str) -> Optional[str]: """Convert a JSON Unit to Linux PMU name.""" - if not unit: + if not unit or unit =3D=3D "core": return 'default_core' # Comment brought over from jevents.c: # it's not realistic to keep adding these, we need something more sc= alable ... @@ -336,6 +347,19 @@ class JsonEvent: if 'Errata' in jd: extra_desc +=3D ' Spec update: ' + jd['Errata'] self.pmu =3D unit_to_pmu(jd.get('Unit')) + # The list of counter(s) the event could be collected with + class Counter: + gp =3D str() + fixed =3D str() + self.counters =3D {'list': str(), 'num': Counter()} + self.counters['list'] =3D jd.get('Counter') + # Number of generic counter + self.counters['num'].gp =3D jd.get('CountersNumGeneric') + # Number of fixed counter + self.counters['num'].fixed =3D jd.get('CountersNumFixed') + # If the event uses an MSR, other event uses the same MSR could not be + # schedule to collect at the same time. + self.msr =3D jd.get('MSRIndex') filter =3D jd.get('Filter') self.unit =3D jd.get('ScaleUnit') self.perpkg =3D jd.get('PerPkg') @@ -411,8 +435,20 @@ class JsonEvent: s +=3D f'\t{attr} =3D {value},\n' return s + '}' =20 - def build_c_string(self, metric: bool) -> str: + def build_c_string(self, metric: bool, layout: bool) -> str: s =3D '' + if layout: + for attr in _json_layout_attributes: + x =3D getattr(self, attr) + if attr in _json_enum_attributes: + s +=3D x if x else '0' + else: + s +=3D f'{x}\\000' if x else '\\000' + x =3D self.counters['num'].gp + s +=3D x if x else '0' + x =3D self.counters['num'].fixed + s +=3D x if x else '0' + return s for attr in _json_metric_attributes if metric else _json_event_attribu= tes: x =3D getattr(self, attr) if metric and x and attr =3D=3D 'metric_expr': @@ -425,12 +461,15 @@ class JsonEvent: s +=3D x if x else '0' else: s +=3D f'{x}\\000' if x else '\\000' + if not metric: + x =3D self.counters['list'] + s +=3D f'{x}\\000' if x else '\\000' return s =20 - def to_c_string(self, metric: bool) -> str: + def to_c_string(self, metric: bool, layout: bool) -> str: """Representation of the event as a C struct initializer.""" =20 - s =3D self.build_c_string(metric) + s =3D self.build_c_string(metric, layout) return f'{{ { _bcs.offsets[s] } }}, /* {s} */\n' =20 =20 @@ -467,6 +506,8 @@ def preprocess_arch_std_files(archpath: str) -> None: _arch_std_events[event.name.lower()] =3D event if event.metric_name: _arch_std_events[event.metric_name.lower()] =3D event + if event.counters['num'].gp: + _arch_std_events[event.pmu.lower()] =3D event =20 =20 def add_events_table_entries(item: os.DirEntry, topic: str) -> None: @@ -476,6 +517,8 @@ def add_events_table_entries(item: os.DirEntry, topic: = str) -> None: _pending_events.append(e) if e.metric_name: _pending_metrics.append(e) + if e.counters['num'].gp: + _pending_pmu_counts.append(e) =20 =20 def print_pending_events() -> None: @@ -519,8 +562,8 @@ def print_pending_events() -> None: last_pmu =3D event.pmu pmus.add((event.pmu, pmu_name)) =20 - _args.output_file.write(event.to_c_string(metric=3DFalse)) last_name =3D event.name + _args.output_file.write(event.to_c_string(metric=3DFalse, layout=3DFal= se)) _pending_events =3D [] =20 _args.output_file.write(f""" @@ -575,7 +618,7 @@ def print_pending_metrics() -> None: last_pmu =3D metric.pmu pmus.add((metric.pmu, pmu_name)) =20 - _args.output_file.write(metric.to_c_string(metric=3DTrue)) + _args.output_file.write(metric.to_c_string(metric=3DTrue, layout=3DFal= se)) _pending_metrics =3D [] =20 _args.output_file.write(f""" @@ -593,6 +636,35 @@ const struct pmu_table_entry {_pending_metrics_tblname= }[] =3D {{ """) _args.output_file.write('};\n\n') =20 +def print_pending_pmu_counter_layout_table() -> None: + '''Print counter layout data from counter.json file to counter layout ta= ble in + c-string''' + + def pmu_counts_cmp_key(j: JsonEvent) -> Tuple[bool, str, str]: + def fix_none(s: Optional[str]) -> str: + if s is None: + return '' + return s + + return (j.desc is not None, fix_none(j.pmu)) + + global _pending_pmu_counts + if not _pending_pmu_counts: + return + + global _pending_pmu_counts_tblname + global pmu_layouts_tables + _pmu_layouts_tables.append(_pending_pmu_counts_tblname) + + _args.output_file.write( + f'static const struct compact_pmu_event {_pending_pmu_counts_tblname= }[] =3D {{\n') + + for pmu_layout in sorted(_pending_pmu_counts, key=3Dpmu_counts_cmp_key): + _args.output_file.write(pmu_layout.to_c_string(metric=3DFalse, layout= =3DTrue)) + _pending_pmu_counts =3D [] + + _args.output_file.write('};\n\n') + def get_topic(topic: str) -> str: if topic.endswith('metrics.json'): return 'metrics' @@ -629,10 +701,12 @@ def preprocess_one_file(parents: Sequence[str], item:= os.DirEntry) -> None: pmu_name =3D f"{event.pmu}\\000" if event.name: _bcs.add(pmu_name, metric=3DFalse) - _bcs.add(event.build_c_string(metric=3DFalse), metric=3DFalse) + _bcs.add(event.build_c_string(metric=3DFalse, layout=3DFalse), metri= c=3DFalse) if event.metric_name: _bcs.add(pmu_name, metric=3DTrue) - _bcs.add(event.build_c_string(metric=3DTrue), metric=3DTrue) + _bcs.add(event.build_c_string(metric=3DTrue, layout=3DFalse), metric= =3DTrue) + if event.counters['num'].gp: + _bcs.add(event.build_c_string(metric=3DFalse, layout=3DTrue), metric= =3DFalse) =20 def process_one_file(parents: Sequence[str], item: os.DirEntry) -> None: """Process a JSON file during the main walk.""" @@ -649,11 +723,14 @@ def process_one_file(parents: Sequence[str], item: os= .DirEntry) -> None: if item.is_dir() and is_leaf_dir_ignoring_sys(item.path): print_pending_events() print_pending_metrics() + print_pending_pmu_counter_layout_table() =20 global _pending_events_tblname _pending_events_tblname =3D file_name_to_table_name('pmu_events_', par= ents, item.name) global _pending_metrics_tblname _pending_metrics_tblname =3D file_name_to_table_name('pmu_metrics_', p= arents, item.name) + global _pending_pmu_counts_tblname + _pending_pmu_counts_tblname =3D file_name_to_table_name('pmu_layouts_'= , parents, item.name) =20 if item.name =3D=3D 'sys': _sys_event_table_to_metric_table_mapping[_pending_events_tblname] = =3D _pending_metrics_tblname @@ -687,6 +764,12 @@ struct pmu_metrics_table { uint32_t num_pmus; }; =20 +/* Struct used to make the PMU counter layout table implementation opaque = to callers. */ +struct pmu_layouts_table { + const struct compact_pmu_event *entries; + size_t length; +}; + /* * Map a CPU to its table of PMU events. The CPU is identified by the * cpuid field, which is an arch-specific identifier for the CPU. @@ -700,6 +783,7 @@ struct pmu_events_map { const char *cpuid; struct pmu_events_table event_table; struct pmu_metrics_table metric_table; + struct pmu_layouts_table layout_table; }; =20 /* @@ -755,6 +839,12 @@ const struct pmu_events_map pmu_events_map[] =3D { metric_size =3D '0' if event_size =3D=3D '0' and metric_size =3D=3D '0': continue + layout_tblname =3D file_name_to_table_name('pmu_layouts_', [],= row[2].replace('/', '_')) + if layout_tblname in _pmu_layouts_tables: + layout_size =3D f'ARRAY_SIZE({layout_tblname})' + else: + layout_tblname =3D 'NULL' + layout_size =3D '0' cpuid =3D row[0].replace('\\', '\\\\') _args.output_file.write(f"""{{ \t.arch =3D "{arch}", @@ -766,6 +856,10 @@ const struct pmu_events_map pmu_events_map[] =3D { \t.metric_table =3D {{ \t\t.pmus =3D {metric_tblname}, \t\t.num_pmus =3D {metric_size} +\t}}, +\t.layout_table =3D {{ +\t\t.entries =3D {layout_tblname}, +\t\t.length =3D {layout_size} \t}} }}, """) @@ -776,6 +870,7 @@ const struct pmu_events_map pmu_events_map[] =3D { \t.cpuid =3D 0, \t.event_table =3D { 0, 0 }, \t.metric_table =3D { 0, 0 }, +\t.layout_table =3D { 0, 0 }, } }; """) @@ -844,6 +939,9 @@ static void decompress_event(int offset, struct pmu_eve= nt *pe) _args.output_file.write('\tp++;') else: _args.output_file.write('\twhile (*p++);') + _args.output_file.write('\twhile (*p++);') + _args.output_file.write(f'\n\tpe->counters_list =3D ') + _args.output_file.write("(*p =3D=3D '\\0' ? NULL : p);\n") _args.output_file.write("""} =20 static void decompress_metric(int offset, struct pmu_metric *pm) @@ -864,6 +962,30 @@ static void decompress_metric(int offset, struct pmu_m= etric *pm) _args.output_file.write('\twhile (*p++);') _args.output_file.write("""} =20 +static void decompress_layout(int offset, struct pmu_layout *pm) +{ +\tconst char *p =3D &big_c_string[offset]; +""") + for attr in _json_layout_attributes: + _args.output_file.write(f'\n\tpm->{attr} =3D ') + if attr in _json_enum_attributes: + _args.output_file.write("*p - '0';\n") + else: + _args.output_file.write("(*p =3D=3D '\\0' ? NULL : p);\n") + if attr =3D=3D _json_layout_attributes[-1]: + continue + if attr in _json_enum_attributes: + _args.output_file.write('\tp++;') + else: + _args.output_file.write('\twhile (*p++);') + _args.output_file.write('\tp++;') + _args.output_file.write(f'\n\tpm->counters_num_gp =3D ') + _args.output_file.write("*p - '0';\n") + _args.output_file.write('\tp++;') + _args.output_file.write(f'\n\tpm->counters_num_fixed =3D ') + _args.output_file.write("*p - '0';\n") + _args.output_file.write("""} + static int pmu_events_table__for_each_event_pmu(const struct pmu_events_ta= ble *table, const struct pmu_table_ent= ry *pmu, pmu_event_iter_fn fn, @@ -1019,6 +1141,21 @@ int pmu_metrics_table__for_each_metric(const struct = pmu_metrics_table *table, return 0; } =20 +int pmu_layouts_table__for_each_layout(const struct pmu_layouts_table *tab= le, + pmu_layout_iter_fn fn, + void *data) { + for (size_t i =3D 0; i < table->length; i++) { + struct pmu_layout pm; + int ret; + + decompress_layout(table->entries[i].offset, &pm); + ret =3D fn(&pm, data); + if (ret) + return ret; + } + return 0; +} + static const struct pmu_events_map *map_for_cpu(struct perf_cpu cpu) { static struct { @@ -1111,6 +1248,34 @@ const struct pmu_metrics_table *pmu_metrics_table__f= ind(void) return map ? &map->metric_table : NULL; } =20 +const struct pmu_layouts_table *perf_pmu__find_layouts_table(void) +{ + const struct pmu_layouts_table *table =3D NULL; + struct perf_cpu cpu =3D {-1}; + char *cpuid =3D get_cpuid_allow_env_override(cpu); + int i; + + /* on some platforms which uses cpus map, cpuid can be NULL for + * PMUs other than CORE PMUs. + */ + if (!cpuid) + return NULL; + + i =3D 0; + for (;;) { + const struct pmu_events_map *map =3D &pmu_events_map[i++]; + if (!map->arch) + break; + + if (!strcmp_cpuid_str(map->cpuid, cpuid)) { + table =3D &map->layout_table; + break; + } + } + free(cpuid); + return table; +} + const struct pmu_events_table *find_core_events_table(const char *arch, co= nst char *cpuid) { for (const struct pmu_events_map *tables =3D &pmu_events_map[0]; @@ -1132,6 +1297,16 @@ const struct pmu_metrics_table *find_core_metrics_ta= ble(const char *arch, const } return NULL; } +const struct pmu_layouts_table *find_core_layouts_table(const char *arch, = const char *cpuid) +{ + for (const struct pmu_events_map *tables =3D &pmu_events_map[0]; + tables->arch; + tables++) { + if (!strcmp(tables->arch, arch) && !strcmp_cpuid_str(table= s->cpuid, cpuid)) + return &tables->layout_table; + } + return NULL; +} =20 int pmu_for_each_core_event(pmu_event_iter_fn fn, void *data) { @@ -1160,6 +1335,19 @@ int pmu_for_each_core_metric(pmu_metric_iter_fn fn, = void *data) return 0; } =20 +int pmu_for_each_core_layout(pmu_layout_iter_fn fn, void *data) +{ + for (const struct pmu_events_map *tables =3D &pmu_events_map[0]; + tables->arch; + tables++) { + int ret =3D pmu_layouts_table__for_each_layout(&tables->la= yout_table, fn, data); + + if (ret) + return ret; + } + return 0; +} + const struct pmu_events_table *find_sys_events_table(const char *name) { for (const struct pmu_sys_events *tables =3D &pmu_sys_event_tables= [0]; @@ -1320,6 +1508,7 @@ struct pmu_table_entry { ftw(arch_path, [], process_one_file) print_pending_events() print_pending_metrics() + print_pending_pmu_counter_layout_table() =20 print_mapping_table(archs) print_system_mapping_table() diff --git a/tools/perf/pmu-events/pmu-events.h b/tools/perf/pmu-events/pmu= -events.h index 675562e6f770..9a5cbec32513 100644 --- a/tools/perf/pmu-events/pmu-events.h +++ b/tools/perf/pmu-events/pmu-events.h @@ -45,6 +45,11 @@ struct pmu_event { const char *desc; const char *topic; const char *long_desc; + /** + * The list of counter(s) the event could be collected on. + * eg., "0,1,2,3,4,5,6,7". + */ + const char *counters_list; const char *pmu; const char *unit; bool perpkg; @@ -67,8 +72,18 @@ struct pmu_metric { enum metric_event_groups event_grouping; }; =20 +struct pmu_layout { + const char *pmu; + const char *desc; + /** Total number of generic counters*/ + int counters_num_gp; + /** Total number of fixed counters. Set to zero if no fixed counter on th= e unit.*/ + int counters_num_fixed; +}; + struct pmu_events_table; struct pmu_metrics_table; +struct pmu_layouts_table; =20 #define PMU_EVENTS__NOT_FOUND -1000 =20 @@ -80,6 +95,9 @@ typedef int (*pmu_metric_iter_fn)(const struct pmu_metric= *pm, const struct pmu_metrics_table *table, void *data); =20 +typedef int (*pmu_layout_iter_fn)(const struct pmu_layout *pm, + void *data); + int pmu_events_table__for_each_event(const struct pmu_events_table *table, struct perf_pmu *pmu, pmu_event_iter_fn fn, @@ -92,10 +110,13 @@ int pmu_events_table__for_each_event(const struct pmu_= events_table *table, * search of all tables. */ int pmu_events_table__find_event(const struct pmu_events_table *table, - struct perf_pmu *pmu, - const char *name, - pmu_event_iter_fn fn, - void *data); + struct perf_pmu *pmu, + const char *name, + pmu_event_iter_fn fn, + void *data); +int pmu_layouts_table__for_each_layout(const struct pmu_layouts_table *tab= le, + pmu_layout_iter_fn fn, + void *data); size_t pmu_events_table__num_events(const struct pmu_events_table *table, struct perf_pmu *pmu); =20 @@ -104,10 +125,13 @@ int pmu_metrics_table__for_each_metric(const struct p= mu_metrics_table *table, pm =20 const struct pmu_events_table *perf_pmu__find_events_table(struct perf_pmu= *pmu); const struct pmu_metrics_table *pmu_metrics_table__find(void); +const struct pmu_layouts_table *perf_pmu__find_layouts_table(void); const struct pmu_events_table *find_core_events_table(const char *arch, co= nst char *cpuid); const struct pmu_metrics_table *find_core_metrics_table(const char *arch, = const char *cpuid); +const struct pmu_layouts_table *find_core_layouts_table(const char *arch, = const char *cpuid); int pmu_for_each_core_event(pmu_event_iter_fn fn, void *data); int pmu_for_each_core_metric(pmu_metric_iter_fn fn, void *data); +int pmu_for_each_core_layout(pmu_layout_iter_fn fn, void *data); =20 const struct pmu_events_table *find_sys_events_table(const char *name); const struct pmu_metrics_table *find_sys_metrics_table(const char *name); --=20 2.34.1