From nobody Mon Dec 15 21:46:46 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3476C20A5D2; Tue, 14 Jan 2025 21:38:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736890739; cv=none; b=lRQl9LeIiX3057EFBAGu10a3Oxbj3DWRbC5uqC/qWsWr804Wlv9tNKpdg0RAP/AHYko1TxtKcO63k3gtd6m46BN521l1MsH6g90DKR4pSHhHwbSVRh4fwJDGowEX5TKl1Ou14EE5IZ6Yd9ab8n59Sl8vMOlyiWdSrPZJvFSrbCA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736890739; c=relaxed/simple; bh=FqqtuHZ2xVpq81aHXkj01ME5McvceHelIy459BBbk2Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sTBt5IBD8YGjrvNLpLXOfLUk2btDxDmoMmlkiX70hYre8oMeO7d8+dpUQObZp0NyX1jUDypnSPvulMbh6sHhPvEDChlm1VlI8BHzKvH4vLk0b0+qa+KmCynepDoktqXz+wM2mgPnkGqMFsu4nJAnptDmQUGOdp8JTRBbg4i7lWE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kpIlewjO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kpIlewjO" Received: by smtp.kernel.org (Postfix) with ESMTPS id CBBB4C4CEE0; Tue, 14 Jan 2025 21:38:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736890738; bh=FqqtuHZ2xVpq81aHXkj01ME5McvceHelIy459BBbk2Q=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=kpIlewjODP2b+bu5o8Of38Osa+5QiLTa/XTiSD3LYa1nxbaGr51HiFUCxwm7mBtis riWip8fozkEaKQ+i8Bu0RBWIPR2NUhz/10q9PZgcYn0uZTr9xuwI48xR0k9EzSptEa QfCHUJpTDtukQHY9UdhKs9egB7pTI4c3HluS64jh4v0hoGWAbEuu4FbUksloP8VYok 3G4CQ0cGC2jkfD0aq06PbdyFwtp8TCcN2ONbi+p3cPFpj33xbbldGwgIMUnAHh3icz keNTwJNQ8fLH5/dAze1rEEc+045uMzaoZcm3TKLK5IHCaKqDwQOVpZvZIZvV2AUdFw prSTtrvMe7mDg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA3DEC02185; Tue, 14 Jan 2025 21:38:58 +0000 (UTC) From: Sasha Finkelstein via B4 Relay Date: Tue, 14 Jan 2025 22:38:52 +0100 Subject: [PATCH v4 1/5] dt-bindings: display: Add Apple pre-DCP display controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250114-adpdrm-v4-1-e9b5260a39f1@gmail.com> References: <20250114-adpdrm-v4-0-e9b5260a39f1@gmail.com> In-Reply-To: <20250114-adpdrm-v4-0-e9b5260a39f1@gmail.com> To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jessica Zhang , asahi@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alyssa Ross , Sasha Finkelstein X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1736890736; l=7241; i=fnkl.kernel@gmail.com; s=20241124; h=from:subject:message-id; bh=+zXbhZGcaNGoRP+96oERb98U1ZjM+cx6jbgYsDm87Qc=; b=NugG+sm4vlbYEbeP7khDpYjOxGVELtAWLvnq09DHWSXxJgcnu2Bw90xLMsHjpKH6XJI0Drkqy 0qo9wr4q42GBsqOqKE1HuYEYc7BnbHZ/po/R2wvTGqjwFeL5F6WTgID X-Developer-Key: i=fnkl.kernel@gmail.com; a=ed25519; pk=aSkp1PdZ+eF4jpMO6oLvz/YfT5XkBUneWwyhQrOgmsU= X-Endpoint-Received: by B4 Relay for fnkl.kernel@gmail.com/20241124 with auth_id=283 X-Original-From: Sasha Finkelstein Reply-To: fnkl.kernel@gmail.com From: Sasha Finkelstein Add bindings for a secondary display controller present on certain Apple laptops. Signed-off-by: Sasha Finkelstein Reviewed-by: Krzysztof Kozlowski --- .../display/apple,h7-display-pipe-mipi.yaml | 83 ++++++++++++++++++= ++ .../bindings/display/apple,h7-display-pipe.yaml | 88 ++++++++++++++++++= ++++ .../bindings/display/panel/apple,summit.yaml | 58 ++++++++++++++ 3 files changed, 229 insertions(+) diff --git a/Documentation/devicetree/bindings/display/apple,h7-display-pip= e-mipi.yaml b/Documentation/devicetree/bindings/display/apple,h7-display-pi= pe-mipi.yaml new file mode 100644 index 0000000000000000000000000000000000000000..5e6da66499a508c001670f68fa0= 0d6bab13591d6 --- /dev/null +++ b/Documentation/devicetree/bindings/display/apple,h7-display-pipe-mipi.= yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/apple,h7-display-pipe-mipi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple pre-DCP display controller MIPI interface + +maintainers: + - Sasha Finkelstein + +description: + The MIPI controller part of the pre-DCP Apple display controller + +allOf: + - $ref: dsi-controller.yaml# + +properties: + compatible: + items: + - enum: + - apple,t8112-display-pipe-mipi + - apple,t8103-display-pipe-mipi + - const: apple,h7-display-pipe-mipi + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input port. Always connected to the primary controller + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output MIPI DSI port to the panel + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - ports + +unevaluatedProperties: false + +examples: + - | + dsi@28200000 { + compatible =3D "apple,t8103-display-pipe-mipi", "apple,h7-display-= pipe-mipi"; + reg =3D <0x28200000 0xc000>; + power-domains =3D <&ps_dispdfr_mipi>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + dfr_adp_out_mipi: endpoint { + remote-endpoint =3D <&dfr_adp_out_mipi>; + }; + }; + + port@1 { + reg =3D <1>; + + dfr_panel_in: endpoint { + remote-endpoint =3D <&dfr_mipi_out_panel>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/apple,h7-display-pip= e.yaml b/Documentation/devicetree/bindings/display/apple,h7-display-pipe.ya= ml new file mode 100644 index 0000000000000000000000000000000000000000..102fb1804c0c0b84f590e507ca2= d526948e98f68 --- /dev/null +++ b/Documentation/devicetree/bindings/display/apple,h7-display-pipe.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/apple,h7-display-pipe.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple pre-DCP display controller + +maintainers: + - Sasha Finkelstein + +description: + A secondary display controller used to drive the "touchbar" on + certain Apple laptops. + +properties: + compatible: + items: + - enum: + - apple,t8112-display-pipe + - apple,t8103-display-pipe + - const: apple,h7-display-pipe + + reg: + items: + - description: Primary register block, controls planes and blending + - description: + Contains other configuration registers like interrupt + and FIFO control + + reg-names: + items: + - const: be + - const: fe + + power-domains: + description: + Phandles to pmgr entries that are needed for this controller to turn= on. + Aside from that, their specific functions are unknown + maxItems: 2 + + interrupts: + items: + - description: Unknown function + - description: Primary interrupt. Vsync events are reported via it + + interrupt-names: + items: + - const: be + - const: fe + + iommus: + maxItems: 1 + + port: + $ref: /schemas/graph.yaml#/properties/port + description: Output port. Always connected to apple,h7-display-pipe-mi= pi + +required: + - compatible + - reg + - interrupts + - port + +additionalProperties: false + +examples: + - | + #include + display-pipe@28200000 { + compatible =3D "apple,t8103-display-pipe", "apple,h7-display-pipe"; + reg =3D <0x28200000 0xc000>, + <0x28400000 0x4000>; + reg-names =3D "be", "fe"; + power-domains =3D <&ps_dispdfr_fe>, <&ps_dispdfr_be>; + interrupt-parent =3D <&aic>; + interrupts =3D , + ; + interrupt-names =3D "be", "fe"; + iommus =3D <&displaydfr_dart 0>; + + port { + dfr_adp_out_mipi: endpoint { + remote-endpoint =3D <&dfr_mipi_in_adp>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/panel/apple,summit.y= aml b/Documentation/devicetree/bindings/display/panel/apple,summit.yaml new file mode 100644 index 0000000000000000000000000000000000000000..f081755325e97ad58b831893b84= 082cc10f8d5e3 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/apple,summit.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/apple,summit.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Apple "Summit" display panel + +maintainers: + - Sasha Finkelstein + +description: + An OLED panel used as a touchbar on certain Apple laptops. + Contains a backlight device, which controls brightness of the panel itse= lf. + The backlight common properties are included for this reason + +allOf: + - $ref: panel-common.yaml# + - $ref: /schemas/leds/backlight/common.yaml# + +properties: + compatible: + items: + - enum: + - apple,j293-summit + - apple,j493-summit + - const: apple,summit + + reg: + maxItems: 1 + +required: + - compatible + - reg + - max-brightness + - port + +unevaluatedProperties: false + +examples: + - | + dsi { + #address-cells =3D <1>; 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Tue, 14 Jan 2025 21:38:58 +0000 (UTC) From: Sasha Finkelstein via B4 Relay Date: Tue, 14 Jan 2025 22:38:53 +0100 Subject: [PATCH v4 2/5] drm: adp: Add Apple Display Pipe driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250114-adpdrm-v4-2-e9b5260a39f1@gmail.com> References: <20250114-adpdrm-v4-0-e9b5260a39f1@gmail.com> In-Reply-To: <20250114-adpdrm-v4-0-e9b5260a39f1@gmail.com> To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jessica Zhang , asahi@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alyssa Ross , Sasha Finkelstein , Janne Grunau X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1736890736; l=27538; i=fnkl.kernel@gmail.com; s=20241124; h=from:subject:message-id; bh=eTNJQ+WS139aeRPBgYtz3BH1ScqEPN5mi++Yy2UXm4Y=; b=u4Rdj5NeN5sVl6N9ymT902Sz+yoo2hcbxx3sgH1+EpSw6Rgw5q7l9NL8qUQDSYZYezUA8T4CL +jgcgmTNyZFDWZY8N6QO9+CdjCjplxr8BZgpUItPCtQvJxPKnt5dh1P X-Developer-Key: i=fnkl.kernel@gmail.com; a=ed25519; pk=aSkp1PdZ+eF4jpMO6oLvz/YfT5XkBUneWwyhQrOgmsU= X-Endpoint-Received: by B4 Relay for fnkl.kernel@gmail.com/20241124 with auth_id=283 X-Original-From: Sasha Finkelstein Reply-To: fnkl.kernel@gmail.com From: Sasha Finkelstein This display controller is present on M-series chips and is used to drive the touchbar display. Co-developed-by: Janne Grunau Signed-off-by: Janne Grunau Signed-off-by: Sasha Finkelstein --- drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/adp/Kconfig | 16 ++ drivers/gpu/drm/adp/Makefile | 5 + drivers/gpu/drm/adp/adp-mipi.c | 251 +++++++++++++++++ drivers/gpu/drm/adp/adp_drv.c | 594 +++++++++++++++++++++++++++++++++++++= ++++ 6 files changed, 869 insertions(+) diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 772fc7625639de07de873afa0e5e0c37bf4f4420..bba7a9c1f1d213c9cf0418a3886= 46da7a8504f4f 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -503,6 +503,8 @@ source "drivers/gpu/drm/mcde/Kconfig" =20 source "drivers/gpu/drm/tidss/Kconfig" =20 +source "drivers/gpu/drm/adp/Kconfig" + source "drivers/gpu/drm/xlnx/Kconfig" =20 source "drivers/gpu/drm/gud/Kconfig" diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 463afad1b5ca6275e61223adc8ca036c3d4d6b03..acd8d8943ef2bf85c80db7c218c= 59a7ec2df56da 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -213,6 +213,7 @@ obj-y +=3D mxsfb/ obj-y +=3D tiny/ obj-$(CONFIG_DRM_PL111) +=3D pl111/ obj-$(CONFIG_DRM_TVE200) +=3D tve200/ +obj-$(CONFIG_DRM_ADP) +=3D adp/ obj-$(CONFIG_DRM_XEN) +=3D xen/ obj-$(CONFIG_DRM_VBOXVIDEO) +=3D vboxvideo/ obj-$(CONFIG_DRM_LIMA) +=3D lima/ diff --git a/drivers/gpu/drm/adp/Kconfig b/drivers/gpu/drm/adp/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..7e70b2e26555a2c2ddf71350bce= 74c97dfe292da --- /dev/null +++ b/drivers/gpu/drm/adp/Kconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-only OR MIT +config DRM_ADP + tristate "DRM Support for pre-DCP Apple display controllers" + depends on DRM && OF && ARM64 + depends on ARCH_APPLE || COMPILE_TEST + select DRM_KMS_HELPER + select DRM_BRIDGE_CONNECTOR + select DRM_DISPLAY_HELPER + select DRM_KMS_DMA_HELPER + select DRM_GEM_DMA_HELPER + select VIDEOMODE_HELPERS + select DRM_MIPI_DSI + help + Chose this option if you have an Apple Arm laptop with a touchbar. + + If M is selected, this module will be called adpdrm. diff --git a/drivers/gpu/drm/adp/Makefile b/drivers/gpu/drm/adp/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..8e7b618edd35591ce9b480a8fd3= 819cce41557f5 --- /dev/null +++ b/drivers/gpu/drm/adp/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only OR MIT + +adpdrm-y :=3D adp_drv.o +adpdrm-mipi-y :=3D adp-mipi.o +obj-$(CONFIG_DRM_ADP) +=3D adpdrm.o adpdrm-mipi.o diff --git a/drivers/gpu/drm/adp/adp-mipi.c b/drivers/gpu/drm/adp/adp-mipi.c new file mode 100644 index 0000000000000000000000000000000000000000..7e6135422f65cee2a8df123360b= a3c16c886b38a --- /dev/null +++ b/drivers/gpu/drm/adp/adp-mipi.c @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include + +#include +#include + +#define DSI_GEN_HDR 0x6c +#define DSI_GEN_PLD_DATA 0x70 + +#define DSI_CMD_PKT_STATUS 0x74 + +#define GEN_PLD_R_EMPTY BIT(4) +#define GEN_PLD_W_FULL BIT(3) +#define GEN_PLD_W_EMPTY BIT(2) +#define GEN_CMD_FULL BIT(1) +#define GEN_CMD_EMPTY BIT(0) +#define GEN_RD_CMD_BUSY BIT(6) +#define CMD_PKT_STATUS_TIMEOUT_US 20000 + +struct adp_mipi_drv_private { + struct mipi_dsi_host dsi; + struct drm_bridge bridge; + struct drm_bridge *next_bridge; + void __iomem *mipi; +}; + +#define mipi_to_adp(x) container_of(x, struct adp_mipi_drv_private, dsi) + +static int adp_dsi_gen_pkt_hdr_write(struct adp_mipi_drv_private *adp, u32= hdr_val) +{ + int ret; + u32 val, mask; + + ret =3D readl_poll_timeout(adp->mipi + DSI_CMD_PKT_STATUS, + val, !(val & GEN_CMD_FULL), 1000, + CMD_PKT_STATUS_TIMEOUT_US); + if (ret) { + dev_err(adp->dsi.dev, "failed to get available command FIFO\n"); + return ret; + } + + writel(hdr_val, adp->mipi + DSI_GEN_HDR); + + mask =3D GEN_CMD_EMPTY | GEN_PLD_W_EMPTY; + ret =3D readl_poll_timeout(adp->mipi + DSI_CMD_PKT_STATUS, + val, (val & mask) =3D=3D mask, + 1000, CMD_PKT_STATUS_TIMEOUT_US); + if (ret) { + dev_err(adp->dsi.dev, "failed to write command FIFO\n"); + return ret; + } + + return 0; +} + +static int adp_dsi_write(struct adp_mipi_drv_private *adp, + const struct mipi_dsi_packet *packet) +{ + const u8 *tx_buf =3D packet->payload; + int len =3D packet->payload_length, pld_data_bytes =3D sizeof(u32), ret; + __le32 word; + u32 val; + + while (len) { + if (len < pld_data_bytes) { + word =3D 0; + memcpy(&word, tx_buf, len); + writel(le32_to_cpu(word), adp->mipi + DSI_GEN_PLD_DATA); + len =3D 0; + } else { + memcpy(&word, tx_buf, pld_data_bytes); + writel(le32_to_cpu(word), adp->mipi + DSI_GEN_PLD_DATA); + tx_buf +=3D pld_data_bytes; + len -=3D pld_data_bytes; + } + + ret =3D readl_poll_timeout(adp->mipi + DSI_CMD_PKT_STATUS, + val, !(val & GEN_PLD_W_FULL), 1000, + CMD_PKT_STATUS_TIMEOUT_US); + if (ret) { + dev_err(adp->dsi.dev, + "failed to get available write payload FIFO\n"); + return ret; + } + } + + word =3D 0; + memcpy(&word, packet->header, sizeof(packet->header)); + return adp_dsi_gen_pkt_hdr_write(adp, le32_to_cpu(word)); +} + +static int adp_dsi_read(struct adp_mipi_drv_private *adp, + const struct mipi_dsi_msg *msg) +{ + int i, j, ret, len =3D msg->rx_len; + u8 *buf =3D msg->rx_buf; + u32 val; + + /* Wait end of the read operation */ + ret =3D readl_poll_timeout(adp->mipi + DSI_CMD_PKT_STATUS, + val, !(val & GEN_RD_CMD_BUSY), + 1000, CMD_PKT_STATUS_TIMEOUT_US); + if (ret) { + dev_err(adp->dsi.dev, "Timeout during read operation\n"); + return ret; + } + + for (i =3D 0; i < len; i +=3D 4) { + /* Read fifo must not be empty before all bytes are read */ + ret =3D readl_poll_timeout(adp->mipi + DSI_CMD_PKT_STATUS, + val, !(val & GEN_PLD_R_EMPTY), + 1000, CMD_PKT_STATUS_TIMEOUT_US); + if (ret) { + dev_err(adp->dsi.dev, "Read payload FIFO is empty\n"); + return ret; + } + + val =3D readl(adp->mipi + DSI_GEN_PLD_DATA); + for (j =3D 0; j < 4 && j + i < len; j++) + buf[i + j] =3D val >> (8 * j); + } + + return ret; +} + +static ssize_t adp_dsi_host_transfer(struct mipi_dsi_host *host, + const struct mipi_dsi_msg *msg) +{ + struct adp_mipi_drv_private *adp =3D mipi_to_adp(host); + struct mipi_dsi_packet packet; + int ret, nb_bytes; + + ret =3D mipi_dsi_create_packet(&packet, msg); + if (ret) { + dev_err(adp->dsi.dev, "failed to create packet: %d\n", ret); + return ret; + } + + ret =3D adp_dsi_write(adp, &packet); + if (ret) + return ret; + + if (msg->rx_buf && msg->rx_len) { + ret =3D adp_dsi_read(adp, msg); + if (ret) + return ret; + nb_bytes =3D msg->rx_len; + } else { + nb_bytes =3D packet.size; + } + + return nb_bytes; +} + +static int adp_dsi_host_attach(struct mipi_dsi_host *host, + struct mipi_dsi_device *dev) +{ + struct adp_mipi_drv_private *adp =3D mipi_to_adp(host); + struct drm_bridge *next; + + next =3D devm_drm_of_get_bridge(adp->dsi.dev, adp->dsi.dev->of_node, 1, 0= ); + if (IS_ERR(next)) + return PTR_ERR(next); + + adp->next_bridge =3D next; + + drm_bridge_add(&adp->bridge); + return 0; +} + +static int adp_dsi_host_detach(struct mipi_dsi_host *host, + struct mipi_dsi_device *dev) +{ + struct adp_mipi_drv_private *adp =3D mipi_to_adp(host); + + drm_bridge_remove(&adp->bridge); + return 0; +} + +static const struct mipi_dsi_host_ops adp_dsi_host_ops =3D { + .transfer =3D adp_dsi_host_transfer, + .attach =3D adp_dsi_host_attach, + .detach =3D adp_dsi_host_detach, +}; + +static int adp_dsi_bridge_attach(struct drm_bridge *bridge, + enum drm_bridge_attach_flags flags) +{ + struct adp_mipi_drv_private *adp =3D + container_of(bridge, struct adp_mipi_drv_private, bridge); + + return drm_bridge_attach(bridge->encoder, adp->next_bridge, bridge, flags= ); +} + +static const struct drm_bridge_funcs adp_dsi_bridge_funcs =3D { + .attach =3D adp_dsi_bridge_attach, +}; + +static int adp_mipi_probe(struct platform_device *pdev) +{ + struct adp_mipi_drv_private *adp; + + adp =3D devm_kzalloc(&pdev->dev, sizeof(*adp), GFP_KERNEL); + if (!adp) + return -ENOMEM; + + adp->mipi =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(adp->mipi)) { + dev_err(&pdev->dev, "failed to map mipi mmio"); + return PTR_ERR(adp->mipi); + } + + adp->dsi.dev =3D &pdev->dev; + adp->dsi.ops =3D &adp_dsi_host_ops; + adp->bridge.funcs =3D &adp_dsi_bridge_funcs; + adp->bridge.of_node =3D pdev->dev.of_node; + adp->bridge.type =3D DRM_MODE_CONNECTOR_DSI; + dev_set_drvdata(&pdev->dev, adp); + return mipi_dsi_host_register(&adp->dsi); +} + +static void adp_mipi_remove(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct adp_mipi_drv_private *adp =3D dev_get_drvdata(dev); + + mipi_dsi_host_unregister(&adp->dsi); +} + +static const struct of_device_id adp_mipi_of_match[] =3D { + { .compatible =3D "apple,h7-display-pipe-mipi", }, + { }, +}; +MODULE_DEVICE_TABLE(of, adp_mipi_of_match); + +static struct platform_driver adp_mipi_platform_driver =3D { + .driver =3D { + .name =3D "adp-mipi", + .of_match_table =3D adp_mipi_of_match, + }, + .probe =3D adp_mipi_probe, + .remove =3D adp_mipi_remove, +}; + +module_platform_driver(adp_mipi_platform_driver); + +MODULE_DESCRIPTION("Apple Display Pipe MIPI driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/gpu/drm/adp/adp_drv.c b/drivers/gpu/drm/adp/adp_drv.c new file mode 100644 index 0000000000000000000000000000000000000000..9384490e2895f7808a987b0aec1= 47b52516a2f8c --- /dev/null +++ b/drivers/gpu/drm/adp/adp_drv.c @@ -0,0 +1,594 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define ADP_INT_STATUS 0x34 +#define ADP_INT_STATUS_INT_MASK 0x7 +#define ADP_INT_STATUS_VBLANK 0x1 +#define ADP_CTRL 0x100 +#define ADP_CTRL_VBLANK_ON 0x12 +#define ADP_CTRL_FIFO_ON 0x601 +#define ADP_SCREEN_SIZE 0x0c +#define ADP_SCREEN_HSIZE GENMASK(15, 0) +#define ADP_SCREEN_VSIZE GENMASK(31, 16) + +#define ADBE_FIFO 0x10c0 +#define ADBE_FIFO_SYNC 0xc0000000 + +#define ADBE_BLEND_BYPASS 0x2020 +#define ADBE_BLEND_EN1 0x2028 +#define ADBE_BLEND_EN2 0x2074 +#define ADBE_BLEND_EN3 0x202c +#define ADBE_BLEND_EN4 0x2034 +#define ADBE_MASK_BUF 0x2200 + +#define ADBE_SRC_START 0x4040 +#define ADBE_SRC_SIZE 0x4048 +#define ADBE_DST_START 0x4050 +#define ADBE_DST_SIZE 0x4054 +#define ADBE_STRIDE 0x4038 +#define ADBE_FB_BASE 0x4030 + +#define ADBE_LAYER_EN1 0x4020 +#define ADBE_LAYER_EN2 0x4068 +#define ADBE_LAYER_EN3 0x40b4 +#define ADBE_LAYER_EN4 0x40f4 +#define ADBE_SCALE_CTL 0x40ac +#define ADBE_SCALE_CTL_BYPASS 0x100000 + +#define ADBE_LAYER_CTL 0x1038 +#define ADBE_LAYER_CTL_ENABLE 0x10000 + +#define ADBE_PIX_FMT 0x402c +#define ADBE_PIX_FMT_XRGB32 0x53e4001 + +static int adp_open(struct inode *inode, struct file *filp) +{ + /* + * The modesetting driver does not check the non-desktop connector + * property and keeps the device open and locked. If the touchbar daemon + * opens the device first modesetting breaks the whole X session. + * Simply refuse to open the device for X11 server processes as + * workaround. + */ + if (current->comm[0] =3D=3D 'X') + return -EBUSY; + + return drm_open(inode, filp); +} + +static const struct file_operations adp_fops =3D { + .owner =3D THIS_MODULE, + .open =3D adp_open, + .release =3D drm_release, + .unlocked_ioctl =3D drm_ioctl, + .compat_ioctl =3D drm_compat_ioctl, + .poll =3D drm_poll, + .read =3D drm_read, + .llseek =3D noop_llseek, + .mmap =3D drm_gem_mmap, + .fop_flags =3D FOP_UNSIGNED_OFFSET, + DRM_GEM_DMA_UNMAPPED_AREA_FOPS +}; + +static int adp_drm_gem_dumb_create(struct drm_file *file_priv, + struct drm_device *drm, + struct drm_mode_create_dumb *args) +{ + args->height =3D ALIGN(args->height, 64); + args->size =3D args->pitch * args->height; + + return drm_gem_dma_dumb_create_internal(file_priv, drm, args); +} + +static const struct drm_driver adp_driver =3D { + .driver_features =3D DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, + .fops =3D &adp_fops, + DRM_GEM_DMA_DRIVER_OPS_VMAP_WITH_DUMB_CREATE(adp_drm_gem_dumb_create), + .name =3D "adp", + .desc =3D "Apple Display Pipe DRM Driver", + .date =3D "20230412", + .major =3D 0, + .minor =3D 1, +}; + +struct adp_drv_private { + struct drm_device drm; + struct drm_crtc crtc; + struct drm_encoder encoder; + struct drm_connector *connector; + struct drm_bridge *next_bridge; + void __iomem *be; + void __iomem *fe; + u32 *mask_buf; + u64 mask_buf_size; + dma_addr_t mask_iova; + int be_irq; + int fe_irq; + spinlock_t irq_lock; + struct drm_pending_vblank_event *event; +}; + +struct adp_plane { + struct drm_plane base_plane; + u8 id; +}; + +#define to_adp(x) container_of(x, struct adp_drv_private, drm) +#define crtc_to_adp(x) container_of(x, struct adp_drv_private, crtc) + +static int adp_plane_atomic_check(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct drm_plane_state *new_plane_state; + struct drm_crtc_state *crtc_state; + + new_plane_state =3D drm_atomic_get_new_plane_state(state, plane); + + if (!new_plane_state->crtc) + return 0; + + crtc_state =3D drm_atomic_get_crtc_state(state, new_plane_state->crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + return drm_atomic_helper_check_plane_state(new_plane_state, + crtc_state, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + true, true); +} + +static void adp_plane_atomic_update(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct adp_drv_private *adp; + struct drm_rect src_rect; + struct drm_gem_dma_object *obj; + struct drm_framebuffer *fb; + struct drm_plane_state *new_state =3D drm_atomic_get_new_plane_state(stat= e, plane); + u32 src_pos, src_size, dst_pos, dst_size; + + if (!plane || !new_state) + return; + + fb =3D new_state->fb; + if (!fb) + return; + adp =3D to_adp(plane->dev); + + drm_rect_fp_to_int(&src_rect, &new_state->src); + src_pos =3D src_rect.x1 << 16 | src_rect.y1; + dst_pos =3D new_state->dst.x1 << 16 | new_state->dst.y1; + src_size =3D drm_rect_width(&src_rect) << 16 | drm_rect_height(&src_rect); + dst_size =3D drm_rect_width(&new_state->dst) << 16 | + drm_rect_height(&new_state->dst); + writel(src_pos, adp->be + ADBE_SRC_START); + writel(src_size, adp->be + ADBE_SRC_SIZE); + writel(dst_pos, adp->be + ADBE_DST_START); + writel(dst_size, adp->be + ADBE_DST_SIZE); + writel(fb->pitches[0], adp->be + ADBE_STRIDE); + obj =3D drm_fb_dma_get_gem_obj(fb, 0); + if (obj) + writel(obj->dma_addr + fb->offsets[0], adp->be + ADBE_FB_BASE); + + writel(BIT(0), adp->be + ADBE_LAYER_EN1); + writel(BIT(0), adp->be + ADBE_LAYER_EN2); + writel(BIT(0), adp->be + ADBE_LAYER_EN3); + writel(BIT(0), adp->be + ADBE_LAYER_EN4); + writel(ADBE_SCALE_CTL_BYPASS, adp->be + ADBE_SCALE_CTL); + writel(ADBE_LAYER_CTL_ENABLE | BIT(0), adp->be + ADBE_LAYER_CTL); + writel(ADBE_PIX_FMT_XRGB32, adp->be + ADBE_PIX_FMT); +} + +static void adp_plane_atomic_disable(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct adp_drv_private *adp =3D to_adp(plane->dev); + + writel(0x0, adp->be + ADBE_LAYER_EN1); + writel(0x0, adp->be + ADBE_LAYER_EN2); + writel(0x0, adp->be + ADBE_LAYER_EN3); + writel(0x0, adp->be + ADBE_LAYER_EN4); + writel(ADBE_LAYER_CTL_ENABLE, adp->be + ADBE_LAYER_CTL); +} + +static const struct drm_plane_helper_funcs adp_plane_helper_funcs =3D { + .atomic_check =3D adp_plane_atomic_check, + .atomic_update =3D adp_plane_atomic_update, + .atomic_disable =3D adp_plane_atomic_disable, + DRM_GEM_SHADOW_PLANE_HELPER_FUNCS +}; + +static const struct drm_plane_funcs adp_plane_funcs =3D { + .update_plane =3D drm_atomic_helper_update_plane, + .disable_plane =3D drm_atomic_helper_disable_plane, + DRM_GEM_SHADOW_PLANE_FUNCS +}; + +static const u32 plane_formats[] =3D { + DRM_FORMAT_XRGB8888, +}; + +#define ALL_CRTCS 1 + +static struct adp_plane *adp_plane_new(struct adp_drv_private *adp, u8 id) +{ + struct drm_device *drm =3D &adp->drm; + struct adp_plane *plane; + enum drm_plane_type plane_type; + + plane_type =3D (id =3D=3D 0) ? DRM_PLANE_TYPE_PRIMARY : + DRM_PLANE_TYPE_OVERLAY; + + plane =3D drmm_universal_plane_alloc(drm, struct adp_plane, base_plane, + ALL_CRTCS, &adp_plane_funcs, + plane_formats, ARRAY_SIZE(plane_formats), + NULL, plane_type, "plane %d", id); + if (!plane) { + drm_err(drm, "failed to allocate plane"); + return ERR_PTR(-ENOMEM); + } + plane->id =3D id; + + drm_plane_helper_add(&plane->base_plane, &adp_plane_helper_funcs); + return plane; +} + +static void adp_enable_vblank(struct adp_drv_private *adp) +{ + u32 cur_ctrl; + + writel(ADP_INT_STATUS_INT_MASK, adp->fe + ADP_INT_STATUS); + + cur_ctrl =3D readl(adp->fe + ADP_CTRL); + writel(cur_ctrl | ADP_CTRL_VBLANK_ON, adp->fe + ADP_CTRL); +} + +static int adp_crtc_enable_vblank(struct drm_crtc *crtc) +{ + struct drm_device *dev =3D crtc->dev; + struct adp_drv_private *adp =3D to_adp(dev); + + adp_enable_vblank(adp); + + return 0; +} + +static void adp_disable_vblank(struct adp_drv_private *adp) +{ + u32 cur_ctrl; + + cur_ctrl =3D readl(adp->fe + ADP_CTRL); + writel(cur_ctrl & ~ADP_CTRL_VBLANK_ON, adp->fe + ADP_CTRL); + writel(ADP_INT_STATUS_INT_MASK, adp->fe + ADP_INT_STATUS); +} + +static void adp_crtc_disable_vblank(struct drm_crtc *crtc) +{ + struct drm_device *dev =3D crtc->dev; + struct adp_drv_private *adp =3D to_adp(dev); + + adp_disable_vblank(adp); +} + +static void adp_crtc_atomic_enable(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct adp_drv_private *adp =3D crtc_to_adp(crtc); + + writel(BIT(0), adp->be + ADBE_BLEND_EN2); + writel(BIT(4), adp->be + ADBE_BLEND_EN1); + writel(BIT(0), adp->be + ADBE_BLEND_EN3); + writel(BIT(0), adp->be + ADBE_BLEND_BYPASS); + writel(BIT(0), adp->be + ADBE_BLEND_EN4); +} + +static void adp_crtc_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct adp_drv_private *adp =3D crtc_to_adp(crtc); + struct drm_crtc_state *old_state =3D drm_atomic_get_old_crtc_state(state,= crtc); + + drm_atomic_helper_disable_planes_on_crtc(old_state, false); + + writel(0x0, adp->be + ADBE_BLEND_EN2); + writel(0x0, adp->be + ADBE_BLEND_EN1); + writel(0x0, adp->be + ADBE_BLEND_EN3); + writel(0x0, adp->be + ADBE_BLEND_BYPASS); + writel(0x0, adp->be + ADBE_BLEND_EN4); + drm_crtc_vblank_off(crtc); +} + +static void adp_crtc_atomic_flush(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + u32 frame_num =3D 1; + struct adp_drv_private *adp =3D crtc_to_adp(crtc); + struct drm_crtc_state *new_state =3D drm_atomic_get_new_crtc_state(state,= crtc); + u64 new_size =3D ALIGN(new_state->mode.hdisplay * + new_state->mode.vdisplay * 4, PAGE_SIZE); + + if (new_size !=3D adp->mask_buf_size) { + if (adp->mask_buf) + dma_free_coherent(crtc->dev->dev, adp->mask_buf_size, + adp->mask_buf, adp->mask_iova); + adp->mask_buf =3D NULL; + if (new_size !=3D 0) { + adp->mask_buf =3D dma_alloc_coherent(crtc->dev->dev, new_size, + &adp->mask_iova, GFP_KERNEL); + memset(adp->mask_buf, 0xFF, new_size); + writel(adp->mask_iova, adp->be + ADBE_MASK_BUF); + } + adp->mask_buf_size =3D new_size; + } + writel(ADBE_FIFO_SYNC | frame_num, adp->be + ADBE_FIFO); + //FIXME: use adbe flush interrupt + spin_lock_irq(&crtc->dev->event_lock); + if (crtc->state->event) { + drm_crtc_vblank_get(crtc); + adp->event =3D crtc->state->event; + } + crtc->state->event =3D NULL; + spin_unlock_irq(&crtc->dev->event_lock); +} + +static const struct drm_crtc_funcs adp_crtc_funcs =3D { + .destroy =3D drm_crtc_cleanup, + .set_config =3D drm_atomic_helper_set_config, + .page_flip =3D drm_atomic_helper_page_flip, + .reset =3D drm_atomic_helper_crtc_reset, + .atomic_duplicate_state =3D drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state =3D drm_atomic_helper_crtc_destroy_state, + .enable_vblank =3D adp_crtc_enable_vblank, + .disable_vblank =3D adp_crtc_disable_vblank, +}; + + +static const struct drm_crtc_helper_funcs adp_crtc_helper_funcs =3D { + .atomic_enable =3D adp_crtc_atomic_enable, + .atomic_disable =3D adp_crtc_atomic_disable, + .atomic_flush =3D adp_crtc_atomic_flush, +}; + +static int adp_setup_crtc(struct adp_drv_private *adp) +{ + struct drm_device *drm =3D &adp->drm; + struct adp_plane *primary; + int ret; + + primary =3D adp_plane_new(adp, 0); + if (IS_ERR(primary)) + return PTR_ERR(primary); + + ret =3D drm_crtc_init_with_planes(drm, &adp->crtc, &primary->base_plane, + NULL, &adp_crtc_funcs, NULL); + if (ret) + return ret; + + drm_crtc_helper_add(&adp->crtc, &adp_crtc_helper_funcs); + return 0; +} + +static const struct drm_mode_config_funcs adp_mode_config_funcs =3D { + .fb_create =3D drm_gem_fb_create_with_dirty, + .atomic_check =3D drm_atomic_helper_check, + .atomic_commit =3D drm_atomic_helper_commit, +}; + +static int adp_setup_mode_config(struct adp_drv_private *adp) +{ + struct drm_device *drm =3D &adp->drm; + int ret; + u32 size; + + ret =3D drmm_mode_config_init(drm); + if (ret) + return ret; + + /* + * Query screen size restrict the frame buffer size to the screen size + * aligned to the next multiple of 64. This is not necessary but can be + * used as simple check for non-desktop devices. + * Xorg's modesetting driver does not care about the connector + * "non-desktop" property. The max frame buffer width or height can be + * easily checked and a device can be reject if the max width/height is + * smaller than 120 for example. + * Any touchbar daemon is not limited by this small framebuffer size. + */ + size =3D readl(adp->fe + ADP_SCREEN_SIZE); + + drm->mode_config.min_width =3D 32; + drm->mode_config.min_height =3D 32; + drm->mode_config.max_width =3D ALIGN(FIELD_GET(ADP_SCREEN_HSIZE, size), 6= 4); + drm->mode_config.max_height =3D ALIGN(FIELD_GET(ADP_SCREEN_VSIZE, size), = 64); + drm->mode_config.preferred_depth =3D 24; + drm->mode_config.prefer_shadow =3D 0; + drm->mode_config.funcs =3D &adp_mode_config_funcs; + + ret =3D adp_setup_crtc(adp); + if (ret) { + drm_err(drm, "failed to create crtc"); + return ret; + } + + adp->encoder.possible_crtcs =3D ALL_CRTCS; + ret =3D drm_simple_encoder_init(drm, &adp->encoder, DRM_MODE_ENCODER_DSI); + if (ret) { + drm_err(drm, "failed to init encoder"); + return ret; + } + + ret =3D drm_bridge_attach(&adp->encoder, adp->next_bridge, NULL, + DRM_BRIDGE_ATTACH_NO_CONNECTOR); + if (ret) { + drm_err(drm, "failed to init bridge chain"); + return ret; + } + + adp->connector =3D drm_bridge_connector_init(drm, &adp->encoder); + if (IS_ERR(adp->connector)) + return PTR_ERR(adp->connector); + + drm_connector_attach_encoder(adp->connector, &adp->encoder); + + ret =3D drm_vblank_init(drm, drm->mode_config.num_crtc); + if (ret < 0) { + drm_err(drm, "failed to initialize vblank"); + return ret; + } + + drm_mode_config_reset(drm); + + return 0; +} + +static int adp_parse_of(struct platform_device *pdev, struct adp_drv_priva= te *adp) +{ + struct device *dev =3D &pdev->dev; + + adp->be =3D devm_platform_ioremap_resource_byname(pdev, "be"); + if (IS_ERR(adp->be)) { + dev_err(dev, "failed to map display backend mmio"); + return PTR_ERR(adp->be); + } + + adp->fe =3D devm_platform_ioremap_resource_byname(pdev, "fe"); + if (IS_ERR(adp->fe)) { + dev_err(dev, "failed to map display pipe mmio"); + return PTR_ERR(adp->fe); + } + + adp->be_irq =3D platform_get_irq_byname(pdev, "be"); + if (adp->be_irq < 0) { + dev_err(dev, "failed to find be irq"); + return adp->be_irq; + } + + adp->fe_irq =3D platform_get_irq_byname(pdev, "fe"); + if (adp->fe_irq < 0) { + dev_err(dev, "failed to find fe irq"); + return adp->fe_irq; + } + + adp->next_bridge =3D devm_drm_of_get_bridge(dev, dev->of_node, 0, 0); + if (IS_ERR(adp->next_bridge)) { + if (PTR_ERR(adp->next_bridge) !=3D EPROBE_DEFER) + dev_err(dev, "failed to find next bridge"); + return PTR_ERR(adp->next_bridge); + } + + return 0; +} + +static irqreturn_t adp_fe_irq(int irq, void *arg) +{ + struct adp_drv_private *adp =3D (struct adp_drv_private *)arg; + u32 int_status; + u32 int_ctl; + + spin_lock(&adp->irq_lock); + + int_status =3D readl(adp->fe + ADP_INT_STATUS); + if (int_status & ADP_INT_STATUS_VBLANK) { + drm_crtc_handle_vblank(&adp->crtc); + spin_lock(&adp->crtc.dev->event_lock); + if (adp->event) { + int_ctl =3D readl(adp->fe + ADP_CTRL); + if ((int_ctl & 0xF00) =3D=3D 0x600) { + drm_crtc_send_vblank_event(&adp->crtc, adp->event); + adp->event =3D NULL; + drm_crtc_vblank_put(&adp->crtc); + } + } + spin_unlock(&adp->crtc.dev->event_lock); + } + + writel(int_status, adp->fe + ADP_INT_STATUS); + + spin_unlock(&adp->irq_lock); + + return IRQ_HANDLED; +} + +static int adp_probe(struct platform_device *pdev) +{ + struct adp_drv_private *adp; + int err; + + adp =3D devm_drm_dev_alloc(&pdev->dev, &adp_driver, struct adp_drv_privat= e, drm); + if (IS_ERR(adp)) + return PTR_ERR(adp); + + spin_lock_init(&adp->irq_lock); + + dev_set_drvdata(&pdev->dev, &adp->drm); + + err =3D adp_parse_of(pdev, adp); + if (err < 0) + return err; + + adp_disable_vblank(adp); + writel(ADP_CTRL_FIFO_ON | ADP_CTRL_VBLANK_ON, adp->fe + ADP_CTRL); + + err =3D adp_setup_mode_config(adp); + if (err < 0) + return err; + + err =3D devm_request_irq(&pdev->dev, adp->fe_irq, adp_fe_irq, 0, + "adp-fe", adp); + if (err) + return err; + + err =3D drm_dev_register(&adp->drm, 0); + if (err) + return err; + return 0; +} + +static void adp_remove(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct drm_device *drm =3D dev_get_drvdata(dev); + struct adp_drv_private *adp =3D to_adp(drm); + + adp_disable_vblank(adp); + drm_dev_unregister(drm); + dev_set_drvdata(dev, NULL); + drm_atomic_helper_shutdown(drm); +} + +static const struct of_device_id adp_of_match[] =3D { + { .compatible =3D "apple,h7-display-pipe", }, + { }, +}; +MODULE_DEVICE_TABLE(of, adp_of_match); + +static struct platform_driver adp_platform_driver =3D { + .driver =3D { + .name =3D "adp", + .of_match_table =3D adp_of_match, + }, + .probe =3D adp_probe, + .remove =3D adp_remove, +}; + +module_platform_driver(adp_platform_driver); + +MODULE_DESCRIPTION("Apple Display Pipe DRM driver"); +MODULE_LICENSE("GPL"); --=20 2.48.0 From nobody Mon Dec 15 21:46:46 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2675F2080DA; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mSTPNm64" Received: by smtp.kernel.org (Postfix) with ESMTPS id EC41BC4CEE6; Tue, 14 Jan 2025 21:38:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736890739; bh=VDgDWVGfEkGR3QdJku8jaSDzSVlfkBj7qA3Y2VPLcsk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=mSTPNm64AqXovEnsH7tTNHMx+8n3uGRvVINXflDEqGTzjH66yS3b51d0w9hxyUBa7 pF3jYErgtV/4YLz0BvwiQVQDs6nfQzp7wTIT9Bb/ZTlhySeQWB+b7d8lisndQLIh5k etw9EHmjPYM4Z0kM7gjO84z7nfXLAS7AQcbRe5wa+R5Bqc+4FVpl5o+Av5VGHDUtDN M0QYgLhUI0ZXYNfC2LPk9K8tXl3zYZy0h8Oq7x3YzJZChDyoJw0p58izJ3SeRxIlVc GOqm2+xVy3iYkzS3S0teoPk1rTtf4KPPc7+1W7PXbqUyyjG31btba4oNXYO5xY2AL5 4lneeLbSz+3dQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id DCB84C02188; Tue, 14 Jan 2025 21:38:58 +0000 (UTC) From: Sasha Finkelstein via B4 Relay Date: Tue, 14 Jan 2025 22:38:54 +0100 Subject: [PATCH v4 3/5] drm: panel: Add a panel driver for the Summit display Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250114-adpdrm-v4-3-e9b5260a39f1@gmail.com> References: <20250114-adpdrm-v4-0-e9b5260a39f1@gmail.com> In-Reply-To: <20250114-adpdrm-v4-0-e9b5260a39f1@gmail.com> To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jessica Zhang , asahi@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Alyssa Ross , Sasha Finkelstein , Nick Chan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1736890736; l=6078; i=fnkl.kernel@gmail.com; s=20241124; h=from:subject:message-id; bh=Ow0nORepBUNGoYohTBVqVkG339Ob1ZVg2nGQaMbNqFk=; b=tYG8gmFadyOL355y4NbZwgO2DyFWjqtEQ7ISKX+O+xLOX5bL4nihIUYzNxB6oki+r8s4587h7 3jr5CN7V9NnBCnj64PbrL/dDenKtzMPtt486YAgSeirVAI15uIDO9nj X-Developer-Key: i=fnkl.kernel@gmail.com; a=ed25519; pk=aSkp1PdZ+eF4jpMO6oLvz/YfT5XkBUneWwyhQrOgmsU= X-Endpoint-Received: by B4 Relay for fnkl.kernel@gmail.com/20241124 with auth_id=283 X-Original-From: Sasha Finkelstein Reply-To: fnkl.kernel@gmail.com From: Sasha Finkelstein This is the display panel used for the touchbar on laptops that have it. Co-developed-by: Nick Chan Signed-off-by: Nick Chan Signed-off-by: Sasha Finkelstein --- drivers/gpu/drm/panel/Kconfig | 9 +++ drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-summit.c | 132 +++++++++++++++++++++++++++++++= ++++ 3 files changed, 142 insertions(+) diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index d7469c565d1db8b8e974dd6c45d03d9352d99d63..5085a82e4bc695e85cabbc32008= 59bbe10cb0f91 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -925,6 +925,15 @@ config DRM_PANEL_SIMPLE that it can be automatically turned off when the panel goes into a low power state. =20 +config DRM_PANEL_SUMMIT + tristate "Apple Summit display panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y if you want to enable support for the "Summit" display panel + used as a touchbar on certain Apple laptops. + config DRM_PANEL_SYNAPTICS_R63353 tristate "Synaptics R63353-based panels" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 7dcf72646cacff11bab90c78e3b8b1f357e5f14a..10ac2e850f5cd6d6546439de754= 83466e4015d1a 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -89,6 +89,7 @@ obj-$(CONFIG_DRM_PANEL_SHARP_LS060T1SX01) +=3D panel-shar= p-ls060t1sx01.o obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7701) +=3D panel-sitronix-st7701.o obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) +=3D panel-sitronix-st7703.o obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) +=3D panel-sitronix-st7789v.o +obj-$(CONFIG_DRM_PANEL_SUMMIT) +=3D panel-summit.o obj-$(CONFIG_DRM_PANEL_SYNAPTICS_R63353) +=3D panel-synaptics-r63353.o obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) +=3D panel-sony-acx565akm.o obj-$(CONFIG_DRM_PANEL_SONY_TD4353_JDI) +=3D panel-sony-td4353-jdi.o diff --git a/drivers/gpu/drm/panel/panel-summit.c b/drivers/gpu/drm/panel/p= anel-summit.c new file mode 100644 index 0000000000000000000000000000000000000000..fb084f280c6fa3197b64876edd0= 3172dbdf962b3 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-summit.c @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include