From nobody Thu Dec 18 20:41:33 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D788D23C71A; Mon, 13 Jan 2025 14:53:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736780009; cv=none; b=BOZUy9RERRoMF9GL2euAx8GEA5+k5S/8HuO+153b33pzmT2W99pCPKdzaaY7QZq2tZ49j4se9WbTUDHCYCIkLyKS/Zt/L7lVdzdjU47PO9gkBaCgJrdAxqtOu15qjHwDOS5vRcO8+MJOdNV9DJsTeczB9lQbyNGFeSsCmF+IVvI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736780009; c=relaxed/simple; bh=Z0C6RU/UFQ/2LerIYU7F1fsX9ksYLRpt0mYB5iHnerU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ru+grsNquxGaVPJ/lCMTRESV86WO0WTnkRXBrg/K7EPou7OVxBMSMNgimUrPow2f1eIRF1nMHSnewJF5yvNw48J2JPLGTYOy7PRN2OrU8USxVdY8RHFcJfX04Osj5HCkVESngjQwethL+ybzSdNluFZQZ7xsw6k8JPNUvEYnnP4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=NVMbekaw; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="NVMbekaw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1736780006; bh=Z0C6RU/UFQ/2LerIYU7F1fsX9ksYLRpt0mYB5iHnerU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NVMbekawgO5pe+BiWih5M5vwZ4tE/w84LhwYF+OM5hgZmPz+D5Ud6bGxg7zi94rbE f6TE9vzE5V6ZipSDz4QQGc0+qicbkCiNVfOit717v8HSJZe4Zjt/OpcMyHs5j8VDSn DskJKPwm3UVOTjvPrL3G8gehZ+3JboaWVCBOPBk63qTbL7aGJGPM/UEK+jmfkUzmjw 4GlWlKOr+zROqfjvnjWQ4T+UcJB3I4AEwhXD2y8kwpo8aoxqNBuTnucgF4p2gBK2pG fVKZw20OKJJ+3BTP/PX1zu5Y0rb1BgBfbSD2cbzhcrxfNMwDVEkRzmrLG0DUkOit1R pzSl/zXuEe25Q== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id 0E91A17E0F97; Mon, 13 Jan 2025 15:53:25 +0100 (CET) From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, ck.hu@mediatek.com, jitao.shi@mediatek.com, jie.qiu@mediatek.com, junzhi.zhao@mediatek.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, dmitry.baryshkov@linaro.org, lewis.liao@mediatek.com, ives.chenjh@mediatek.com, tommyyl.chen@mediatek.com, jason-jh.lin@mediatek.com Subject: [PATCH v5 33/34] drm/mediatek: mtk_hdmi_common: Add var to enable interlaced modes Date: Mon, 13 Jan 2025 15:52:31 +0100 Message-ID: <20250113145232.227674-34-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20250113145232.227674-1-angelogioacchino.delregno@collabora.com> References: <20250113145232.227674-1-angelogioacchino.delregno@collabora.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add an interlace_allowed bool member to struct mtk_hdmi_ver_conf which will be used to signal whether interlaced modes are supported by the bridge (in our case, the HDMI IP), and enable it for HDMIv2. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_hdmi_common.c | 1 + drivers/gpu/drm/mediatek/mtk_hdmi_common.h | 1 + drivers/gpu/drm/mediatek/mtk_hdmi_v2.c | 1 + 3 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c b/drivers/gpu/drm/m= ediatek/mtk_hdmi_common.c index 1804fe3f986c..be9b7a8e4a87 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c @@ -428,6 +428,7 @@ struct mtk_hdmi *mtk_hdmi_common_probe(struct platform_= device *pdev) hdmi->bridge.ddc =3D hdmi->ddc_adpt; hdmi->bridge.vendor =3D "MediaTek"; hdmi->bridge.product =3D "On-Chip HDMI"; + hdmi->bridge.interlace_allowed =3D ver_conf->interlace_allowed; =20 ret =3D devm_drm_bridge_add(dev, &hdmi->bridge); if (ret) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h b/drivers/gpu/drm/m= ediatek/mtk_hdmi_common.h index e74fe1371324..de5e064585f8 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h @@ -137,6 +137,7 @@ struct mtk_hdmi_ver_conf { const struct hdmi_codec_ops *codec_ops; const char * const *mtk_hdmi_clock_names; int num_clocks; + bool interlace_allowed; }; =20 struct mtk_hdmi_conf { diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c b/drivers/gpu/drm/media= tek/mtk_hdmi_v2.c index c97c77947c14..5145698158f6 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c @@ -1292,6 +1292,7 @@ static const struct mtk_hdmi_ver_conf mtk_hdmi_conf_v= 2 =3D { .codec_ops =3D &mtk_hdmi_v2_audio_codec_ops, .mtk_hdmi_clock_names =3D mtk_hdmi_v2_clk_names, .num_clocks =3D MTK_HDMI_V2_CLK_COUNT, + .interlace_allowed =3D true, }; =20 static const struct mtk_hdmi_conf mtk_hdmi_conf_mt8188 =3D { --=20 2.47.0