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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-5f882624f77sm3606806eaf.7.2025.01.13.13.43.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jan 2025 13:43:24 -0800 (PST) From: David Lechner Date: Mon, 13 Jan 2025 15:43:18 -0600 Subject: [PATCH v4 1/2] iio: adc: ad7173: move fwnode_irq_get_byname() call site Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250113-iio-adc-ad7313-fix-non-const-info-struct-v4-1-b63be3ecac4a@baylibre.com> References: <20250113-iio-adc-ad7313-fix-non-const-info-struct-v4-0-b63be3ecac4a@baylibre.com> In-Reply-To: <20250113-iio-adc-ad7313-fix-non-const-info-struct-v4-0-b63be3ecac4a@baylibre.com> To: Jonathan Cameron , Dumitru Ceclan Cc: Michael Hennerich , Nuno Sa , Michael Walle , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Guillaume Ranquet , David Lechner X-Mailer: b4 0.14.2 Move the call to fwnode_irq_get_byname() from the driver-specific ad7173_fw_parse_device_config() to the shared ad_sd_init() function. The main reason for this is that we want struct ad_sigma_delta_info to be static const data that describes the actual ADC chip, not the application-specific configuration or any runtime state. Previously, this struct was being used to pass the IRQ number to the shared ad_sd_init() function. Now, this is replaced by a boolean flag that is set at compile time and the ad_sd_init() function handles looking up the IRQ number instead. This also has the added benefit that if any other drivers need to make use of this in the future, they just have to set the flag and the shared code will take care of the rest rather than duplicating the code in each driver. Signed-off-by: David Lechner --- v4 changes: * New patch - replaces "iio: adc: ad7173: remove special handling for irq number" --- drivers/iio/adc/ad7173.c | 7 +------ drivers/iio/adc/ad_sigma_delta.c | 11 ++++++++--- include/linux/iio/adc/ad_sigma_delta.h | 4 ++-- 3 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 6c4ed10ae580d66287857252ce9a69cfaa45db0b..bb9cddd8c9d33f81df95e5001d6= 2a8ceb684d348 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -871,6 +871,7 @@ static const struct ad_sigma_delta_info ad7173_sigma_de= lta_info =3D { .disable_one =3D ad7173_disable_one, .set_mode =3D ad7173_set_mode, .has_registers =3D true, + .has_named_irqs =3D true, .addr_shift =3D 0, .read_mask =3D BIT(6), .status_ch_mask =3D GENMASK(3, 0), @@ -1515,12 +1516,6 @@ static int ad7173_fw_parse_device_config(struct iio_= dev *indio_dev) return ret; } =20 - ret =3D fwnode_irq_get_byname(dev_fwnode(dev), "rdy"); - if (ret < 0) - return dev_err_probe(dev, ret, "Interrupt 'rdy' is required\n"); - - st->sigma_delta_info.irq_line =3D ret; - return ad7173_fw_parse_channel_config(indio_dev); } =20 diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_de= lta.c index d5d81581ab34099cef30ec63944ce1171c80ec14..10e635fc4fa4bf0ecad279962a2= b944153b436be 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -801,10 +801,15 @@ int ad_sd_init(struct ad_sigma_delta *sigma_delta, st= ruct iio_dev *indio_dev, =20 spin_lock_init(&sigma_delta->irq_lock); =20 - if (info->irq_line) - sigma_delta->irq_line =3D info->irq_line; - else + if (info->has_named_irqs) { + sigma_delta->irq_line =3D fwnode_irq_get_byname(dev_fwnode(&spi->dev), + "rdy"); + if (sigma_delta->irq_line < 0) + return dev_err_probe(&spi->dev, sigma_delta->irq_line, + "Interrupt 'rdy' is required\n"); + } else { sigma_delta->irq_line =3D spi->irq; + } =20 sigma_delta->rdy_gpiod =3D devm_gpiod_get_optional(&spi->dev, "rdy", GPIO= D_IN); if (IS_ERR(sigma_delta->rdy_gpiod)) diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc= /ad_sigma_delta.h index 417073c52380f60a1a45a4924f4f556b64832295..f242b285081b8d304ca25ae9533= 7425e5842269a 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -46,6 +46,7 @@ struct iio_dev; * modify or drop the sample data, it, may be NULL. * @has_registers: true if the device has writable and readable registers,= false * if there is just one read-only sample data shift register. + * @has_named_irqs: Set to true if there is more than one IRQ line. * @addr_shift: Shift of the register address in the communications regist= er. * @read_mask: Mask for the communications register having the read bit se= t. * @status_ch_mask: Mask for the channel number stored in status register. @@ -53,7 +54,6 @@ struct iio_dev; * be used. * @irq_flags: flags for the interrupt used by the triggered buffer * @num_slots: Number of sequencer slots - * @irq_line: IRQ for reading conversions. If 0, spi->irq will be used * @num_resetclks: Number of SPI clk cycles with MOSI=3D1 to reset the chi= p. */ struct ad_sigma_delta_info { @@ -64,13 +64,13 @@ struct ad_sigma_delta_info { int (*disable_one)(struct ad_sigma_delta *, unsigned int chan); int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sampl= e); bool has_registers; + bool has_named_irqs; unsigned int addr_shift; unsigned int read_mask; unsigned int status_ch_mask; unsigned int data_reg; unsigned long irq_flags; unsigned int num_slots; - int irq_line; unsigned int num_resetclks; }; =20 --=20 2.43.0 From nobody Thu Dec 18 10:00:06 2025 Received: from mail-oi1-f175.google.com (mail-oi1-f175.google.com [209.85.167.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CF5E1F8F04 for ; Mon, 13 Jan 2025 21:43:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736804612; cv=none; b=Dcq7fq2JnHzlD1VPlpuTjGGLh0ts/LDN2HOks3+gdKm7iwsDjpK8AKJTcA4S11q9W+CVQw21iE9A7w+es8DtX/0kRI31awrMDk0qC268PkggBZLs9cXnNkxaU8+iIY1pU9h45CM/hrHCn2/0a9vk/J4JL9FMdpjRPQKMCKbvGVc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736804612; c=relaxed/simple; bh=RwybvySzMDyDADp+ldKkuxnWZZzr/uh8rhwJvNlUelE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fuhx4xxHqPr7OoVc+U+b6C/0IqzS5It0PygTzFcvN+qT7p/Eb6x0Usg486OnbyFic4JMrZbh/IqjyWvcKN2ir0kG03ahWKzUh0Gu9XQVr58OX7Do1V+MggewcydSAkerLwryOJE+9hisEiaYxk4fKDUBblh1Dmt7kJzpDKCHW60= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=U4evbOXj; arc=none smtp.client-ip=209.85.167.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="U4evbOXj" Received: by mail-oi1-f175.google.com with SMTP id 5614622812f47-3eb9bbcc936so2781734b6e.0 for ; Mon, 13 Jan 2025 13:43:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1736804609; x=1737409409; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=nZl72tO//AZAOMrmNAEartHULlMOgP7HOkjgJ8DKKTA=; b=U4evbOXjACSFtdPrwnF2zaKtn7xW26RfyURUutSLNHcvg3kdKvgmcVHSxtbFbzHVdT tFPG9R1k6HCG4lUVmRu+RHrJT3vHT4s44+q5/Fr0aatQo/DLB9uHDk5t0E8gpL63ZNdF h7RahLrRLjrDrO941MX9z/YRtbdnbs1ZLao7rt6e2J/9+T9CUjKmv6T/qlP58JDmogor v2cA6k99cUnJFFayLTulhjhgwEpz7W+f6r/XnljbRRkEsAqW4HX/bmiEUevW/HApHzoQ cnTmaBiHbE+DPbPRxkCPAoE1J5QPeEGg1v6nYtqJVGdVGDUPEnz+OUfzS8zF1JmijvMO PnUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736804609; x=1737409409; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nZl72tO//AZAOMrmNAEartHULlMOgP7HOkjgJ8DKKTA=; b=OlTosibX4IQ1oinhvPZALDSOsg/4qc3wQ8vUw6QRjOHZQnTonZdMgax1yF1clnI/S9 TfTOKpZDUe4NoT4t5vMIhm7Ltr3EA7m4iPqABCpG1CGbkoHkq3Kc37UK27VmxUDPC1Kr XRKMOEjXsGeQqzbUNPBLlVyqKOG65a3MlO29l6/bCsKB2PAb0lmKu42VtvO6RpP4GbKv 0FS98HSfXXu3XyMw56y/jnW6ChOCCTE9y22OMRto485qrhgjR+hSqQ4CtFvpeB6B5rIq Os+hoIi/xB/d53QBYABQn0x0ZBKvlQayNSluS5iotFUImhymKwCOFtKkcsdzaNijFiBG SgAA== X-Forwarded-Encrypted: i=1; AJvYcCWZA8tEJ9D16Q8OovnIz+wQQj+p4lWGW7qikMekAcajyoXa9qW7TPuwTZpihPfpl1W+K/q9Km8BFmzqiJU=@vger.kernel.org X-Gm-Message-State: AOJu0YxXnc+W9SFluWvDyxMdWhIUkgBIrFG0LrV9jZM5eGca45j2U2ju no4uunRfCI96fByYRonN5Kqa8lS/FhzN6bQBbkB2Jrsqu2RqYo0PxHjdPmdGbZs= X-Gm-Gg: ASbGncvTPcBbUwMiTIEgPEedYTm8ntfHNjvRzOWkj1uY/C/lZyyON42n3wblkSBAJfa 15L22rTGh0ZGHjBLgCkCWiBMvT/WXPjJIDc+7MOreF1rHGbCQvc/bVyCokANZHjHA06QcfYwwkl KOjvh9k4WNgnSt5vAzdAEJz7Sky/riK9YABcouhMEplhvrvTb8tqSWVoQp38xcxnroQOo8ycBw1 NJI13fuXH3jLkFqIcjNbdTrkt5FNBmhBZXf1C9zqbRffjoZmNdjS79AEMgtZSG6hqhBF6OHbPQL CfmQM9NZWmTV X-Google-Smtp-Source: AGHT+IET+OdxnogbFJPMg4v3T/8OBvjFS4R6xtteziA+K9iVRdHpEWl6jTpjLnySob5uSFMF8qC8WA== X-Received: by 2002:a05:6808:2dca:b0:3ea:5be6:a68a with SMTP id 5614622812f47-3ef2ec2680dmr12983450b6e.15.1736804609103; Mon, 13 Jan 2025 13:43:29 -0800 (PST) Received: from [127.0.1.1] (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-5f882624f77sm3606806eaf.7.2025.01.13.13.43.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Jan 2025 13:43:27 -0800 (PST) From: David Lechner Date: Mon, 13 Jan 2025 15:43:19 -0600 Subject: [PATCH v4 2/2] iio: adc: ad7173: don't make copy of ad_sigma_delta_info struct Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250113-iio-adc-ad7313-fix-non-const-info-struct-v4-2-b63be3ecac4a@baylibre.com> References: <20250113-iio-adc-ad7313-fix-non-const-info-struct-v4-0-b63be3ecac4a@baylibre.com> In-Reply-To: <20250113-iio-adc-ad7313-fix-non-const-info-struct-v4-0-b63be3ecac4a@baylibre.com> To: Jonathan Cameron , Dumitru Ceclan Cc: Michael Hennerich , Nuno Sa , Michael Walle , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Guillaume Ranquet , David Lechner X-Mailer: b4 0.14.2 Use two separate static const struct ad_sigma_delta_info instances instead of making a copy for each driver instance. Typically in the IIO subsystem, we use multiple static const instances of the same struct when there are different variants of the same family of devices as opposed to making a copy for each driver instance and modifying it. Signed-off-by: David Lechner --- v4 changes: * Adapted for reworked patch adding has_named_irqs field. * Dropped Tested-by due to significant changes in the previous patch. v3 changes: * Rebased on iio/testing and fixed merge conflicts. --- drivers/iio/adc/ad7173.c | 482 +++++++++++++++++++++++++------------------= ---- 1 file changed, 255 insertions(+), 227 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index bb9cddd8c9d33f81df95e5001d62a8ceb684d348..8b438c689594d11091fee9e67a7= fab4eb5af8afd 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -171,6 +171,7 @@ struct ad7173_device_info { unsigned int clock; unsigned int id; char *name; + const struct ad_sigma_delta_info *sd_info; bool has_current_inputs; bool has_vincom_input; bool has_temp; @@ -206,7 +207,6 @@ struct ad7173_channel { =20 struct ad7173_state { struct ad_sigma_delta sd; - struct ad_sigma_delta_info sigma_delta_info; const struct ad7173_device_info *info; struct ad7173_channel *channels; struct regulator_bulk_data regulators[3]; @@ -265,228 +265,6 @@ static unsigned int ad4111_current_channel_config[] = =3D { 0x18B, /* 12:IIN3+ 11:IIN3=E2=88=92 */ }; =20 -static const struct ad7173_device_info ad4111_device_info =3D { - .name =3D "ad4111", - .id =3D AD4111_ID, - .num_voltage_in_div =3D 8, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 8, - .num_gpios =3D 2, - .higher_gpio_bits =3D true, - .has_temp =3D true, - .has_vincom_input =3D true, - .has_input_buf =3D true, - .has_current_inputs =3D true, - .has_int_ref =3D true, - .has_internal_fs_calibration =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4112_device_info =3D { - .name =3D "ad4112", - .id =3D AD4112_ID, - .num_voltage_in_div =3D 8, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 8, - .num_gpios =3D 2, - .higher_gpio_bits =3D true, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_current_inputs =3D true, - .has_int_ref =3D true, - .has_internal_fs_calibration =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4113_device_info =3D { - .name =3D "ad4113", - .id =3D AD4113_ID, - .num_voltage_in_div =3D 8, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 8, - .num_gpios =3D 2, - .data_reg_only_16bit =3D true, - .higher_gpio_bits =3D true, - .has_vincom_input =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4114_device_info =3D { - .name =3D "ad4114", - .id =3D AD4114_ID, - .num_voltage_in_div =3D 16, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 16, - .num_gpios =3D 4, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_internal_fs_calibration =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4115_device_info =3D { - .name =3D "ad4115", - .id =3D AD4115_ID, - .num_voltage_in_div =3D 16, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 16, - .num_gpios =3D 4, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_internal_fs_calibration =3D true, - .clock =3D 8 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad4115_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad4115_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4116_device_info =3D { - .name =3D "ad4116", - .id =3D AD4116_ID, - .num_voltage_in_div =3D 11, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 16, - .num_gpios =3D 4, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_internal_fs_calibration =3D true, - .clock =3D 4 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad4116_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad4116_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7172_2_device_info =3D { - .name =3D "ad7172-2", - .id =3D AD7172_2_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7172_4_device_info =3D { - .name =3D "ad7172-4", - .id =3D AD7172_4_ID, - .num_voltage_in =3D 9, - .num_channels =3D 8, - .num_configs =3D 8, - .num_gpios =3D 4, - .has_input_buf =3D true, - .has_ref2 =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7173_8_device_info =3D { - .name =3D "ad7173-8", - .id =3D AD7173_ID, - .num_voltage_in =3D 17, - .num_channels =3D 16, - .num_configs =3D 8, - .num_gpios =3D 4, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_ref2 =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7175_2_device_info =3D { - .name =3D "ad7175-2", - .id =3D AD7175_2_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7175_8_device_info =3D { - .name =3D "ad7175-8", - .id =3D AD7175_8_ID, - .num_voltage_in =3D 17, - .num_channels =3D 16, - .num_configs =3D 8, - .num_gpios =3D 4, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_ref2 =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7176_2_device_info =3D { - .name =3D "ad7176-2", - .id =3D AD7176_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_int_ref =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7177_2_device_info =3D { - .name =3D "ad7177-2", - .id =3D AD7177_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .odr_start_value =3D AD7177_ODR_START_VALUE, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - static const char *const ad7173_ref_sel_str[] =3D { [AD7173_SETUP_REF_SEL_EXT_REF] =3D "vref", [AD7173_SETUP_REF_SEL_EXT_REF2] =3D "vref2", @@ -864,7 +642,23 @@ static int ad7173_disable_one(struct ad_sigma_delta *s= d, unsigned int chan) return ad_sd_write_reg(sd, AD7173_REG_CH(chan), 2, 0); } =20 -static const struct ad_sigma_delta_info ad7173_sigma_delta_info =3D { +static const struct ad_sigma_delta_info ad7173_sigma_delta_info_4_slots = =3D { + .set_channel =3D ad7173_set_channel, + .append_status =3D ad7173_append_status, + .disable_all =3D ad7173_disable_all, + .disable_one =3D ad7173_disable_one, + .set_mode =3D ad7173_set_mode, + .has_registers =3D true, + .has_named_irqs =3D true, + .addr_shift =3D 0, + .read_mask =3D BIT(6), + .status_ch_mask =3D GENMASK(3, 0), + .data_reg =3D AD7173_REG_DATA, + .num_resetclks =3D 64, + .num_slots =3D 4, +}; + +static const struct ad_sigma_delta_info ad7173_sigma_delta_info_8_slots = =3D { .set_channel =3D ad7173_set_channel, .append_status =3D ad7173_append_status, .disable_all =3D ad7173_disable_all, @@ -877,6 +671,242 @@ static const struct ad_sigma_delta_info ad7173_sigma_= delta_info =3D { .status_ch_mask =3D GENMASK(3, 0), .data_reg =3D AD7173_REG_DATA, .num_resetclks =3D 64, + .num_slots =3D 8, +}; + +static const struct ad7173_device_info ad4111_device_info =3D { + .name =3D "ad4111", + .id =3D AD4111_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 8, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 8, + .num_gpios =3D 2, + .higher_gpio_bits =3D true, + .has_temp =3D true, + .has_vincom_input =3D true, + .has_input_buf =3D true, + .has_current_inputs =3D true, + .has_int_ref =3D true, + .has_internal_fs_calibration =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4112_device_info =3D { + .name =3D "ad4112", + .id =3D AD4112_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 8, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 8, + .num_gpios =3D 2, + .higher_gpio_bits =3D true, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_current_inputs =3D true, + .has_int_ref =3D true, + .has_internal_fs_calibration =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4113_device_info =3D { + .name =3D "ad4113", + .id =3D AD4113_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 8, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 8, + .num_gpios =3D 2, + .data_reg_only_16bit =3D true, + .higher_gpio_bits =3D true, + .has_vincom_input =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4114_device_info =3D { + .name =3D "ad4114", + .id =3D AD4114_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 16, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 16, + .num_gpios =3D 4, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_internal_fs_calibration =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4115_device_info =3D { + .name =3D "ad4115", + .id =3D AD4115_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 16, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 16, + .num_gpios =3D 4, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_internal_fs_calibration =3D true, + .clock =3D 8 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad4115_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad4115_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4116_device_info =3D { + .name =3D "ad4116", + .id =3D AD4116_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 11, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 16, + .num_gpios =3D 4, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_internal_fs_calibration =3D true, + .clock =3D 4 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad4116_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad4116_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7172_2_device_info =3D { + .name =3D "ad7172-2", + .id =3D AD7172_2_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7172_4_device_info =3D { + .name =3D "ad7172-4", + .id =3D AD7172_4_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 9, + .num_channels =3D 8, + .num_configs =3D 8, + .num_gpios =3D 4, + .has_input_buf =3D true, + .has_ref2 =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7173_8_device_info =3D { + .name =3D "ad7173-8", + .id =3D AD7173_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 17, + .num_channels =3D 16, + .num_configs =3D 8, + .num_gpios =3D 4, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_ref2 =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7175_2_device_info =3D { + .name =3D "ad7175-2", + .id =3D AD7175_2_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7175_8_device_info =3D { + .name =3D "ad7175-8", + .id =3D AD7175_8_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 17, + .num_channels =3D 16, + .num_configs =3D 8, + .num_gpios =3D 4, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_ref2 =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7176_2_device_info =3D { + .name =3D "ad7176-2", + .id =3D AD7176_ID, + .sd_info =3D &ad7173_sigma_delta_info_4_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_int_ref =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7177_2_device_info =3D { + .name =3D "ad7177-2", + .id =3D AD7177_ID, + .sd_info =3D &ad7173_sigma_delta_info_4_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .odr_start_value =3D AD7177_ODR_START_VALUE, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), }; =20 static int ad7173_setup(struct iio_dev *indio_dev) @@ -1547,9 +1577,7 @@ static int ad7173_probe(struct spi_device *spi) spi->mode =3D SPI_MODE_3; spi_setup(spi); =20 - st->sigma_delta_info =3D ad7173_sigma_delta_info; - st->sigma_delta_info.num_slots =3D st->info->num_configs; - ret =3D ad_sd_init(&st->sd, indio_dev, spi, &st->sigma_delta_info); + ret =3D ad_sd_init(&st->sd, indio_dev, spi, st->info->sd_info); if (ret) return ret; =20 --=20 2.43.0