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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f03769a8f8sm842165b6e.26.2025.01.10.09.40.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jan 2025 09:40:12 -0800 (PST) From: David Lechner Date: Fri, 10 Jan 2025 11:40:06 -0600 Subject: [PATCH v3 1/2] iio: adc: ad7173: remove special handling for irq number Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250110-iio-adc-ad7313-fix-non-const-info-struct-v3-1-41e1c9cdd1a7@baylibre.com> References: <20250110-iio-adc-ad7313-fix-non-const-info-struct-v3-0-41e1c9cdd1a7@baylibre.com> In-Reply-To: <20250110-iio-adc-ad7313-fix-non-const-info-struct-v3-0-41e1c9cdd1a7@baylibre.com> To: Jonathan Cameron , Dumitru Ceclan Cc: Michael Hennerich , Nuno Sa , Michael Walle , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Guillaume Ranquet , David Lechner X-Mailer: b4 0.14.2 Remove the int irq_line field in struct ad_sigma_delta_info and all code that referenced it. This struct is intended to be used as static const data. Currently, the only user that doesn't uses the static const struct directly, namely the ad7173 driver is making a copy of this struct to be able to modify the irq_line field. However, this field is written and never used due to the fact that ad_sd_init() which reads the field is called before ad7173_fw_parse_device_config() which writes it. The runtime behavior does not change since ad_sd_init() was already (unintentionally) being called with irq_line =3D 0. But, even though this could be considered a bug, the behavior was still correct. The SPI subsystem always uses the first interrupt in the interrupts array from the devicetree and the devicetree bindings for this family of chips specify that the RDY interrupt is always the first interrupt. Therefore, we don't actually need the special call to fwnode_irq_get_byname(), so it is removed in this patch instead of moving it to the correct place. Tested-by: Guillaume Ranquet Signed-off-by: David Lechner --- v3 changes: * Removed spurious change that was causing compiler error. * Rebased on iio/testing and resolved some merge conflicts. v2 changes: * Fixed chip name is subject line * Uwe's comment made me realize that the special case was actually never being used because of the ordering bug and could safely be removed rather than trying to preserve it. --- drivers/iio/adc/ad7173.c | 6 ------ drivers/iio/adc/ad_sigma_delta.c | 5 +---- include/linux/iio/adc/ad_sigma_delta.h | 2 -- 3 files changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 6c4ed10ae580d66287857252ce9a69cfaa45db0b..b92aca39d117a315d6b55951fba= 7c3b51787555a 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -1515,12 +1515,6 @@ static int ad7173_fw_parse_device_config(struct iio_= dev *indio_dev) return ret; } =20 - ret =3D fwnode_irq_get_byname(dev_fwnode(dev), "rdy"); - if (ret < 0) - return dev_err_probe(dev, ret, "Interrupt 'rdy' is required\n"); - - st->sigma_delta_info.irq_line =3D ret; - return ad7173_fw_parse_channel_config(indio_dev); } =20 diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_de= lta.c index d5d81581ab34099cef30ec63944ce1171c80ec14..38a72ced10326656b30fd39d7a7= 2cefe8c4c1aa5 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -801,10 +801,7 @@ int ad_sd_init(struct ad_sigma_delta *sigma_delta, str= uct iio_dev *indio_dev, =20 spin_lock_init(&sigma_delta->irq_lock); =20 - if (info->irq_line) - sigma_delta->irq_line =3D info->irq_line; - else - sigma_delta->irq_line =3D spi->irq; + sigma_delta->irq_line =3D spi->irq; =20 sigma_delta->rdy_gpiod =3D devm_gpiod_get_optional(&spi->dev, "rdy", GPIO= D_IN); if (IS_ERR(sigma_delta->rdy_gpiod)) diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc= /ad_sigma_delta.h index 417073c52380f60a1a45a4924f4f556b64832295..521e3dc95db9117b7df12710eaa= e3f373d1df7bc 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -53,7 +53,6 @@ struct iio_dev; * be used. * @irq_flags: flags for the interrupt used by the triggered buffer * @num_slots: Number of sequencer slots - * @irq_line: IRQ for reading conversions. If 0, spi->irq will be used * @num_resetclks: Number of SPI clk cycles with MOSI=3D1 to reset the chi= p. */ struct ad_sigma_delta_info { @@ -70,7 +69,6 @@ struct ad_sigma_delta_info { unsigned int data_reg; unsigned long irq_flags; unsigned int num_slots; - int irq_line; unsigned int num_resetclks; }; =20 --=20 2.43.0 From nobody Mon Feb 9 10:51:33 2026 Received: from mail-oi1-f176.google.com (mail-oi1-f176.google.com [209.85.167.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14941213E72 for ; Fri, 10 Jan 2025 17:40:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736530818; cv=none; b=dVt5w35jWIt0/sfmwuo/i2Dkz2upNw9jHrAoLCLFszdCWzz7pe6chvI3mwrL4Kh9WpYOmmc1pUPiJAFXndS1aIJ3ZdCMA5vAZyyEH8Y2penWqDPbGuzqaAN6eEjQ/sGwMoMQIhe1fNH07AwVRNY7lS+zrfwY8kCrHGZmgLZSOfs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736530818; c=relaxed/simple; bh=ezpa4lmc7COFUrj/dpxuduxQWeAY856e//w1Ffinljk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cXTapc+9iovSnMRqQPxbdbdjuQ0WrOKw2DEl5YP9mLlBTKxy0rQoqV7WU6iDO/dSFcFrQpmbA5tiKFQXyRDfvzNZPXePKesTSgnRWspPRa4fR/9vddbASbSMwHSqZYegTeKgWrZzAqRqj+Rjye0VW53TQ2CvNpNNWiIwQxl88/U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=ZvkIdHlX; arc=none smtp.client-ip=209.85.167.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="ZvkIdHlX" Received: by mail-oi1-f176.google.com with SMTP id 5614622812f47-3ebbe804913so634623b6e.0 for ; Fri, 10 Jan 2025 09:40:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1736530815; x=1737135615; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=2WarB2DVEPhDUQ8fzbEG+74huWRFT9tjmACbL3KjyZ8=; b=ZvkIdHlXlh6MeCPXvATYWey9RLTDqbvrrLNDLoSe4rBdzs6l9YvRaSIP3kr9EIlc7W MkxvRBLp7LHSbUKBED/qUCvnUXZlA3e9zTjvKHN3ZLIVoKeH/35HNyJBM9ajz3YkvTqU lFXSUwwxxfjtgmZMJ4crdBKE/qBmH3qOj5dke0clCrD6DbbYfYp3+QY8m1jnuWocZ5HZ VKuoc2ft6LlJ+1Ou1LadPrUtqxau8xW3or5fCrRhp0E0CLhz46diOSxPvSm62Ozz/QZK 9TuYTYhSlp23GoP2yF5QAT2YS3ObjPKH1+mY9032Lv7v6ADMy0FopBtJlFCk+tCygb6E BKlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736530815; x=1737135615; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2WarB2DVEPhDUQ8fzbEG+74huWRFT9tjmACbL3KjyZ8=; b=ML+IPs+XCXmOMcIMo8TgfleeryFG5oNNFxzmmdTvc9+elCUxzBqkJaRR64XNStK4A9 L5oWU2oEC2eWO+DPj7qaCB08FDK+5iV6NRsdS/3b8a4x2Y1qC66ols6wNE3fO4OH5u/9 CoEL68VA6in3LrvLJQGC7medYsnGEZ+zBaBrBoOfCeP+bCEg2ZLRM0toxu/G66w6b4md V1olXeZKFzsTTH9iwwgHOVacBcekfpv+CZmh1MzuXY4egmgdNKKEDJDKw29zPCbKJ4oJ RR3/QGXUrdXXRjSostx48S+Bh8y9y76pArOZoe2EP2/ysfadWgG2AqJEAfCO0OiKx7H8 aUSQ== X-Forwarded-Encrypted: i=1; AJvYcCXE/h+fGZTCO0x2+2n5QSk2UQe5ZGk9afjGt7SU7APf56R71BmfWAZcnhWosekN+b1IT9e4cc1lCVe3U4Y=@vger.kernel.org X-Gm-Message-State: AOJu0Ywbe8g8qAnbvQSDRuwdwJVHw7fpESrGy+swznfeRksLzZFBqAmV PvAXYDGTcZnzn5pDNbCMnIlrEHvMuDNUWFXYEFrnGSYKbzorkwG3eEe5CWO1SAqGA5rlz+O2wWK v X-Gm-Gg: ASbGnctld4pOI9yOh29FCeYMg3J7vpYmAS8kwDBoJpihq12mNZGk9N/57uLjNm3YMAx pRN63K1Eb5EFmipqEqce+3ZMRppQxTQ1ml+cmx5ImmQNhwfI63jV0s/XZOZj04WiG83yKJI613A xeUy00s4nn+wxNyVy92TCmhdGg/OeQD4ZmoyoWjlQzK6zv0dwZ9UEVmHBNj+IM7ITCWmRteeWQU 9HywBLxhneglg6/2nIe4sAPKrLpBb5SsgtAU7EkokVmR1RdRFa1hKc5zHiMW3biP5R5Sa0AGUPL vYcsAVsttyQf X-Google-Smtp-Source: AGHT+IHNheLZVynLM9Cglmh44SOGgj81MgONZG8jhYGj+SVYP5VuvxJxVMBQ8W3gcqGhYEbcBFU45Q== X-Received: by 2002:a05:6808:1a0e:b0:3e3:bd1c:d584 with SMTP id 5614622812f47-3ef2ec6ddfbmr8373405b6e.9.1736530815097; Fri, 10 Jan 2025 09:40:15 -0800 (PST) Received: from [127.0.1.1] (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f03769a8f8sm842165b6e.26.2025.01.10.09.40.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Jan 2025 09:40:14 -0800 (PST) From: David Lechner Date: Fri, 10 Jan 2025 11:40:07 -0600 Subject: [PATCH v3 2/2] iio: adc: ad7173: don't make copy of ad_sigma_delta_info struct Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250110-iio-adc-ad7313-fix-non-const-info-struct-v3-2-41e1c9cdd1a7@baylibre.com> References: <20250110-iio-adc-ad7313-fix-non-const-info-struct-v3-0-41e1c9cdd1a7@baylibre.com> In-Reply-To: <20250110-iio-adc-ad7313-fix-non-const-info-struct-v3-0-41e1c9cdd1a7@baylibre.com> To: Jonathan Cameron , Dumitru Ceclan Cc: Michael Hennerich , Nuno Sa , Michael Walle , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Guillaume Ranquet , David Lechner X-Mailer: b4 0.14.2 Use two separate static const struct ad_sigma_delta_info instances instead of making a copy for each driver instance. Typically in the IIO subsystem, we use multiple static const instances of the same struct when there are different variants of the same family of devices as opposed to making a copy for each driver instance and modifying it. Tested-by: Guillaume Ranquet Signed-off-by: David Lechner --- v3 changes: * Rebased on iio/testing and fixed merge conflicts. --- drivers/iio/adc/ad7173.c | 481 +++++++++++++++++++++++++------------------= ---- 1 file changed, 254 insertions(+), 227 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index b92aca39d117a315d6b55951fba7c3b51787555a..4487841f994ff08f4da79d919fd= 61b0169922e51 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -171,6 +171,7 @@ struct ad7173_device_info { unsigned int clock; unsigned int id; char *name; + const struct ad_sigma_delta_info *sd_info; bool has_current_inputs; bool has_vincom_input; bool has_temp; @@ -206,7 +207,6 @@ struct ad7173_channel { =20 struct ad7173_state { struct ad_sigma_delta sd; - struct ad_sigma_delta_info sigma_delta_info; const struct ad7173_device_info *info; struct ad7173_channel *channels; struct regulator_bulk_data regulators[3]; @@ -265,228 +265,6 @@ static unsigned int ad4111_current_channel_config[] = =3D { 0x18B, /* 12:IIN3+ 11:IIN3=E2=88=92 */ }; =20 -static const struct ad7173_device_info ad4111_device_info =3D { - .name =3D "ad4111", - .id =3D AD4111_ID, - .num_voltage_in_div =3D 8, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 8, - .num_gpios =3D 2, - .higher_gpio_bits =3D true, - .has_temp =3D true, - .has_vincom_input =3D true, - .has_input_buf =3D true, - .has_current_inputs =3D true, - .has_int_ref =3D true, - .has_internal_fs_calibration =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4112_device_info =3D { - .name =3D "ad4112", - .id =3D AD4112_ID, - .num_voltage_in_div =3D 8, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 8, - .num_gpios =3D 2, - .higher_gpio_bits =3D true, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_current_inputs =3D true, - .has_int_ref =3D true, - .has_internal_fs_calibration =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4113_device_info =3D { - .name =3D "ad4113", - .id =3D AD4113_ID, - .num_voltage_in_div =3D 8, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 8, - .num_gpios =3D 2, - .data_reg_only_16bit =3D true, - .higher_gpio_bits =3D true, - .has_vincom_input =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4114_device_info =3D { - .name =3D "ad4114", - .id =3D AD4114_ID, - .num_voltage_in_div =3D 16, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 16, - .num_gpios =3D 4, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_internal_fs_calibration =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4115_device_info =3D { - .name =3D "ad4115", - .id =3D AD4115_ID, - .num_voltage_in_div =3D 16, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 16, - .num_gpios =3D 4, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_internal_fs_calibration =3D true, - .clock =3D 8 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad4115_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad4115_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad4116_device_info =3D { - .name =3D "ad4116", - .id =3D AD4116_ID, - .num_voltage_in_div =3D 11, - .num_channels =3D 16, - .num_configs =3D 8, - .num_voltage_in =3D 16, - .num_gpios =3D 4, - .has_vincom_input =3D true, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_internal_fs_calibration =3D true, - .clock =3D 4 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad4116_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad4116_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7172_2_device_info =3D { - .name =3D "ad7172-2", - .id =3D AD7172_2_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7172_4_device_info =3D { - .name =3D "ad7172-4", - .id =3D AD7172_4_ID, - .num_voltage_in =3D 9, - .num_channels =3D 8, - .num_configs =3D 8, - .num_gpios =3D 4, - .has_input_buf =3D true, - .has_ref2 =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7173_8_device_info =3D { - .name =3D "ad7173-8", - .id =3D AD7173_ID, - .num_voltage_in =3D 17, - .num_channels =3D 16, - .num_configs =3D 8, - .num_gpios =3D 4, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_ref2 =3D true, - .clock =3D 2 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7173_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7175_2_device_info =3D { - .name =3D "ad7175-2", - .id =3D AD7175_2_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7175_8_device_info =3D { - .name =3D "ad7175-8", - .id =3D AD7175_8_ID, - .num_voltage_in =3D 17, - .num_channels =3D 16, - .num_configs =3D 8, - .num_gpios =3D 4, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_ref2 =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7176_2_device_info =3D { - .name =3D "ad7176-2", - .id =3D AD7176_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_int_ref =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - -static const struct ad7173_device_info ad7177_2_device_info =3D { - .name =3D "ad7177-2", - .id =3D AD7177_ID, - .num_voltage_in =3D 5, - .num_channels =3D 4, - .num_configs =3D 4, - .num_gpios =3D 2, - .has_temp =3D true, - .has_input_buf =3D true, - .has_int_ref =3D true, - .has_pow_supply_monitoring =3D true, - .clock =3D 16 * HZ_PER_MHZ, - .odr_start_value =3D AD7177_ODR_START_VALUE, - .sinc5_data_rates =3D ad7175_sinc5_data_rates, - .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), -}; - static const char *const ad7173_ref_sel_str[] =3D { [AD7173_SETUP_REF_SEL_EXT_REF] =3D "vref", [AD7173_SETUP_REF_SEL_EXT_REF2] =3D "vref2", @@ -864,7 +642,7 @@ static int ad7173_disable_one(struct ad_sigma_delta *sd= , unsigned int chan) return ad_sd_write_reg(sd, AD7173_REG_CH(chan), 2, 0); } =20 -static const struct ad_sigma_delta_info ad7173_sigma_delta_info =3D { +static const struct ad_sigma_delta_info ad7173_sigma_delta_info_4_slots = =3D { .set_channel =3D ad7173_set_channel, .append_status =3D ad7173_append_status, .disable_all =3D ad7173_disable_all, @@ -876,6 +654,257 @@ static const struct ad_sigma_delta_info ad7173_sigma_= delta_info =3D { .status_ch_mask =3D GENMASK(3, 0), .data_reg =3D AD7173_REG_DATA, .num_resetclks =3D 64, + .num_slots =3D 4, +}; + +static const struct ad_sigma_delta_info ad7173_sigma_delta_info_8_slots = =3D { + .set_channel =3D ad7173_set_channel, + .append_status =3D ad7173_append_status, + .disable_all =3D ad7173_disable_all, + .disable_one =3D ad7173_disable_one, + .set_mode =3D ad7173_set_mode, + .has_registers =3D true, + .addr_shift =3D 0, + .read_mask =3D BIT(6), + .status_ch_mask =3D GENMASK(3, 0), + .data_reg =3D AD7173_REG_DATA, + .num_resetclks =3D 64, + .num_slots =3D 8, +}; + +static const struct ad7173_device_info ad4111_device_info =3D { + .name =3D "ad4111", + .id =3D AD4111_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 8, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 8, + .num_gpios =3D 2, + .higher_gpio_bits =3D true, + .has_temp =3D true, + .has_vincom_input =3D true, + .has_input_buf =3D true, + .has_current_inputs =3D true, + .has_int_ref =3D true, + .has_internal_fs_calibration =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4112_device_info =3D { + .name =3D "ad4112", + .id =3D AD4112_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 8, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 8, + .num_gpios =3D 2, + .higher_gpio_bits =3D true, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_current_inputs =3D true, + .has_int_ref =3D true, + .has_internal_fs_calibration =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4113_device_info =3D { + .name =3D "ad4113", + .id =3D AD4113_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 8, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 8, + .num_gpios =3D 2, + .data_reg_only_16bit =3D true, + .higher_gpio_bits =3D true, + .has_vincom_input =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4114_device_info =3D { + .name =3D "ad4114", + .id =3D AD4114_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 16, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 16, + .num_gpios =3D 4, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_internal_fs_calibration =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4115_device_info =3D { + .name =3D "ad4115", + .id =3D AD4115_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 16, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 16, + .num_gpios =3D 4, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_internal_fs_calibration =3D true, + .clock =3D 8 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad4115_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad4115_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4116_device_info =3D { + .name =3D "ad4116", + .id =3D AD4116_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in_div =3D 11, + .num_channels =3D 16, + .num_configs =3D 8, + .num_voltage_in =3D 16, + .num_gpios =3D 4, + .has_vincom_input =3D true, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_internal_fs_calibration =3D true, + .clock =3D 4 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad4116_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad4116_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7172_2_device_info =3D { + .name =3D "ad7172-2", + .id =3D AD7172_2_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7172_4_device_info =3D { + .name =3D "ad7172-4", + .id =3D AD7172_4_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 9, + .num_channels =3D 8, + .num_configs =3D 8, + .num_gpios =3D 4, + .has_input_buf =3D true, + .has_ref2 =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7173_8_device_info =3D { + .name =3D "ad7173-8", + .id =3D AD7173_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 17, + .num_channels =3D 16, + .num_configs =3D 8, + .num_gpios =3D 4, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_ref2 =3D true, + .clock =3D 2 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7173_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7175_2_device_info =3D { + .name =3D "ad7175-2", + .id =3D AD7175_2_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7175_8_device_info =3D { + .name =3D "ad7175-8", + .id =3D AD7175_8_ID, + .sd_info =3D &ad7173_sigma_delta_info_8_slots, + .num_voltage_in =3D 17, + .num_channels =3D 16, + .num_configs =3D 8, + .num_gpios =3D 4, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_ref2 =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7176_2_device_info =3D { + .name =3D "ad7176-2", + .id =3D AD7176_ID, + .sd_info =3D &ad7173_sigma_delta_info_4_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_int_ref =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7177_2_device_info =3D { + .name =3D "ad7177-2", + .id =3D AD7177_ID, + .sd_info =3D &ad7173_sigma_delta_info_4_slots, + .num_voltage_in =3D 5, + .num_channels =3D 4, + .num_configs =3D 4, + .num_gpios =3D 2, + .has_temp =3D true, + .has_input_buf =3D true, + .has_int_ref =3D true, + .has_pow_supply_monitoring =3D true, + .clock =3D 16 * HZ_PER_MHZ, + .odr_start_value =3D AD7177_ODR_START_VALUE, + .sinc5_data_rates =3D ad7175_sinc5_data_rates, + .num_sinc5_data_rates =3D ARRAY_SIZE(ad7175_sinc5_data_rates), }; =20 static int ad7173_setup(struct iio_dev *indio_dev) @@ -1546,9 +1575,7 @@ static int ad7173_probe(struct spi_device *spi) spi->mode =3D SPI_MODE_3; spi_setup(spi); =20 - st->sigma_delta_info =3D ad7173_sigma_delta_info; - st->sigma_delta_info.num_slots =3D st->info->num_configs; - ret =3D ad_sd_init(&st->sd, indio_dev, spi, &st->sigma_delta_info); + ret =3D ad_sd_init(&st->sd, indio_dev, spi, st->info->sd_info); if (ret) return ret; =20 --=20 2.43.0