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(unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 82c01b02; Thu, 9 Jan 2025 11:28:35 +0800 (GMT+08:00) From: Damon Ding To: heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, rfoss@kernel.org, vkoul@kernel.org, sebastian.reichel@collabora.com, cristian.ciocaltea@collabora.com, l.stach@pengutronix.de, dmitry.baryshkov@linaro.org, andy.yan@rock-chips.com, hjc@rock-chips.com, algea.cao@rock-chips.com, kever.yang@rock-chips.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, Damon Ding Subject: [PATCH v5 20/20] arm64: dts: rockchip: Enable eDP0 display on RK3588S EVB1 board Date: Thu, 9 Jan 2025 11:27:25 +0800 Message-Id: <20250109032725.1102465-21-damon.ding@rock-chips.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250109032725.1102465-1-damon.ding@rock-chips.com> References: <20250109032725.1102465-1-damon.ding@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGR9KGVZPQk9MHh1IQ01DSRhWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a94491b543403a3kunm82c01b02 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PiI6Eww*NzIIAxQaLFEjQwo6 EBUaCzJVSlVKTEhNSEJISEpMSkNIVTMWGhIXVR8aFhQVVR8SFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlOQ1VJSVVMVUpKT1lXWQgBWUFJTkhPNwY+ DKIM-Signature: a=rsa-sha256; b=C3MSduUCLfZdxVH3whiRLtwVNuocmbxdAaCJ0xIRVdRAv8Afn7VumoicxlB8uUdID5Z4/hImOml2w0eCfJ0OpzVVkJQaJ6cRFev6Zs80a4tL3fA7nmm4MMqqDDYsFbKHJ/oHcXNG4ZcCB/tpb6NMpE7gvwaAj4oms0uMS45A3Qo=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=tG1rEvqf4WA4SD3zbVFpvpWJ3k26iKtziXZvOBxKhlU=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" Add the necessary DT changes to enable eDP0 on RK3588S EVB1 board: - Set pinctrl of pwm12 for backlight - Enable edp0/hdptxphy0/vp2 - Add aux-bus/panel nodes Signed-off-by: Damon Ding --- Changes in v2: - Remove brightness-levels and default-brightness-level properties in backlight node. - Add the detail DT changes to commit message. Changes in v3: - Use aux-bus instead of platform bus for edp-panel. Changes in v4: - Add comments related to the use of panel compatible "lg,lp079qx1-sp0v" in the commit message. Changes in v5: - Use "edp-panel" instead of "lg,lp079qx1-sp0v" - Remove unnecessary comments in commit message - Assign the parent of DCLK_VOP2_SRC to PLL_V0PLL --- .../boot/dts/rockchip/rk3588s-evb1-v10.dts | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts b/arch/arm64= /boot/dts/rockchip/rk3588s-evb1-v10.dts index bc4077575beb..a8c151b41e21 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-evb1-v10.dts @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "rk3588s.dtsi" =20 @@ -238,6 +239,41 @@ &combphy2_psu { status =3D "okay"; }; =20 +&edp0 { + force-hpd; + status =3D "okay"; + + aux-bus { + panel { + compatible =3D "edp-panel"; + backlight =3D <&backlight>; + power-supply =3D <&vcc3v3_lcd_edp>; + + port { + panel_in_edp: endpoint { + remote-endpoint =3D <&edp_out_panel>; + }; + }; + }; + }; +}; + +&edp0_in { + edp0_in_vp2: endpoint { + remote-endpoint =3D <&vp2_out_edp0>; + }; +}; + +&edp0_out { + edp_out_panel: endpoint { + remote-endpoint =3D <&panel_in_edp>; + }; +}; + +&hdptxphy0 { + status =3D "okay"; +}; + &i2c3 { status =3D "okay"; =20 @@ -399,6 +435,7 @@ usbc0_int: usbc0-int { }; =20 &pwm12 { + pinctrl-0 =3D <&pwm12m1_pins>; status =3D "okay"; }; =20 @@ -1168,3 +1205,20 @@ usbdp_phy0_dp_altmode_mux: endpoint@1 { }; }; }; + +&vop_mmu { + status =3D "okay"; +}; + +&vop { + assigned-clocks =3D <&cru DCLK_VOP2_SRC>; + assigned-clock-parents =3D <&cru PLL_V0PLL>; + status =3D "okay"; +}; + +&vp2 { + vp2_out_edp0: endpoint@ROCKCHIP_VOP2_EP_EDP0 { + reg =3D ; + remote-endpoint =3D <&edp0_in_vp2>; + }; +}; --=20 2.34.1