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Peter Anvin" CC: Subject: [PATCH v3 05/35] x86/bugs: Restructure taa mitigation Date: Wed, 8 Jan 2025 14:24:45 -0600 Message-ID: <20250108202515.385902-6-david.kaplan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250108202515.385902-1-david.kaplan@amd.com> References: <20250108202515.385902-1-david.kaplan@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099DB:EE_|PH0PR12MB7010:EE_ X-MS-Office365-Filtering-Correlation-Id: b5634bd4-714d-40fe-a8be-08dd30229efb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|36860700013|7416014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?A5txf0251RdqnRyGLuZiqzEeRr8/9hRIGBrs3pNe7ZhNSOpg/rmkNVkaibyF?= =?us-ascii?Q?edl2a/ft4x3OkVLNR1pomrvxwPgWuyLCU+UmX4TWG5AS6isJukyCZdMTnIYe?= =?us-ascii?Q?Sqe4DPYtpDCJ2gMSREaIPNiXH3WM4Pn9/zhg0IzsZpqnFO9Unzzgj7LJ7Ryq?= =?us-ascii?Q?n2e6v+fd4pD5QwdiVAQQsNHAbFHHGo1KsXxMOXLbYoC76doP3d3+jrd2+bMz?= =?us-ascii?Q?oE5MQiMdLrxEza+vhxVLnqYK0BLhe5oA3IG6merJfoxljQxHFTJtUcx6cq5I?= =?us-ascii?Q?zZvTXJWqw9iFG7nSirAvAYFHET4YFSnRSdvP9HTWSd2l26ciYwfy+E73OxBW?= =?us-ascii?Q?WqVfuCP1+WXvXHXDUQ7dRmJRZpMh29pnwsJ1J9bw7vusAR9P8PhId5JLC2m6?= =?us-ascii?Q?OKzb3lMGwomvu0uwejpLwv5xj12xlEdaSiF72WX8WHRrYcnDZpxnh+y3qfvT?= =?us-ascii?Q?Gj2Lc52DXIJi41Gb4IpIY2czcZKbGuY5sy2i8z7odh/19U+xyBLigZLsLiOT?= =?us-ascii?Q?kGHy6Dzmozb2ACZhcbzZAb3O3vqeFglEXjwsM61WpcAbhUzVxvHa2Jbc3HA/?= =?us-ascii?Q?LAKbD3IVCAqLSFU/51VDw2ceQE5oXpreZ+vJJq1/QJfKgscX5F2xI4jm1x64?= =?us-ascii?Q?otjBvI2o3ojd4h+j7ZWP849aC9dTrW70USec6GRFf8hhm5rkalfBv+B0W5yP?= =?us-ascii?Q?WcS4N+4e4Q1eTRRfNJVPCsLcwrTvc0osYIOflUSxpnShD1CxJ/svlJwlzWk6?= =?us-ascii?Q?TggL3Zzllivm9LVTd0ubNgOhS64N3rYDDGVnnA+y3uWyRL1Psj4BcgRhyCUQ?= =?us-ascii?Q?mGQP9BwIwnVNrfu1gy/h77I9Wc0bmX1FyCx+hgTq8ZqTvqoGgEAvseFHupU+?= =?us-ascii?Q?EKAMpnxFj2EsbnwRGaPXXckmnwDT0/rrt0o1luqXrm3553PMoz7hsXqO7QgU?= =?us-ascii?Q?kGk+So42WQjmvLC4KMVirviuqhIniv9FaJS7YMKQGv5wfSlZc2gc1GS49A3I?= =?us-ascii?Q?J1WEfKsIhMK70tWhvxLOcuwJKoSAfD86sybro3TaGBM4uoJbYuy/OvWycWZU?= =?us-ascii?Q?Q1+W5/dYvGEUwD7bHQkpEbX7v6VwRl7UGP3jnB3qKKW9dMWInVeI5Idmdowo?= =?us-ascii?Q?0gzhxj+z/7lZ1xrjzSdolkOK4Kc32CWJQ/8/8ncEXxmHcogHWB8b1gTajH3D?= =?us-ascii?Q?+d290zJluPzw39B8fo81O/xD83i7kMlnMl87N1U1hfRKP2WAME3azYJzIJ8I?= =?us-ascii?Q?IPGwMWhgfJ9T9PmSbxJrssXFoD8INUUymzJqjMUUIlA7GGYkU9Cw9fwzrvzh?= =?us-ascii?Q?g0cmVYzRtiHmn0s7IFXuCV7IM39YPV1Izj28RhPXnD374rVrcqF3Ehe2Z0lK?= =?us-ascii?Q?Tmx9brg7eKOG3QwbYVwo6Nc34mO0toCHHCtnGhtu5ZSWRLAeh4QLsXDCs4BE?= =?us-ascii?Q?4Wa0kzI9gjIU2RaAfn6aGrg/1Lyc5PMFwXY3+j3rsnOqOsGE9fxVJ0+mOzO5?= =?us-ascii?Q?CH1Q1rwnusnb6bY=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(376014)(36860700013)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jan 2025 20:25:40.9698 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b5634bd4-714d-40fe-a8be-08dd30229efb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099DB.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7010 Content-Type: text/plain; charset="utf-8" Restructure taa mitigation to use select/update/apply functions to create consistent vulnerability handling. Signed-off-by: David Kaplan --- arch/x86/kernel/cpu/bugs.c | 92 ++++++++++++++++++++++++-------------- 1 file changed, 58 insertions(+), 34 deletions(-) diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index ff2d6f2e01f4..7beb2d6c43bb 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -65,6 +65,8 @@ static void __init mds_apply_mitigation(void); static void __init md_clear_update_mitigation(void); static void __init md_clear_select_mitigation(void); static void __init taa_select_mitigation(void); +static void __init taa_update_mitigation(void); +static void __init taa_apply_mitigation(void); static void __init mmio_select_mitigation(void); static void __init srbds_select_mitigation(void); static void __init l1d_flush_select_mitigation(void); @@ -187,6 +189,7 @@ void __init cpu_select_mitigations(void) ssb_select_mitigation(); l1tf_select_mitigation(); mds_select_mitigation(); + taa_select_mitigation(); md_clear_select_mitigation(); srbds_select_mitigation(); l1d_flush_select_mitigation(); @@ -203,8 +206,10 @@ void __init cpu_select_mitigations(void) * choices. */ mds_update_mitigation(); + taa_update_mitigation(); =20 mds_apply_mitigation(); + taa_apply_mitigation(); } =20 /* @@ -375,9 +380,6 @@ static int __init mds_cmdline(char *str) } early_param("mds", mds_cmdline); =20 -#undef pr_fmt -#define pr_fmt(fmt) "TAA: " fmt - static bool taa_nosmt __ro_after_init; =20 static const char * const taa_strings[] =3D { @@ -400,48 +402,71 @@ static void __init taa_select_mitigation(void) return; } =20 - if (cpu_mitigations_off()) { + if (cpu_mitigations_off()) taa_mitigation =3D TAA_MITIGATION_OFF; - return; - } =20 /* * TAA mitigation via VERW is turned off if both * tsx_async_abort=3Doff and mds=3Doff are specified. + * + * MDS mitigation will be checked in taa_update_mitigation(). */ - if (taa_mitigation =3D=3D TAA_MITIGATION_OFF && - mds_mitigation =3D=3D MDS_MITIGATION_OFF) + if (taa_mitigation =3D=3D TAA_MITIGATION_OFF) return; =20 - if (boot_cpu_has(X86_FEATURE_MD_CLEAR)) + /* Microcode will be checked in taa_update_mitigation(). */ + if (taa_mitigation =3D=3D TAA_MITIGATION_AUTO) taa_mitigation =3D TAA_MITIGATION_VERW; - else - taa_mitigation =3D TAA_MITIGATION_UCODE_NEEDED; =20 - /* - * VERW doesn't clear the CPU buffers when MD_CLEAR=3D1 and MDS_NO=3D1. - * A microcode update fixes this behavior to clear CPU buffers. It also - * adds support for MSR_IA32_TSX_CTRL which is enumerated by the - * ARCH_CAP_TSX_CTRL_MSR bit. - * - * On MDS_NO=3D1 CPUs if ARCH_CAP_TSX_CTRL_MSR is not set, microcode - * update is required. - */ - if ( (x86_arch_cap_msr & ARCH_CAP_MDS_NO) && - !(x86_arch_cap_msr & ARCH_CAP_TSX_CTRL_MSR)) - taa_mitigation =3D TAA_MITIGATION_UCODE_NEEDED; +} =20 - /* - * TSX is enabled, select alternate mitigation for TAA which is - * the same as MDS. Enable MDS static branch to clear CPU buffers. - * - * For guests that can't determine whether the correct microcode is - * present on host, enable the mitigation for UCODE_NEEDED as well. - */ - setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF); +static void __init taa_update_mitigation(void) +{ + if (!boot_cpu_has_bug(X86_BUG_TAA) || cpu_mitigations_off()) + return; + + if (verw_mitigation_enabled()) + taa_mitigation =3D TAA_MITIGATION_VERW; + + if (taa_mitigation =3D=3D TAA_MITIGATION_VERW) { + /* Check if the requisite ucode is available. */ + if (!boot_cpu_has(X86_FEATURE_MD_CLEAR)) + taa_mitigation =3D TAA_MITIGATION_UCODE_NEEDED; + + /* + * VERW doesn't clear the CPU buffers when MD_CLEAR=3D1 and MDS_NO=3D1. + * A microcode update fixes this behavior to clear CPU buffers. It also + * adds support for MSR_IA32_TSX_CTRL which is enumerated by the + * ARCH_CAP_TSX_CTRL_MSR bit. + * + * On MDS_NO=3D1 CPUs if ARCH_CAP_TSX_CTRL_MSR is not set, microcode + * update is required. + */ + if ((x86_arch_cap_msr & ARCH_CAP_MDS_NO) && + !(x86_arch_cap_msr & ARCH_CAP_TSX_CTRL_MSR)) + taa_mitigation =3D TAA_MITIGATION_UCODE_NEEDED; + } + + pr_info("TAA: %s\n", taa_strings[taa_mitigation]); +} + +static void __init taa_apply_mitigation(void) +{ + if (taa_mitigation =3D=3D TAA_MITIGATION_VERW || + taa_mitigation =3D=3D TAA_MITIGATION_UCODE_NEEDED) { + /* + * TSX is enabled, select alternate mitigation for TAA which is + * the same as MDS. Enable MDS static branch to clear CPU buffers. + * + * For guests that can't determine whether the correct microcode is + * present on host, enable the mitigation for UCODE_NEEDED as well. + */ + setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF); + + if (taa_nosmt || cpu_mitigations_auto_nosmt()) + cpu_smt_disable(false); + } =20 - if (taa_nosmt || cpu_mitigations_auto_nosmt()) - cpu_smt_disable(false); } =20 static int __init tsx_async_abort_parse_cmdline(char *str) @@ -650,7 +675,6 @@ static void __init md_clear_update_mitigation(void) =20 static void __init md_clear_select_mitigation(void) { - taa_select_mitigation(); mmio_select_mitigation(); rfds_select_mitigation(); =20 --=20 2.34.1