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Peter Anvin" CC: Subject: [PATCH v3 13/35] x86/bugs: Restructure spectre_v2_user mitigation Date: Wed, 8 Jan 2025 14:24:53 -0600 Message-ID: <20250108202515.385902-14-david.kaplan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250108202515.385902-1-david.kaplan@amd.com> References: <20250108202515.385902-1-david.kaplan@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099DB:EE_|SA3PR12MB8440:EE_ X-MS-Office365-Filtering-Correlation-Id: 3d3a1927-98fe-45ae-67bd-08dd3022a141 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|7416014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?jhn0yp+jKIHpsW7JcfcfxvGoXtX3E149J3m+eNwTuo7l6cqZhs3ZWSpu6t/S?= =?us-ascii?Q?HPR5uRCakIQOnU8+Gxsvpqqpz5bl+nRuoRLd5MNBQPOBhHm0O8nNnp0yZvkY?= =?us-ascii?Q?MPrMJHUCZQRpf2GshIlgU/2inXMW4KYLMKAJ4yPwkvDyJMGI3Z8m7oA/wTTs?= =?us-ascii?Q?469z8+1Xe53XZEKazZhpJne6DDV0wvY9dbHhMojbnP73ZQRBeHDafdk2g32m?= =?us-ascii?Q?eRs55iNvzASGZgvuDUlS5tfJveAv42vNUBWgbOZwxdK2/QN3ESaE2ONEsX3H?= =?us-ascii?Q?NKaLnZc7mo4ddGE1vJE/xnFxQuZr076PnO6GQyIFcVZ3G1DyaP5q8jzTumLS?= =?us-ascii?Q?2PNcB8UCmHnHPHNoBHMqmnBJlIzp/tY0XxTnZRh2lhxIxLQZeilQAbRmLdRs?= =?us-ascii?Q?EYZE59DgIVjIduKrr4VRYfdguMDPSraN+Uj/0YfwPpCOlZIUbzGz5CrdRTTr?= =?us-ascii?Q?z+L3XDDPdQC62QgIGsPJ5aZAcR64vreano0sQ+vgHybBx9pWrEl8tw5buCs6?= =?us-ascii?Q?rxo3Qj/a27KfrN1VSNSq27lXsJpEuLa/P6QxsOXLhIQ8VsjIl8AlKu1D+JZM?= =?us-ascii?Q?Fwq9bE8W7F0K5Hwtg4wYzTVQ/5mOhWLc4trBCoYikMCDViHELmdasWmrNM87?= =?us-ascii?Q?JyeXtCb65C+WHtdH3bIvfS1j3p3bonQ40dqlNPUItOtaMPYTNgiYSfgNm3jQ?= =?us-ascii?Q?WljG1WLbtvRg77rf6SunGCamxRHB5LFc2vMTn4p8LJJxjr6aE4VO8NjL8VxJ?= =?us-ascii?Q?eAjswIyCXpv5CAtorMLdG6Ylb/0UwnB3+ZFPlGseDbovQeD/1wkQ3S8Ij+e2?= =?us-ascii?Q?Uhr2eLGHe6StpXcqwGW23rsO9LCIvBpBFj25VMKLqplzl5nHe/k6SDJ6n/5t?= =?us-ascii?Q?KH1Kg/2acqShMz4+rKHmCkRTeNWFsbwJ9LKT3qsRoBmoEEEcUs7zWNPppd7X?= =?us-ascii?Q?9ROB4KQ0t0uQ5s69tD+a4HvgsSoIMh6fXcXFbOvR0X4Kwn3bb/dw1yIAcY+a?= =?us-ascii?Q?ijyQENBKXTxBmbt+2VlXVdz8BorFmmiklTbAugj5q5QNLJ9cKFbp7DjzEukS?= =?us-ascii?Q?kWT9Y9dCY4xeGwU/X3PLmyPgOorDWny5QGNL75gD0D4vRC2ZYwKd9uS59dxV?= =?us-ascii?Q?LEVWoP7fNTJQzdRCMX9JKKGs7TQh+d8xuBN1xg6Ts2TbCs21quH6sF+8HfRP?= =?us-ascii?Q?Hwkd3OFgFDydlvlzHl6bB+6Bluw3iJgGSv8+CYIt1GvW2kVjrWrBmEKgKIzP?= =?us-ascii?Q?gGhP553olLiz6QF/2jvnanWJACqo61WOkxLV8pRhC1x1lQkOfD7ufoAEh1Lc?= =?us-ascii?Q?UTNo48Wl9pjAZmZpO1/lkBW8gL8WsXD7dl1SCl+d/2lPj9VF/BXDHKt8L7b/?= =?us-ascii?Q?PKzqJ3ZorqGrj9m6ZvNLLOPv5JCOaBea054y21oaDa66km35b4c9AaPdmFP3?= =?us-ascii?Q?FeSTRqKER6I4h8Enw2y40aimWm+XXwwkm2/63AszJNKhbSbHZJsgjzcXLzH3?= =?us-ascii?Q?sxdaHmWQoDSmpkk=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(376014)(7416014)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jan 2025 20:25:44.7824 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3d3a1927-98fe-45ae-67bd-08dd3022a141 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099DB.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8440 Content-Type: text/plain; charset="utf-8" Restructure spectre_v2_user to use select/update/apply functions to create consistent vulnerability handling. The ibpb/stibp choices are first decided based on the spectre_v2_user command line but can be modified by the spectre_v2 command line option as well. Signed-off-by: David Kaplan --- arch/x86/kernel/cpu/bugs.c | 150 +++++++++++++++++++++---------------- 1 file changed, 84 insertions(+), 66 deletions(-) diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 66abc398d5b4..849abdc0da91 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -60,6 +60,8 @@ static void __init retbleed_select_mitigation(void); static void __init retbleed_update_mitigation(void); static void __init retbleed_apply_mitigation(void); static void __init spectre_v2_user_select_mitigation(void); +static void __init spectre_v2_user_update_mitigation(void); +static void __init spectre_v2_user_apply_mitigation(void); static void __init ssb_select_mitigation(void); static void __init l1tf_select_mitigation(void); static void __init mds_select_mitigation(void); @@ -183,11 +185,6 @@ void __init cpu_select_mitigations(void) spectre_v1_select_mitigation(); spectre_v2_select_mitigation(); retbleed_select_mitigation(); - /* - * spectre_v2_user_select_mitigation() relies on the state set by - * retbleed_select_mitigation(); specifically the STIBP selection is - * forced for UNRET or IBPB. - */ spectre_v2_user_select_mitigation(); ssb_select_mitigation(); l1tf_select_mitigation(); @@ -210,6 +207,7 @@ void __init cpu_select_mitigations(void) * choices. */ retbleed_update_mitigation(); + spectre_v2_user_update_mitigation(); mds_update_mitigation(); taa_update_mitigation(); mmio_update_mitigation(); @@ -217,6 +215,7 @@ void __init cpu_select_mitigations(void) =20 spectre_v1_apply_mitigation(); retbleed_apply_mitigation(); + spectre_v2_user_apply_mitigation(); mds_apply_mitigation(); taa_apply_mitigation(); mmio_apply_mitigation(); @@ -1348,6 +1347,8 @@ enum spectre_v2_mitigation_cmd { SPECTRE_V2_CMD_IBRS, }; =20 +static enum spectre_v2_mitigation_cmd spectre_v2_cmd __ro_after_init =3D S= PECTRE_V2_CMD_AUTO; + enum spectre_v2_user_cmd { SPECTRE_V2_USER_CMD_NONE, SPECTRE_V2_USER_CMD_AUTO, @@ -1386,22 +1387,14 @@ static void __init spec_v2_user_print_cond(const ch= ar *reason, bool secure) pr_info("spectre_v2_user=3D%s forced on command line.\n", reason); } =20 -static __ro_after_init enum spectre_v2_mitigation_cmd spectre_v2_cmd; - static enum spectre_v2_user_cmd __init spectre_v2_parse_user_cmdline(void) { char arg[20]; int ret, i; =20 - switch (spectre_v2_cmd) { - case SPECTRE_V2_CMD_NONE: + if (cpu_mitigations_off()) return SPECTRE_V2_USER_CMD_NONE; - case SPECTRE_V2_CMD_FORCE: - return SPECTRE_V2_USER_CMD_FORCE; - default: - break; - } =20 ret =3D cmdline_find_option(boot_command_line, "spectre_v2_user", arg, sizeof(arg)); @@ -1425,65 +1418,73 @@ static inline bool spectre_v2_in_ibrs_mode(enum spe= ctre_v2_mitigation mode) return spectre_v2_in_eibrs_mode(mode) || mode =3D=3D SPECTRE_V2_IBRS; } =20 + static void __init spectre_v2_user_select_mitigation(void) { - enum spectre_v2_user_mitigation mode =3D SPECTRE_V2_USER_NONE; - bool smt_possible =3D IS_ENABLED(CONFIG_SMP); enum spectre_v2_user_cmd cmd; =20 if (!boot_cpu_has(X86_FEATURE_IBPB) && !boot_cpu_has(X86_FEATURE_STIBP)) return; =20 - if (cpu_smt_control =3D=3D CPU_SMT_FORCE_DISABLED || - cpu_smt_control =3D=3D CPU_SMT_NOT_SUPPORTED) - smt_possible =3D false; - cmd =3D spectre_v2_parse_user_cmdline(); switch (cmd) { case SPECTRE_V2_USER_CMD_NONE: - goto set_mode; + return; case SPECTRE_V2_USER_CMD_FORCE: - mode =3D SPECTRE_V2_USER_STRICT; + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_STRICT; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_STRICT; break; case SPECTRE_V2_USER_CMD_AUTO: case SPECTRE_V2_USER_CMD_PRCTL: + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_PRCTL; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_PRCTL; + break; case SPECTRE_V2_USER_CMD_PRCTL_IBPB: - mode =3D SPECTRE_V2_USER_PRCTL; + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_STRICT; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_PRCTL; break; case SPECTRE_V2_USER_CMD_SECCOMP: - case SPECTRE_V2_USER_CMD_SECCOMP_IBPB: if (IS_ENABLED(CONFIG_SECCOMP)) - mode =3D SPECTRE_V2_USER_SECCOMP; + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_SECCOMP; else - mode =3D SPECTRE_V2_USER_PRCTL; + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_PRCTL; + spectre_v2_user_stibp =3D spectre_v2_user_ibpb; + break; + case SPECTRE_V2_USER_CMD_SECCOMP_IBPB: + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_STRICT; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_PRCTL; break; } =20 - /* Initialize Indirect Branch Prediction Barrier */ - if (boot_cpu_has(X86_FEATURE_IBPB)) { - setup_force_cpu_cap(X86_FEATURE_USE_IBPB); + /* + * At this point, an STIBP mode other than "off" has been set. + * If STIBP support is not being forced, check if STIBP always-on + * is preferred. + */ + if (spectre_v2_user_stibp !=3D SPECTRE_V2_USER_STRICT && + boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON)) + spectre_v2_user_stibp =3D SPECTRE_V2_USER_STRICT_PREFERRED; +} =20 - spectre_v2_user_ibpb =3D mode; - switch (cmd) { - case SPECTRE_V2_USER_CMD_NONE: - break; - case SPECTRE_V2_USER_CMD_FORCE: - case SPECTRE_V2_USER_CMD_PRCTL_IBPB: - case SPECTRE_V2_USER_CMD_SECCOMP_IBPB: - static_branch_enable(&switch_mm_always_ibpb); - spectre_v2_user_ibpb =3D SPECTRE_V2_USER_STRICT; - break; - case SPECTRE_V2_USER_CMD_PRCTL: - case SPECTRE_V2_USER_CMD_AUTO: - case SPECTRE_V2_USER_CMD_SECCOMP: - static_branch_enable(&switch_mm_cond_ibpb); - break; - } +static void __init spectre_v2_user_update_mitigation(void) +{ + bool smt_possible =3D IS_ENABLED(CONFIG_SMP); =20 - pr_info("mitigation: Enabling %s Indirect Branch Prediction Barrier\n", - static_key_enabled(&switch_mm_always_ibpb) ? - "always-on" : "conditional"); + if (!boot_cpu_has(X86_FEATURE_IBPB) && !boot_cpu_has(X86_FEATURE_STIBP)) + return; + + if (cpu_smt_control =3D=3D CPU_SMT_FORCE_DISABLED || + cpu_smt_control =3D=3D CPU_SMT_NOT_SUPPORTED) + smt_possible =3D false; + + /* The spectre_v2 cmd line can override spectre_v2_user options */ + if (spectre_v2_cmd =3D=3D SPECTRE_V2_CMD_NONE) { + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_NONE; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_NONE; + } else if (spectre_v2_cmd =3D=3D SPECTRE_V2_CMD_FORCE) { + spectre_v2_user_ibpb =3D SPECTRE_V2_USER_STRICT; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_STRICT; } =20 /* @@ -1501,30 +1502,47 @@ spectre_v2_user_select_mitigation(void) if (!boot_cpu_has(X86_FEATURE_STIBP) || !smt_possible || (spectre_v2_in_eibrs_mode(spectre_v2_enabled) && - !boot_cpu_has(X86_FEATURE_AUTOIBRS))) + !boot_cpu_has(X86_FEATURE_AUTOIBRS))) { + spectre_v2_user_stibp =3D SPECTRE_V2_USER_NONE; return; + } =20 - /* - * At this point, an STIBP mode other than "off" has been set. - * If STIBP support is not being forced, check if STIBP always-on - * is preferred. - */ - if (mode !=3D SPECTRE_V2_USER_STRICT && - boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON)) - mode =3D SPECTRE_V2_USER_STRICT_PREFERRED; - - if (retbleed_mitigation =3D=3D RETBLEED_MITIGATION_UNRET || - retbleed_mitigation =3D=3D RETBLEED_MITIGATION_IBPB) { - if (mode !=3D SPECTRE_V2_USER_STRICT && - mode !=3D SPECTRE_V2_USER_STRICT_PREFERRED) + if (spectre_v2_user_stibp !=3D SPECTRE_V2_USER_NONE && + (retbleed_mitigation =3D=3D RETBLEED_MITIGATION_UNRET || + retbleed_mitigation =3D=3D RETBLEED_MITIGATION_IBPB)) { + if (spectre_v2_user_stibp !=3D SPECTRE_V2_USER_STRICT && + spectre_v2_user_stibp !=3D SPECTRE_V2_USER_STRICT_PREFERRED) pr_info("Selecting STIBP always-on mode to complement retbleed mitigati= on\n"); - mode =3D SPECTRE_V2_USER_STRICT_PREFERRED; + spectre_v2_user_stibp =3D SPECTRE_V2_USER_STRICT_PREFERRED; } + pr_info("%s\n", spectre_v2_user_strings[spectre_v2_user_stibp]); +} =20 - spectre_v2_user_stibp =3D mode; +static void __init spectre_v2_user_apply_mitigation(void) +{ + /* Initialize Indirect Branch Prediction Barrier */ + if (boot_cpu_has(X86_FEATURE_IBPB) && + spectre_v2_user_ibpb !=3D SPECTRE_V2_USER_NONE) { + setup_force_cpu_cap(X86_FEATURE_USE_IBPB); =20 -set_mode: - pr_info("%s\n", spectre_v2_user_strings[mode]); + switch (spectre_v2_user_ibpb) { + case SPECTRE_V2_USER_NONE: + break; + case SPECTRE_V2_USER_STRICT: + static_branch_enable(&switch_mm_always_ibpb); + break; + case SPECTRE_V2_USER_PRCTL: + case SPECTRE_V2_USER_SECCOMP: + static_branch_enable(&switch_mm_cond_ibpb); + break; + default: + break; + } + + pr_info("mitigation: Enabling %s Indirect Branch Prediction Barrier\n", + static_key_enabled(&switch_mm_always_ibpb) ? + "always-on" : "conditional"); + } } =20 static const char * const spectre_v2_strings[] =3D { --=20 2.34.1