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([145.224.90.227]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2ddccf4sm22836965e9.19.2025.01.08.06.30.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 06:30:17 -0800 (PST) From: James Clark To: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, irogers@google.com, yeoreum.yun@arm.com, will@kernel.org, mark.rutland@arm.com, namhyung@kernel.org, acme@kernel.org Cc: robh@kernel.org, James Clark , Peter Zijlstra , Ingo Molnar , Alexander Shishkin , Jiri Olsa , Adrian Hunter , "Liang, Kan" , John Garry , Mike Leach , Leo Yan , Graham Woodward , Veronika Molnarova , Michael Petlan , Athira Rajeev , Thomas Richter , linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH v3 2/5] perf docs: arm_spe: Document new discard mode Date: Wed, 8 Jan 2025 14:28:57 +0000 Message-Id: <20250108142904.401139-3-james.clark@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250108142904.401139-1-james.clark@linaro.org> References: <20250108142904.401139-1-james.clark@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Document the flag along with PMU events to hint what it's used for and give an example with other useful options to get minimal output. Reviewed-by: Yeoreum Yun Signed-off-by: James Clark --- tools/perf/Documentation/perf-arm-spe.txt | 26 +++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/tools/perf/Documentation/perf-arm-spe.txt b/tools/perf/Documen= tation/perf-arm-spe.txt index de2b0b479249..37afade4f1b2 100644 --- a/tools/perf/Documentation/perf-arm-spe.txt +++ b/tools/perf/Documentation/perf-arm-spe.txt @@ -150,6 +150,7 @@ arm_spe/load_filter=3D1,min_latency=3D10/' pct_enable=3D1 - collect physical timestamp instead of virtual ti= mestamp (PMSCR.PCT) - requires privilege store_filter=3D1 - collect stores only (PMSFCR.ST) ts_enable=3D1 - enable timestamping with value of generic timer = (PMSCR.TS) + discard=3D1 - enable SPE PMU events but don't collect sample d= ata - see 'Discard mode' (PMBLIMITR.FM =3D DISCARD) =20 +++*+++ Latency is the total latency from the point at which sampling star= ted on that instruction, rather than only the execution latency. @@ -220,6 +221,31 @@ Common errors =20 Increase sampling interval (see above) =20 +PMU events +~~~~~~~~~~ + +SPE has events that can be counted on core PMUs. These are prefixed with +SAMPLE_, for example SAMPLE_POP, SAMPLE_FEED, SAMPLE_COLLISION and +SAMPLE_FEED_BR. + +These events will only count when an SPE event is running on the same core= that +the PMU event is opened on, otherwise they read as 0. There are various wa= ys to +ensure that the PMU event and SPE event are scheduled together depending o= n the +way the event is opened. For example opening both events as per-process ev= ents +on the same process, although it's not guaranteed that the PMU event is en= abled +first when context switching. For that reason it may be better to open the= PMU +event as a systemwide event and then open SPE on the process of interest. + +Discard mode +~~~~~~~~~~~~ + +SPE related (SAMPLE_* etc) core PMU events can be used without the overhea= d of +collecting sample data if discard mode is supported (optional from Armv8.6= ). +First run a system wide SPE session (or on the core of interest) using opt= ions +to minimize output. Then run perf stat: + + perf record -e arm_spe/discard/ -a -N -B --no-bpf-event -o - > /dev/null= & + perf stat -e SAMPLE_FEED_LD =20 SEE ALSO -------- --=20 2.34.1