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([145.224.90.227]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2ddccf4sm22836965e9.19.2025.01.08.06.30.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 06:30:12 -0800 (PST) From: James Clark To: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, irogers@google.com, yeoreum.yun@arm.com, will@kernel.org, mark.rutland@arm.com, namhyung@kernel.org, acme@kernel.org Cc: robh@kernel.org, James Clark , Peter Zijlstra , Ingo Molnar , Alexander Shishkin , Jiri Olsa , Adrian Hunter , "Liang, Kan" , John Garry , Mike Leach , Leo Yan , Graham Woodward , Michael Petlan , Veronika Molnarova , Athira Rajeev , Thomas Richter , linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH v3 1/5] perf: arm_spe: Add format option for discard mode Date: Wed, 8 Jan 2025 14:28:56 +0000 Message-Id: <20250108142904.401139-2-james.clark@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250108142904.401139-1-james.clark@linaro.org> References: <20250108142904.401139-1-james.clark@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" FEAT_SPEv1p2 (optional from Armv8.6) adds a discard mode that allows all SPE data to be discarded rather than written to memory. Add a format bit for this mode. If the mode isn't supported, the format bit isn't published and attempts to use it will result in -EOPNOTSUPP. Allocating an aux buffer is still allowed even though it won't be written to so that old tools continue to work, but updated tools can choose to skip this step. Signed-off-by: James Clark --- drivers/perf/arm_spe_pmu.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c index fd5b78732603..f5e6878db9d6 100644 --- a/drivers/perf/arm_spe_pmu.c +++ b/drivers/perf/arm_spe_pmu.c @@ -85,6 +85,7 @@ struct arm_spe_pmu { #define SPE_PMU_FEAT_LDS (1UL << 4) #define SPE_PMU_FEAT_ERND (1UL << 5) #define SPE_PMU_FEAT_INV_FILT_EVT (1UL << 6) +#define SPE_PMU_FEAT_DISCARD (1UL << 7) #define SPE_PMU_FEAT_DEV_PROBED (1UL << 63) u64 features; =20 @@ -193,6 +194,9 @@ static const struct attribute_group arm_spe_pmu_cap_gro= up =3D { #define ATTR_CFG_FLD_store_filter_CFG config /* PMSFCR_EL1.ST */ #define ATTR_CFG_FLD_store_filter_LO 34 #define ATTR_CFG_FLD_store_filter_HI 34 +#define ATTR_CFG_FLD_discard_CFG config /* PMBLIMITR_EL1.FM =3D DISCARD */ +#define ATTR_CFG_FLD_discard_LO 35 +#define ATTR_CFG_FLD_discard_HI 35 =20 #define ATTR_CFG_FLD_event_filter_CFG config1 /* PMSEVFR_EL1 */ #define ATTR_CFG_FLD_event_filter_LO 0 @@ -216,6 +220,7 @@ GEN_PMU_FORMAT_ATTR(store_filter); GEN_PMU_FORMAT_ATTR(event_filter); GEN_PMU_FORMAT_ATTR(inv_event_filter); GEN_PMU_FORMAT_ATTR(min_latency); +GEN_PMU_FORMAT_ATTR(discard); =20 static struct attribute *arm_spe_pmu_formats_attr[] =3D { &format_attr_ts_enable.attr, @@ -228,6 +233,7 @@ static struct attribute *arm_spe_pmu_formats_attr[] =3D= { &format_attr_event_filter.attr, &format_attr_inv_event_filter.attr, &format_attr_min_latency.attr, + &format_attr_discard.attr, NULL, }; =20 @@ -238,6 +244,9 @@ static umode_t arm_spe_pmu_format_attr_is_visible(struc= t kobject *kobj, struct device *dev =3D kobj_to_dev(kobj); struct arm_spe_pmu *spe_pmu =3D dev_get_drvdata(dev); =20 + if (attr =3D=3D &format_attr_discard.attr && !(spe_pmu->features & SPE_PM= U_FEAT_DISCARD)) + return 0; + if (attr =3D=3D &format_attr_inv_event_filter.attr && !(spe_pmu->features= & SPE_PMU_FEAT_INV_FILT_EVT)) return 0; =20 @@ -502,6 +511,12 @@ static void arm_spe_perf_aux_output_begin(struct perf_= output_handle *handle, u64 base, limit; struct arm_spe_pmu_buf *buf; =20 + if (ATTR_CFG_GET_FLD(&event->attr, discard)) { + limit =3D FIELD_PREP(PMBLIMITR_EL1_FM, PMBLIMITR_EL1_FM_DISCARD); + limit |=3D PMBLIMITR_EL1_E; + goto out_write_limit; + } + /* Start a new aux session */ buf =3D perf_aux_output_begin(handle, event); if (!buf) { @@ -743,6 +758,10 @@ static int arm_spe_pmu_event_init(struct perf_event *e= vent) !(spe_pmu->features & SPE_PMU_FEAT_FILT_LAT)) return -EOPNOTSUPP; =20 + if (ATTR_CFG_GET_FLD(&event->attr, discard) && + !(spe_pmu->features & SPE_PMU_FEAT_DISCARD)) + return -EOPNOTSUPP; + set_spe_event_has_cx(event); reg =3D arm_spe_event_to_pmscr(event); if (reg & (PMSCR_EL1_PA | PMSCR_EL1_PCT)) @@ -1027,6 +1046,9 @@ static void __arm_spe_pmu_dev_probe(void *info) if (FIELD_GET(PMSIDR_EL1_ERND, reg)) spe_pmu->features |=3D SPE_PMU_FEAT_ERND; =20 + if (spe_pmu->pmsver >=3D ID_AA64DFR0_EL1_PMSVer_V1P2) + spe_pmu->features |=3D SPE_PMU_FEAT_DISCARD; + /* This field has a spaced out encoding, so just use a look-up */ fld =3D FIELD_GET(PMSIDR_EL1_INTERVAL, reg); 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([145.224.90.227]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2ddccf4sm22836965e9.19.2025.01.08.06.30.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 06:30:17 -0800 (PST) From: James Clark To: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, irogers@google.com, yeoreum.yun@arm.com, will@kernel.org, mark.rutland@arm.com, namhyung@kernel.org, acme@kernel.org Cc: robh@kernel.org, James Clark , Peter Zijlstra , Ingo Molnar , Alexander Shishkin , Jiri Olsa , Adrian Hunter , "Liang, Kan" , John Garry , Mike Leach , Leo Yan , Graham Woodward , Veronika Molnarova , Michael Petlan , Athira Rajeev , Thomas Richter , linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH v3 2/5] perf docs: arm_spe: Document new discard mode Date: Wed, 8 Jan 2025 14:28:57 +0000 Message-Id: <20250108142904.401139-3-james.clark@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250108142904.401139-1-james.clark@linaro.org> References: <20250108142904.401139-1-james.clark@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Document the flag along with PMU events to hint what it's used for and give an example with other useful options to get minimal output. Reviewed-by: Yeoreum Yun Signed-off-by: James Clark --- tools/perf/Documentation/perf-arm-spe.txt | 26 +++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/tools/perf/Documentation/perf-arm-spe.txt b/tools/perf/Documen= tation/perf-arm-spe.txt index de2b0b479249..37afade4f1b2 100644 --- a/tools/perf/Documentation/perf-arm-spe.txt +++ b/tools/perf/Documentation/perf-arm-spe.txt @@ -150,6 +150,7 @@ arm_spe/load_filter=3D1,min_latency=3D10/' pct_enable=3D1 - collect physical timestamp instead of virtual ti= mestamp (PMSCR.PCT) - requires privilege store_filter=3D1 - collect stores only (PMSFCR.ST) ts_enable=3D1 - enable timestamping with value of generic timer = (PMSCR.TS) + discard=3D1 - enable SPE PMU events but don't collect sample d= ata - see 'Discard mode' (PMBLIMITR.FM =3D DISCARD) =20 +++*+++ Latency is the total latency from the point at which sampling star= ted on that instruction, rather than only the execution latency. @@ -220,6 +221,31 @@ Common errors =20 Increase sampling interval (see above) =20 +PMU events +~~~~~~~~~~ + +SPE has events that can be counted on core PMUs. These are prefixed with +SAMPLE_, for example SAMPLE_POP, SAMPLE_FEED, SAMPLE_COLLISION and +SAMPLE_FEED_BR. + +These events will only count when an SPE event is running on the same core= that +the PMU event is opened on, otherwise they read as 0. There are various wa= ys to +ensure that the PMU event and SPE event are scheduled together depending o= n the +way the event is opened. For example opening both events as per-process ev= ents +on the same process, although it's not guaranteed that the PMU event is en= abled +first when context switching. For that reason it may be better to open the= PMU +event as a systemwide event and then open SPE on the process of interest. + +Discard mode +~~~~~~~~~~~~ + +SPE related (SAMPLE_* etc) core PMU events can be used without the overhea= d of +collecting sample data if discard mode is supported (optional from Armv8.6= ). +First run a system wide SPE session (or on the core of interest) using opt= ions +to minimize output. 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([145.224.90.227]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2ddccf4sm22836965e9.19.2025.01.08.06.30.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 06:30:23 -0800 (PST) From: James Clark To: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, irogers@google.com, yeoreum.yun@arm.com, will@kernel.org, mark.rutland@arm.com, namhyung@kernel.org, acme@kernel.org Cc: robh@kernel.org, James Clark , Peter Zijlstra , Ingo Molnar , Alexander Shishkin , Jiri Olsa , Adrian Hunter , "Liang, Kan" , John Garry , Mike Leach , Leo Yan , Graham Woodward , Michael Petlan , Veronika Molnarova , Athira Rajeev , Thomas Richter , linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH v3 3/5] perf tool: arm-spe: Pull out functions for aux buffer and tracking setup Date: Wed, 8 Jan 2025 14:28:58 +0000 Message-Id: <20250108142904.401139-4-james.clark@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250108142904.401139-1-james.clark@linaro.org> References: <20250108142904.401139-1-james.clark@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" These won't be used in the next commit in discard mode, so put them in their own functions. No functional changes intended. Reviewed-by: Yeoreum Yun Signed-off-by: James Clark --- tools/perf/arch/arm64/util/arm-spe.c | 83 +++++++++++++++++----------- 1 file changed, 51 insertions(+), 32 deletions(-) diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/u= til/arm-spe.c index 22b19dcc6beb..1b543855f206 100644 --- a/tools/perf/arch/arm64/util/arm-spe.c +++ b/tools/perf/arch/arm64/util/arm-spe.c @@ -274,33 +274,9 @@ static void arm_spe_setup_evsel(struct evsel *evsel, s= truct perf_cpu_map *cpus) evsel__set_sample_bit(evsel, PHYS_ADDR); } =20 -static int arm_spe_recording_options(struct auxtrace_record *itr, - struct evlist *evlist, - struct record_opts *opts) +static int arm_spe_setup_aux_buffer(struct record_opts *opts) { - struct arm_spe_recording *sper =3D - container_of(itr, struct arm_spe_recording, itr); - struct evsel *evsel, *tmp; - struct perf_cpu_map *cpus =3D evlist->core.user_requested_cpus; bool privileged =3D perf_event_paranoid_check(-1); - struct evsel *tracking_evsel; - int err; - - sper->evlist =3D evlist; - - evlist__for_each_entry(evlist, evsel) { - if (evsel__is_aux_event(evsel)) { - if (!strstarts(evsel->pmu->name, ARM_SPE_PMU_NAME)) { - pr_err("Found unexpected auxtrace event: %s\n", - evsel->pmu->name); - return -EINVAL; - } - opts->full_auxtrace =3D true; - } - } - - if (!opts->full_auxtrace) - return 0; =20 /* * we are in snapshot mode. @@ -330,6 +306,9 @@ static int arm_spe_recording_options(struct auxtrace_re= cord *itr, pr_err("Failed to calculate default snapshot size and/or AUX area traci= ng mmap pages\n"); return -EINVAL; } + + pr_debug2("%sx snapshot size: %zu\n", ARM_SPE_PMU_NAME, + opts->auxtrace_snapshot_size); } =20 /* We are in full trace mode but '-m,xyz' wasn't specified */ @@ -355,14 +334,15 @@ static int arm_spe_recording_options(struct auxtrace_= record *itr, } } =20 - if (opts->auxtrace_snapshot_mode) - pr_debug2("%sx snapshot size: %zu\n", ARM_SPE_PMU_NAME, - opts->auxtrace_snapshot_size); + return 0; +} =20 - evlist__for_each_entry_safe(evlist, tmp, evsel) { - if (evsel__is_aux_event(evsel)) - arm_spe_setup_evsel(evsel, cpus); - } +static int arm_spe_setup_tracking_event(struct evlist *evlist, + struct record_opts *opts) +{ + int err; + struct evsel *tracking_evsel; + struct perf_cpu_map *cpus =3D evlist->core.user_requested_cpus; =20 /* Add dummy event to keep tracking */ err =3D parse_event(evlist, "dummy:u"); @@ -388,6 +368,45 @@ static int arm_spe_recording_options(struct auxtrace_r= ecord *itr, return 0; } =20 +static int arm_spe_recording_options(struct auxtrace_record *itr, + struct evlist *evlist, + struct record_opts *opts) +{ + struct arm_spe_recording *sper =3D + container_of(itr, struct arm_spe_recording, itr); + struct evsel *evsel, *tmp; + struct perf_cpu_map *cpus =3D evlist->core.user_requested_cpus; + + int err; + + sper->evlist =3D evlist; + + evlist__for_each_entry(evlist, evsel) { + if (evsel__is_aux_event(evsel)) { + if (!strstarts(evsel->pmu->name, ARM_SPE_PMU_NAME)) { + pr_err("Found unexpected auxtrace event: %s\n", + evsel->pmu->name); + return -EINVAL; + } + opts->full_auxtrace =3D true; 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([145.224.90.227]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2ddccf4sm22836965e9.19.2025.01.08.06.30.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 06:30:28 -0800 (PST) From: James Clark To: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, irogers@google.com, yeoreum.yun@arm.com, will@kernel.org, mark.rutland@arm.com, namhyung@kernel.org, acme@kernel.org Cc: robh@kernel.org, James Clark , Peter Zijlstra , Ingo Molnar , Alexander Shishkin , Jiri Olsa , Adrian Hunter , "Liang, Kan" , John Garry , Mike Leach , Leo Yan , Graham Woodward , Veronika Molnarova , Michael Petlan , Thomas Richter , Athira Rajeev , linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH v3 4/5] perf tool: arm-spe: Don't allocate buffer or tracking event in discard mode Date: Wed, 8 Jan 2025 14:28:59 +0000 Message-Id: <20250108142904.401139-5-james.clark@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250108142904.401139-1-james.clark@linaro.org> References: <20250108142904.401139-1-james.clark@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The buffer will never be written to so don't bother allocating it. The tracking event is also not required. Reviewed-by: Yeoreum Yun Signed-off-by: James Clark --- tools/perf/arch/arm64/util/arm-spe.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/u= til/arm-spe.c index 1b543855f206..4301181b8e45 100644 --- a/tools/perf/arch/arm64/util/arm-spe.c +++ b/tools/perf/arch/arm64/util/arm-spe.c @@ -376,7 +376,7 @@ static int arm_spe_recording_options(struct auxtrace_re= cord *itr, container_of(itr, struct arm_spe_recording, itr); struct evsel *evsel, *tmp; struct perf_cpu_map *cpus =3D evlist->core.user_requested_cpus; - + bool discard =3D false; int err; =20 sper->evlist =3D evlist; @@ -396,10 +396,17 @@ static int arm_spe_recording_options(struct auxtrace_= record *itr, return 0; =20 evlist__for_each_entry_safe(evlist, tmp, evsel) { - if (evsel__is_aux_event(evsel)) + if (evsel__is_aux_event(evsel)) { arm_spe_setup_evsel(evsel, cpus); + if (evsel->core.attr.config & + perf_pmu__format_bits(evsel->pmu, "discard")) + discard =3D true; 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([145.224.90.227]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e2ddccf4sm22836965e9.19.2025.01.08.06.30.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jan 2025 06:30:33 -0800 (PST) From: James Clark To: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, irogers@google.com, yeoreum.yun@arm.com, will@kernel.org, mark.rutland@arm.com, namhyung@kernel.org, acme@kernel.org Cc: robh@kernel.org, James Clark , Peter Zijlstra , Ingo Molnar , Alexander Shishkin , Jiri Olsa , Adrian Hunter , "Liang, Kan" , John Garry , Mike Leach , Leo Yan , Graham Woodward , Veronika Molnarova , Michael Petlan , Thomas Richter , Athira Rajeev , linux-kernel@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH v3 5/5] perf test: arm_spe: Add test for discard mode Date: Wed, 8 Jan 2025 14:29:00 +0000 Message-Id: <20250108142904.401139-6-james.clark@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250108142904.401139-1-james.clark@linaro.org> References: <20250108142904.401139-1-james.clark@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test that checks that there were no AUX or AUXTRACE events recorded when discard mode is used. Reviewed-by: Yeoreum Yun Signed-off-by: James Clark --- tools/perf/tests/shell/test_arm_spe.sh | 30 ++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/tools/perf/tests/shell/test_arm_spe.sh b/tools/perf/tests/shel= l/test_arm_spe.sh index 3258368634f7..a69aab70dd8a 100755 --- a/tools/perf/tests/shell/test_arm_spe.sh +++ b/tools/perf/tests/shell/test_arm_spe.sh @@ -107,7 +107,37 @@ arm_spe_system_wide_test() { arm_spe_report "SPE system-wide testing" $err } =20 +arm_spe_discard_test() { + echo "SPE discard mode" + + for f in /sys/bus/event_source/devices/arm_spe_*; do + if [ -e "$f/format/discard" ]; then + cpu=3D$(cut -c -1 "$f/cpumask") + break + fi + done + + if [ -z $cpu ]; then + arm_spe_report "SPE discard mode not present" 2 + return + fi + + # Test can use wildcard SPE instance and Perf will only open the event + # on instances that have that format flag. But make sure the target + # runs on an instance with discard mode otherwise we're not testing + # anything. + perf record -o ${perfdata} -e arm_spe/discard/ -N -B --no-bpf-event \ + -- taskset --cpu-list $cpu true + + if perf report -i ${perfdata} --stats | grep 'AUX events\|AUXTRACE events= '; then + arm_spe_report "SPE discard mode found unexpected data" 1 + else + arm_spe_report "SPE discard mode" 0 + fi +} + arm_spe_snapshot_test arm_spe_system_wide_test +arm_spe_discard_test =20 exit $glb_err --=20 2.34.1