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([178.197.223.165]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436dcc8ddddsm16666805e9.0.2025.01.07.07.27.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2025 07:27:51 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH] arm64: defconfig: Enable basic Qualcomm SM8750 SoC drivers Date: Tue, 7 Jan 2025 16:27:49 +0100 Message-ID: <20250107152749.327407-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Enable necessary drivers for booting Qualcomm SM8750 based boards like MTP8750 and QRD8750. The clock controller (GCC), interconnect and pinctrl drivers are considered necessary for early boot debugging, e.g. via serial console, thus make them built-in. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/configs/defconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 5e88321aa603..0812bd9df09b 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -636,6 +636,7 @@ CONFIG_PINCTRL_SM8350=3Dy CONFIG_PINCTRL_SM8450=3Dy CONFIG_PINCTRL_SM8550=3Dy CONFIG_PINCTRL_SM8650=3Dy +CONFIG_PINCTRL_SM8750=3Dy CONFIG_PINCTRL_X1E80100=3Dy CONFIG_PINCTRL_QCOM_SPMI_PMIC=3Dy CONFIG_PINCTRL_LPASS_LPI=3Dm @@ -1344,6 +1345,7 @@ CONFIG_SC_CAMCC_7280=3Dm CONFIG_SA_CAMCC_8775P=3Dm CONFIG_QDU_GCC_1000=3Dy CONFIG_SC_CAMCC_8280XP=3Dm +CONFIG_SA_DISPCC_8775P=3Dm CONFIG_SC_DISPCC_7280=3Dm CONFIG_SC_DISPCC_8280XP=3Dm CONFIG_SA_DISPCC_8775P=3Dm @@ -1369,12 +1371,14 @@ CONFIG_SM_DISPCC_6115=3Dm CONFIG_SM_DISPCC_8250=3Dy CONFIG_SM_DISPCC_8450=3Dm CONFIG_SM_DISPCC_8550=3Dm +CONFIG_SM_DISPCC_8750=3Dm CONFIG_SM_GCC_4450=3Dy CONFIG_SM_GCC_6115=3Dy CONFIG_SM_GCC_8350=3Dy CONFIG_SM_GCC_8450=3Dy CONFIG_SM_GCC_8550=3Dy CONFIG_SM_GCC_8650=3Dy +CONFIG_SM_GCC_8750=3Dy CONFIG_SM_GPUCC_6115=3Dm CONFIG_SM_GPUCC_8150=3Dy CONFIG_SM_GPUCC_8250=3Dy @@ -1384,6 +1388,7 @@ CONFIG_SM_GPUCC_8550=3Dm CONFIG_SM_GPUCC_8650=3Dm CONFIG_SM_TCSRCC_8550=3Dy CONFIG_SM_TCSRCC_8650=3Dy +CONFIG_SM_TCSRCC_8750=3Dm CONFIG_SA_VIDEOCC_8775P=3Dm CONFIG_SM_VIDEOCC_8250=3Dy CONFIG_QCOM_HFPLL=3Dy @@ -1667,6 +1672,7 @@ CONFIG_INTERCONNECT_QCOM_SM8350=3Dy CONFIG_INTERCONNECT_QCOM_SM8450=3Dy CONFIG_INTERCONNECT_QCOM_SM8550=3Dy CONFIG_INTERCONNECT_QCOM_SM8650=3Dy +CONFIG_INTERCONNECT_QCOM_SM8750=3Dy CONFIG_INTERCONNECT_QCOM_X1E80100=3Dy CONFIG_COUNTER=3Dm CONFIG_RZ_MTU3_CNT=3Dm --=20 2.43.0