From nobody Tue Dec 23 09:31:04 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A65F818A6C0 for ; Tue, 7 Jan 2025 17:57:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272677; cv=none; b=oN4es3/8rKZeAWFZrEcDy8CDfracCtfXBQHUki6LdrdtXpFB5hX1XUQ0hg6Nx3gJCOIzkHzsBB/5HRFScl96UdJpXlfk5/GxwuXBlXJ+t8tk/x17uYXZzB/P8CUAX8sinjUn9WpkD/7mDt56rdUPh2ZQIfnaJBIv8UZ3Er9UuhA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272677; c=relaxed/simple; bh=sshLo3IhsFUalehf2Fn8CgaG+DdU2mxMe+CyT/ZQ0z8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JQatkZ543umB7wQW3h0Nccddt5IEM33T3p5eOxHZwO1gdudIvUCxwf87fdwOJONeCIGJ7yjTpnQET/Q6PLiJhy+mhCTsMh81adAw7zYf9j2NNXftud6ZGbBQkW6HgSAfy1oIticHtQwHiamNLt90mp5AOqrafGvk2lIiSpiLdPg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=BKPptCII; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="BKPptCII" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 20324C4CEDD; Tue, 7 Jan 2025 17:57:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736272677; bh=sshLo3IhsFUalehf2Fn8CgaG+DdU2mxMe+CyT/ZQ0z8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=BKPptCII9UGPKfgx5aw/tglKhzECKOn4zgK/od1kd3F7d33q/dGVjWYENrZDAZbFg nTOzZm00lU42nNaliDepUyH/x+vZ3PZ3I8zXVJl+hm0P68pYh+b47CsE70fLoLdkvq A6VFvoiC6X//TYJY/Q6XX1blU5E4WCe8JrwbrF+fzHnWkZ5WkwnjBro/NVleCPNvjp 95wwZ0jcrBAqyuNLOCgCX5jqi7sg+pbswAgCwIpfCuxqjhTkEJ+5iNk6/XVddHOh21 aMNt3gDjPdJl2bnb7XaHzsCwTegspTFqFoAN08/NwjTZYEjOgT+DgDXCiJYjDOrh20 Uuvdt33nDIp9Q== From: "Rob Herring (Arm)" Date: Tue, 07 Jan 2025 11:57:19 -0600 Subject: [PATCH 1/7] perf: arm_pmuv3: Call kvm_vcpu_pmu_resync_el0() before enabling counters Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250107-arm-pmu-cleanups-v1-v1-1-313951346a25@kernel.org> References: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> In-Reply-To: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> To: Will Deacon , Mark Rutland Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev Counting events related to setup of the PMU is not desired, but kvm_vcpu_pmu_resync_el0() is called just after the PMU counters have been enabled. Move the call to before enabling the counters. Signed-off-by: Rob Herring (Arm) --- drivers/perf/arm_pmuv3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c index b5cc11abc962cc80e87afa26688a59f381eea105..dfef8d4669f58eb7f989a958216= 4b00a823ac60b 100644 --- a/drivers/perf/arm_pmuv3.c +++ b/drivers/perf/arm_pmuv3.c @@ -825,10 +825,10 @@ static void armv8pmu_start(struct arm_pmu *cpu_pmu) else armv8pmu_disable_user_access(); =20 + kvm_vcpu_pmu_resync_el0(); + /* Enable all counters */ armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMU_PMCR_E); - - kvm_vcpu_pmu_resync_el0(); } =20 static void armv8pmu_stop(struct arm_pmu *cpu_pmu) --=20 2.45.2 From nobody Tue Dec 23 09:31:04 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB4FB1E47C8 for ; Tue, 7 Jan 2025 17:57:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272679; cv=none; b=mIH5dtK5feev8hkFv0jJqFC/tUy1JIJlPCJVzFMZ8TtTiThJQpkW/p4LDSy2I50QtgXfwbCSaTwnDN0gsixTt+N870fTccvsO+j+6y41DLdj924tG9kSAZgJW7WcX8wBUTaWUWkrT0rjbCc37jzAiEMwP23G64Ke239QNlU2fhc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272679; c=relaxed/simple; bh=5DSA0+mdRxVJt+CbOzGSEBIaXyQQIsiFn5Zx0DYYHsU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dix9P4KL4jxBV0A+8rtKKWGBCOmKrQYxD7Lm7I7y8dPHUM8lXq733ToytIMppluD+SmKuzQNggEtbuxVCMXITqdg9Sdyc/K3BYNZKxWA9uBWnjhPEgNRVfM4zykQLvbDxT8CnHvA60i6Y4P/r72VX8ol3yVwGuHZkKDp/bjRY0M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=iMupMDet; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="iMupMDet" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 614AFC4CEE1; Tue, 7 Jan 2025 17:57:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736272678; bh=5DSA0+mdRxVJt+CbOzGSEBIaXyQQIsiFn5Zx0DYYHsU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=iMupMDetIuxxR8k18HLGg2FUn2kCX6hxYkaaqfxG7fpiYH2mBOQ4UolihxY+CDDLW WXZaQbkAJ8Yw9+yOmq+CM22Ioo308t7bgWuG8NgxuGVVAWXma397cCLjasEF/WkjZm J1cst0YDL65G13cq5oVY+ByCJdUuffYIhXujfshHPamkdOYnjZWUSdsmJFUNhYmUot QWjdPABU2NLInrCQ+C3nTclm1+nLK7CvYi4woV5W1WqItywwDnbMgOXuFaSpK8+7ct OdeveqnnT+WbsDCGo/nODGUn+n/5aOBPP/CMWjVM5LAzBsY597hXGjJRaVAMSbnADV yd5hixivigfOQ== From: "Rob Herring (Arm)" Date: Tue, 07 Jan 2025 11:57:20 -0600 Subject: [PATCH 2/7] perf: arm_pmu: Don't disable counter in armpmu_add() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250107-arm-pmu-cleanups-v1-v1-2-313951346a25@kernel.org> References: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> In-Reply-To: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> To: Will Deacon , Mark Rutland Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev From: Mark Rutland Currently armpmu_add() tries to handle a newly-allocated counter having a stale associated event, but this should not be possible, and if this were to happen the current mitigation is insufficient and potentially expensive. It would be better to warn if we encounter the impossible case. Calls to pmu::add() and pmu::del() are serialized by the core perf code, and armpmu_del() clears the relevant slot in pmu_hw_events::events[] before clearing the bit in pmu_hw_events::used_mask such that the counter can be reallocated. Thus when armpmu_add() allocates a counter index from pmu_hw_events::used_mask, it should not be possible to observe a stale even in pmu_hw_events::events[] unless either pmu_hw_events::used_mask or pmu_hw_events::events[] have been corrupted. If this were to happen, we'd end up with two events with the same event->hw.idx, which would clash with each other during reprogramming, deletion, etc, and produce bogus results. Add a WARN_ON_ONCE() for this case so that we can detect if this ever occurs in practice. That possiblity aside, there's no need to call arm_pmu::disable(event) for the new event. The PMU reset code initialises the counter in a disabled state, and armpmu_del() will disable the counter before it can be reused. Remove the redundant disable. Signed-off-by: Mark Rutland Signed-off-by: Rob Herring (Arm) --- drivers/perf/arm_pmu.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c index 398cce3d76fc44dcc1e1f84f9e3c62b3574a8d12..2f33e69a8caf203928559e54adb= 2d354888c4b09 100644 --- a/drivers/perf/arm_pmu.c +++ b/drivers/perf/arm_pmu.c @@ -342,12 +342,10 @@ armpmu_add(struct perf_event *event, int flags) if (idx < 0) return idx; =20 - /* - * If there is an event in the counter we are going to use then make - * sure it is disabled. - */ + /* The newly-allocated counter should be empty */ + WARN_ON_ONCE(hw_events->events[idx]); + event->hw.idx =3D idx; - armpmu->disable(event); hw_events->events[idx] =3D event; =20 hwc->state =3D PERF_HES_STOPPED | PERF_HES_UPTODATE; --=20 2.45.2 From nobody Tue Dec 23 09:31:04 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D7341F428A for ; Tue, 7 Jan 2025 17:58:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272680; cv=none; b=mzh35QqLlb+7sE6tuKA04tHkynxIBjCd2quoEYs9ip/N0tcIa87oArJBpXEDVAfvPhP4ixlbF4sFNYhgACnCBDSUb8wmw8xCoYhFs8edR3DN9/Tq+AFWXZhybtqD/q7L1629167yZ0LLyL3DPaclv4i4JQNcsZkzEM6FVeyIc0U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272680; c=relaxed/simple; bh=5URfCVQGt60Qv1ThmRA61G0kbMgHGKkbCZK3fRVjnOE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XjSgKfsoYTNfART18cjiF5BwiiAcXzNC9L2EM+qEpe217Gt5ishdp9bxI5CcdPJMOkqAHQABJZb2dLByCxoOHNvvwciXkmuloDtu6fodACzUtXUn8FWmGRlQF9JZdNDmK3N9ukpXJyeoJe397RHsAVaMpcZC0bucsgiz56R7kEA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=u4HphdXB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="u4HphdXB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9ACBAC4CEDD; Tue, 7 Jan 2025 17:57:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736272679; bh=5URfCVQGt60Qv1ThmRA61G0kbMgHGKkbCZK3fRVjnOE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=u4HphdXBR2Mzj+zIheW5IIWU1w4wJRKDxGVN1uwPVnhqTxDRpe5YjGlD2kbHrEHX/ 51rRMoL1aCAZ5161wFgienkS4EDoHF8CXym2AsA+3f71wrW3GC+/2jmqxy+KsZB5MB K0kR69d0EqRhQTGX2NN3rcVhSWg7G8ogqOyxqZB1W9M7S7jHlEaO1IHm9yPYPIKDo3 P7QV+g1sW2yslRNcbna9sx2oEi3cCue1JATAAcBmeJx2dchtfYXAvQMkSFBqQKcyEi OWoL7oAPJTSPAjaczkRRTKrEQggB9+fCXashmSyA9mLrACf2WfRltPCrEbb/EvWmsG XskxjfiJpW9kg== From: "Rob Herring (Arm)" Date: Tue, 07 Jan 2025 11:57:21 -0600 Subject: [PATCH 3/7] perf: arm_pmuv3: Don't disable counter in armv8pmu_enable_event() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250107-arm-pmu-cleanups-v1-v1-3-313951346a25@kernel.org> References: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> In-Reply-To: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> To: Will Deacon , Mark Rutland Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev From: Mark Rutland Currently armv8pmu_enable_event() starts by disabling the event counter it has been asked to enable. This should not be necessary as the counter (and the PMU as a whole) should not be active when armv8pmu_enable_event() is called. Remove the redundant call to armv8pmu_disable_event_counter(). At the same time, remove the comment immeditately above as everything it says is obvious from the function names below. Signed-off-by: Mark Rutland Signed-off-by: Rob Herring (Arm) --- drivers/perf/arm_pmuv3.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c index dfef8d4669f58eb7f989a9582164b00a823ac60b..7a1056e1e686146c2c7b20f62d1= 9d384f1ae422b 100644 --- a/drivers/perf/arm_pmuv3.c +++ b/drivers/perf/arm_pmuv3.c @@ -795,11 +795,6 @@ static void armv8pmu_enable_user_access(struct arm_pmu= *cpu_pmu) =20 static void armv8pmu_enable_event(struct perf_event *event) { - /* - * Enable counter and interrupt, and set the counter to count - * the event that we're interested in. - */ - armv8pmu_disable_event_counter(event); armv8pmu_write_event_type(event); armv8pmu_enable_event_irq(event); armv8pmu_enable_event_counter(event); --=20 2.45.2 From nobody Tue Dec 23 09:31:04 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 85BAE1F4E21 for ; Tue, 7 Jan 2025 17:58:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272681; cv=none; b=MXoWkw9p3q/lm0ksWCArOwGz3EAYROYFivq8dUOzqrLTEGbiiHUObCBJQPNoPH1pJeWOixwqtPipVGDLo17e0FCEgfZRmKFsVBhhjeuWTdtn8sgUDnR9X/nx5KudPXUhlxgKBrrd+cUeC2cNAwYsk7Ci/WvFCklP1+mH19ivuCY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272681; c=relaxed/simple; bh=bGHhhbymQuCF6yfAGiV6Cpz7xaEk/cyDDkdwRpKdx1g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ju4SkdnPQH932Whazi4IGU0xcgNvEDCLDqTK+w5LQJ/pj1lA3Xft2mM+K0ehrNKdXOBLaqgQ2ctwsaogcD1h+KHAtjGHX06spV8b71Kwhby/hl0C6jC4RVGUfrJPIS4QIz90F7m8Ul+xGrPL+tOfkRdPH0Y5DXcpYweyEHxl4LA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fHPEA7iI; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fHPEA7iI" Received: by smtp.kernel.org (Postfix) with ESMTPSA id EF930C4CED6; Tue, 7 Jan 2025 17:58:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736272681; bh=bGHhhbymQuCF6yfAGiV6Cpz7xaEk/cyDDkdwRpKdx1g=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=fHPEA7iIoNVoepGleuV3evVE6t6TzF9Qzz9mmg9oqdFESZnneHb86MWmBOxFBgkHS HgxaV4n5RalQmsvR8DZ55EWQDDC1geGDml8TpbiKjz/tG2yE9qDZFLjTN7teqOjvVb /qT/F6X5MPrUUyq96vTGZwSwbNDcAvo0y4KFGKtewFZDFhQQzJS9x4vwViyuckYXf3 pg5Ka/U0f2R8jlXfxuGW2uIGhTz5bRDrUyJCccKtya4lgqd25SgGPhB2R1V+lE1KNH HAjoSsSGTdGUVtPk9A41A6yf9k2lcG/85OmxWLzJEsuxlWoNCVxBYkUXvkLV6zAyK6 5hcQiJMngbcQg== From: "Rob Herring (Arm)" Date: Tue, 07 Jan 2025 11:57:22 -0600 Subject: [PATCH 4/7] perf: arm_v7_pmu: Drop obvious comments for enabling/disabling counters and interrupts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250107-arm-pmu-cleanups-v1-v1-4-313951346a25@kernel.org> References: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> In-Reply-To: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> To: Will Deacon , Mark Rutland Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev The function calls for enabling/disabling counters and interrupts are pretty obvious as to what they are doing, and the comments don't add any additional value. Signed-off-by: Rob Herring (Arm) --- drivers/perf/arm_v7_pmu.c | 44 -------------------------------------------- 1 file changed, 44 deletions(-) diff --git a/drivers/perf/arm_v7_pmu.c b/drivers/perf/arm_v7_pmu.c index 420cadd108e79821f43537fab23fe081ca6fd9bc..7fa88e3b64e07bacbf2f9731e33= 18a7dc1085fb1 100644 --- a/drivers/perf/arm_v7_pmu.c +++ b/drivers/perf/arm_v7_pmu.c @@ -857,14 +857,6 @@ static void armv7pmu_enable_event(struct perf_event *e= vent) return; } =20 - /* - * Enable counter and interrupt, and set the counter to count - * the event that we're interested in. - */ - - /* - * Disable counter - */ armv7_pmnc_disable_counter(idx); =20 /* @@ -875,14 +867,7 @@ static void armv7pmu_enable_event(struct perf_event *e= vent) if (cpu_pmu->set_event_filter || idx !=3D ARMV7_IDX_CYCLE_COUNTER) armv7_pmnc_write_evtsel(idx, hwc->config_base); =20 - /* - * Enable interrupt for this counter - */ armv7_pmnc_enable_intens(idx); - - /* - * Enable counter - */ armv7_pmnc_enable_counter(idx); } =20 @@ -898,18 +883,7 @@ static void armv7pmu_disable_event(struct perf_event *= event) return; } =20 - /* - * Disable counter and interrupt - */ - - /* - * Disable counter - */ armv7_pmnc_disable_counter(idx); - - /* - * Disable interrupt for this counter - */ armv7_pmnc_disable_intens(idx); } =20 @@ -1476,12 +1450,6 @@ static void krait_pmu_enable_event(struct perf_event= *event) struct hw_perf_event *hwc =3D &event->hw; int idx =3D hwc->idx; =20 - /* - * Enable counter and interrupt, and set the counter to count - * the event that we're interested in. - */ - - /* Disable counter */ armv7_pmnc_disable_counter(idx); =20 /* @@ -1494,10 +1462,7 @@ static void krait_pmu_enable_event(struct perf_event= *event) else armv7_pmnc_write_evtsel(idx, hwc->config_base); =20 - /* Enable interrupt for this counter */ armv7_pmnc_enable_intens(idx); - - /* Enable counter */ armv7_pmnc_enable_counter(idx); } =20 @@ -1797,12 +1762,6 @@ static void scorpion_pmu_enable_event(struct perf_ev= ent *event) struct hw_perf_event *hwc =3D &event->hw; int idx =3D hwc->idx; =20 - /* - * Enable counter and interrupt, and set the counter to count - * the event that we're interested in. - */ - - /* Disable counter */ armv7_pmnc_disable_counter(idx); =20 /* @@ -1815,10 +1774,7 @@ static void scorpion_pmu_enable_event(struct perf_ev= ent *event) else if (idx !=3D ARMV7_IDX_CYCLE_COUNTER) armv7_pmnc_write_evtsel(idx, hwc->config_base); =20 - /* Enable interrupt for this counter */ armv7_pmnc_enable_intens(idx); - - /* Enable counter */ armv7_pmnc_enable_counter(idx); } =20 --=20 2.45.2 From nobody Tue Dec 23 09:31:04 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 08FD81F63CA for ; Tue, 7 Jan 2025 17:58:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Tue, 7 Jan 2025 17:58:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736272683; bh=XFA/YG0tyw7HQ7kQjjoUNZxsPed+1g9YsBcAFNNi/7w=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=k5WmGUi8BAtGwlotCQj+i7lLyYJ0pteKdHcxWbY71z6am74TMZY0Qckm1bRkB0iR1 2v0qNfMAxNrV0n48WwqDdW61+giEwDzWV59XYco09AiUeXdUCrSmg5PM7Lh/FdgtBt XsqAuqBNJCTyY6DYTEeJpVUiTHM56yqy96HeEjqOP93eGV+UOFdPZqb9uw/aG4LzGI uD/zBREmDB8OSnyoaUWb7i7j3xoVJyiIzHm+QH4jgUB8+aPjNUCr4ocWXISyCmXm+I jV8UfdYEJ69AwxJRUaNbjg+rk64KQ9YywXi5pGXreOPN4jTpkz6rUlDDJcRfIfWrLW Db6tV/vn3dY/A== From: "Rob Herring (Arm)" Date: Tue, 07 Jan 2025 11:57:23 -0600 Subject: [PATCH 5/7] perf: arm_v7_pmu: Don't disable counter in (armv7|krait_|scorpion_)pmu_enable_event() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250107-arm-pmu-cleanups-v1-v1-5-313951346a25@kernel.org> References: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> In-Reply-To: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> To: Will Deacon , Mark Rutland Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev Currently (armv7|krait_|scorpion_)pmu_enable_event() start by disabling the event counter it has been asked to enable. This should not be necessary as the counter (and the PMU as a whole) should not be active when *_enable_event() is called. Signed-off-by: Rob Herring (Arm) --- drivers/perf/arm_v7_pmu.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/perf/arm_v7_pmu.c b/drivers/perf/arm_v7_pmu.c index 7fa88e3b64e07bacbf2f9731e3318a7dc1085fb1..17831e1920bd8d306aa1ea9cebe= 8b3f4659dfcee 100644 --- a/drivers/perf/arm_v7_pmu.c +++ b/drivers/perf/arm_v7_pmu.c @@ -857,8 +857,6 @@ static void armv7pmu_enable_event(struct perf_event *ev= ent) return; } =20 - armv7_pmnc_disable_counter(idx); - /* * Set event (if destined for PMNx counters) * We only need to set the event for the cycle counter if we @@ -1450,8 +1448,6 @@ static void krait_pmu_enable_event(struct perf_event = *event) struct hw_perf_event *hwc =3D &event->hw; int idx =3D hwc->idx; =20 - armv7_pmnc_disable_counter(idx); - /* * Set event (if destined for PMNx counters) * We set the event for the cycle counter because we @@ -1762,8 +1758,6 @@ static void scorpion_pmu_enable_event(struct perf_eve= nt *event) struct hw_perf_event *hwc =3D &event->hw; int idx =3D hwc->idx; =20 - armv7_pmnc_disable_counter(idx); - /* * Set event (if destined for PMNx counters) * We don't set the event for the cycle counter because we --=20 2.45.2 From nobody Tue Dec 23 09:31:04 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B34C21F63DE for ; Tue, 7 Jan 2025 17:58:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272684; cv=none; b=RIh2iYrhQEOK3AW8TeV8rIeL11lfYdtb9Dpyl7fHXdcZwLf8sv+K7luvTKOco3b+3+33OLBgO4dUkJvQjc9oUS+dtGFzvy2QI3coFTrIPnTNv379SGf5oaM5A7u0TXDa4GpKmzOcJluDBC54O6O1Pma1ivSjkYd2I2r43e9USxo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272684; c=relaxed/simple; bh=GB50mQ0xAwvXLDxGsfO9zTbH3wdQV2KxHTzCYS5KFS0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WyHALh41ArOEQYbynRvluBpvL7uuY3Qr/CiZYw69RSl06mDPIu3AH/hkJ1TuS+Ffuv1MhSJ4eD/GmTek4VNFg+wddybr2bAbrtauz57waBRYA1Qw/JNHvioTd+Ur/XsULZEnB3Iumz3uZLUTfXEAjb+oWMp+6yrFO8+taL/LUqs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nloULJM8; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nloULJM8" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7270EC4CED6; Tue, 7 Jan 2025 17:58:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736272684; bh=GB50mQ0xAwvXLDxGsfO9zTbH3wdQV2KxHTzCYS5KFS0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=nloULJM8rOfQZkcs39y/l5GTiRGlytGoyivKtOSvBjTv6mKexBvm91vcKXoOGC9De 9BogOAa7HMa6PRFu0+LFO/eMIpRt4Zn5u+fbL7JVuxxzECZlO401iCyoN3YM/ychrH ddhMOg9B/tK4EAoQpJhMVhR7M+UmhK7h6B+txwOnmUes+0JN8fTaAAp2segvbV03im X6BFJvYQaasvdxlmYWff2B1qB2B63J26962+bGfdQcJoppnABGWfewZZ5pPCojpF5G Krj++IQkwHz9o4JJWkHdPGeyvY0t/KzI2Ao9a+kyZng6QzAdy47s4QHAq3E1Gn6pmI ftq4O6DHKln6A== From: "Rob Herring (Arm)" Date: Tue, 07 Jan 2025 11:57:24 -0600 Subject: [PATCH 6/7] perf: apple_m1: Don't disable counter in m1_pmu_enable_event() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250107-arm-pmu-cleanups-v1-v1-6-313951346a25@kernel.org> References: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> In-Reply-To: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> To: Will Deacon , Mark Rutland Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev Currently m1_pmu_enable_event() starts by disabling the event counter it has been asked to enable. This should not be necessary as the counter (and the PMU as a whole) should not be active when m1_pmu_enable_event() is called. Cc: Marc Zyngier Signed-off-by: Rob Herring (Arm) --- drivers/perf/apple_m1_cpu_pmu.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/perf/apple_m1_cpu_pmu.c b/drivers/perf/apple_m1_cpu_pm= u.c index 1d4d01e1275e05c9dc656502d22de5bb2fc46b11..6a7071f0298d3d15f0c6f2fbc49= 789d669aa02e6 100644 --- a/drivers/perf/apple_m1_cpu_pmu.c +++ b/drivers/perf/apple_m1_cpu_pmu.c @@ -394,10 +394,6 @@ static void m1_pmu_enable_event(struct perf_event *eve= nt) user =3D event->hw.config_base & M1_PMU_CFG_COUNT_USER; kernel =3D event->hw.config_base & M1_PMU_CFG_COUNT_KERNEL; =20 - m1_pmu_disable_counter_interrupt(event->hw.idx); - m1_pmu_disable_counter(event->hw.idx); - isb(); - m1_pmu_configure_counter(event->hw.idx, evt, user, kernel); m1_pmu_enable_counter(event->hw.idx); m1_pmu_enable_counter_interrupt(event->hw.idx); --=20 2.45.2 From nobody Tue Dec 23 09:31:04 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D1D1F1F666C for ; Tue, 7 Jan 2025 17:58:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272685; cv=none; b=GpSEYvaSWV5HM3oCz6StII3xDhZ33wW3+Y8GzPe9+RVMF3XggRr+X/9++awKOfB8onL+endqIMN40/xMXDRmFgI9T/4NmAC6sypPdRcN5q/l1eU0/UkJrk2Gr4KUXUigSjzWfwFrs0W87sR4VoCHtRh+yLIhscDTmyZUg28s7oQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736272685; c=relaxed/simple; bh=Xg0HoZ+XSp8w6IMRK8GIJFRMyzdy5hLO5u4gC+4TkYs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VAXypmtsF2/una329C+kH3Ptk31b/z6wUq0YPjbB+0GDouS2oyMosxSPrzf3+nwKNjpKr4zv+qTMJ4MMrLne9V8wL6JNhO4gRdYkxrikDn73OrvMN48loeRPQ7IYAqx9URl1mKcVKUThB874JVhw1p+DdZGRGC7nlRxXHIcvuwc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=o8M8/kRQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="o8M8/kRQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 91F76C4CEDD; Tue, 7 Jan 2025 17:58:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1736272685; bh=Xg0HoZ+XSp8w6IMRK8GIJFRMyzdy5hLO5u4gC+4TkYs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=o8M8/kRQGcpF0+IVRy8JCTN1s+ST4iPUbVn+Jd2f96tKgqeQdgThP9TH7Yo9KdIl9 EBTAbUQk3UUb0MryJM6s5bnVAbtGHBMFEFkcDIUZ1vkh8gzOpiLO59yYwJy3jxmZ2r vOK1NPtz+5heBV/k3kfTuoOZfW3fAqJILky3A6/7THaTaykzIWLIqf0WE04KF3HqgG U2VLiz7Xcb7gOKHoUAFceLmg3dPP4ULD+0qMglw6iypwEQWrXAt07/G3UJ9tFCRrIP zESCb1OgbRj7HrGWdi2JoCHAcQO+I0ICGInsHYe8gL5T37Q1No21wFihW3fee6hpnn CiaqFKfPl4Z7Q== From: "Rob Herring (Arm)" Date: Tue, 07 Jan 2025 11:57:25 -0600 Subject: [PATCH 7/7] perf: arm_pmu: Move PMUv3-specific data Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250107-arm-pmu-cleanups-v1-v1-7-313951346a25@kernel.org> References: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> In-Reply-To: <20250107-arm-pmu-cleanups-v1-v1-0-313951346a25@kernel.org> To: Will Deacon , Mark Rutland Cc: Marc Zyngier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15-dev From: Mark Rutland A few fields in struct arm_pmu are only used with PMUv3, and soon we will need to add more for BRBE. Group the fields together so that we have a logical place to add more data in future. At the same time, remove the comment for reg_pmmir as it doesn't convey anything useful. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland Signed-off-by: Rob Herring (Arm) --- include/linux/perf/arm_pmu.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 4b5b83677e3f28b578c1d63a5f89b5f248e06876..c70d528594f26a39a74e00ec353= 824a484cb55e8 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -84,7 +84,6 @@ struct arm_pmu { struct pmu pmu; cpumask_t supported_cpus; char *name; - int pmuver; irqreturn_t (*handle_irq)(struct arm_pmu *pmu); void (*enable)(struct perf_event *event); void (*disable)(struct perf_event *event); @@ -102,18 +101,20 @@ struct arm_pmu { int (*map_event)(struct perf_event *event); DECLARE_BITMAP(cntr_mask, ARMPMU_MAX_HWEVENTS); bool secure_access; /* 32-bit ARM only */ -#define ARMV8_PMUV3_MAX_COMMON_EVENTS 0x40 - DECLARE_BITMAP(pmceid_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS); -#define ARMV8_PMUV3_EXT_COMMON_EVENT_BASE 0x4000 - DECLARE_BITMAP(pmceid_ext_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS); struct platform_device *plat_device; struct pmu_hw_events __percpu *hw_events; struct hlist_node node; struct notifier_block cpu_pm_nb; /* the attr_groups array must be NULL-terminated */ const struct attribute_group *attr_groups[ARMPMU_NR_ATTR_GROUPS + 1]; - /* store the PMMIR_EL1 to expose slots */ + + /* PMUv3 only */ + int pmuver; u64 reg_pmmir; +#define ARMV8_PMUV3_MAX_COMMON_EVENTS 0x40 + DECLARE_BITMAP(pmceid_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS); +#define ARMV8_PMUV3_EXT_COMMON_EVENT_BASE 0x4000 + DECLARE_BITMAP(pmceid_ext_bitmap, ARMV8_PMUV3_MAX_COMMON_EVENTS); =20 /* Only to be used by ACPI probing code */ unsigned long acpi_cpuid; --=20 2.45.2