From nobody Wed Feb 11 07:49:50 2026 Received: from mail-lj1-f177.google.com (mail-lj1-f177.google.com [209.85.208.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D0FB5FEED; Sun, 5 Jan 2025 21:08:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736111312; cv=none; b=WBirWripedOwIkAzlp8fJYnz3ZUOaHG80pzOLSp4DrF3//Y/5XpJ6ce1CFGRJVJG43LI9p643Hk4PThPyLKn3Ea1HR+xquJFxb3Rxi5SIs3gz+R3xR89gHbGYtlFm+p/mqdO9J/WC9/JGdgqTW9i/U3pCb3dSzwXCSYYqMyz7Dg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736111312; c=relaxed/simple; bh=FZNwbWomaeVN9RnbVJBifmyvl2fOg8lIQ3j6AKNhZwk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HM8j1QYFgx3EuzcUZ6mLvAYE5Q4F/s7ZpPHmPXEjTN1kWVrdvUC9S/PPHaKA0AsFbnzzvkIb5K3T9BY/5qAEsxxMFC+6+WaKtgDXTdgbs25Ja50k+Pwf7wrULBYn+pP+elRbvvfrhsfamRFkodabTsVQzGRgiy8sxKLXE6zISo4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=npacphud; arc=none smtp.client-ip=209.85.208.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="npacphud" Received: by mail-lj1-f177.google.com with SMTP id 38308e7fff4ca-2ffa49f623cso179308791fa.1; Sun, 05 Jan 2025 13:08:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1736111306; x=1736716106; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=TAY+qjwlYy4JtDCuiDAuRUFQEfqXapyf0f+4Spbqrns=; b=npacphudRkuNKd3c7EuRVZ0oV90LoXEt4AqdS/M/jl17DKQ7MEJlrVR19ZeEUEDfDa GGEM66VnPiAUDZmR3TidiomqyVg7kSXYFoLpSnnElVOaxIlEVx5R7X25W00rnKbpx5JS JJdDXHvniydOX60CutZhDgcbHP5eU4Vuq4S3RKt9Un9tQhEpTjX/vbMAPTHCbCIB4rMa ai7ghK3iuSpxX8bfWESwq1sSLIFrORLeRUREQq68ld/Qx1q34+FvSg8FhuwZYQEOdn3i oeNx33iWNye0JYgW8610V5sthpJ8dIiJ+px8X5r/6DGpz8ronU8woe4wBV52xpSayBxD Z8Mg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736111306; x=1736716106; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TAY+qjwlYy4JtDCuiDAuRUFQEfqXapyf0f+4Spbqrns=; b=dwlnY8GhAFWZc0jHx3adAJBisvYga0spLjP/wtAUIcMo4KPLq6V30IMLp6S6+UL2ZM 0kcCrDJi5gTHWq/xVMWGZZG0Yl370xI2Ph495wI9Mka7A90+QAE5X1piUlMR4/A085Fi NVMeOvm5H2XX3hl/42ScIcb9VK7jAuIkZnQc+Fich+DmOaSTJWhD/EX+S4monvGxU7We tEsHBO1IGtuet5XMizcgPnQsj6SigwtyStY1OjsqxttAwEjJF03P1U6SYsLH2upNRcRA YNF9Jmqt6MqtnLT1jLIyP8IuUEQyUdifjEvaBCRGDVpYsadGyISh0x8ms5EiP8mFPQ8v jxuA== X-Forwarded-Encrypted: i=1; AJvYcCVfMKcZ2x/OuuoBwbH2jx3sHJZInlzC26ZTyKvp5EMqG+z7Wb9Apzjw/2lkwo8TMQFGWBH+6+7lD95v7Lk=@vger.kernel.org X-Gm-Message-State: AOJu0YyLRhsCA0g5fo1JlMK5W7jg0j305XU+STMfal0MbGYXCPuUn6y1 mWWja4MqRYSsutQbNDrEOYoOck3Zxj5u6rG/72qkSMZ4+cSmj3Cw X-Gm-Gg: ASbGncsgCaqYG7jHVQ/0qKhGdIsh5Ke0Cmg77osJa0m6jEOHi6EBEvHMr7lwV8qeRv/ Z2Rc4OZY50QMuOCel8L4gaOeBJYQfjw6MB4T2hczo1HUBvyAH4zqBLyt9bx/HlT7bmQbzNHrIaC tWHyh5xrf3UZupW3lCYG4dsPAU3SjwpAcSBiZr44xS+ipDpEJ3dYLnJSLerjyIKerjKSqYqZOw9 1C+Jy7TjyFRvBcymxYqwUecfIZuZ7oh9S9ForPBls4LD7yTZKw4 X-Google-Smtp-Source: AGHT+IF1QgXEPCFYKsBujsfD5FI34yp0Ul1bDehnMwPocE+fDJQxBpOUufV+QeaUrGhME2LRw6i4UA== X-Received: by 2002:a05:6512:3049:b0:542:250d:eef2 with SMTP id 2adb3069b0e04-5422953c2f8mr16876916e87.20.1736111306011; Sun, 05 Jan 2025 13:08:26 -0800 (PST) Received: from [10.42.0.1] ([185.204.1.212]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-54223813687sm4773419e87.137.2025.01.05.13.08.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 13:08:24 -0800 (PST) From: Alexey Charkov Date: Mon, 06 Jan 2025 01:07:18 +0400 Subject: [PATCH 2/2] arm64: dts: rockchip: Add H96 Max V58 TV Box based on RK3588 SoC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250106-rk3588-h96-max-v58-v1-2-d25255f851fc@gmail.com> References: <20250106-rk3588-h96-max-v58-v1-0-d25255f851fc@gmail.com> In-Reply-To: <20250106-rk3588-h96-max-v58-v1-0-d25255f851fc@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alexey Charkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1736111288; l=19973; i=alchark@gmail.com; s=20240125; h=from:subject:message-id; bh=FZNwbWomaeVN9RnbVJBifmyvl2fOg8lIQ3j6AKNhZwk=; b=WNrhV50Bul+NeB45cr6KCxV3UGg+JWHzPkCvvcnHQYadVpOZjNerH08y5AwP+KZN/3RhGmcFu qQubQvtaBvJBkBQfdpjImVCGsbpDly5M+/a6Zge8bmnBw8TwRQAsEu5 X-Developer-Key: i=alchark@gmail.com; a=ed25519; pk=xRO8VeD3J5jhwe0za0aHt2LDumQr8cm0Ls7Jz3YGimk= H96 Max V58 is a compact Rockchip RK3588 based device that ships with Android and is meant for use as a TV connected media box. Its hardware includes: - Rockchip RK3588 SoC with a small aluminium heatsink - 4GB or 8GB LPDDR4 RAM - 32GB or 64GB eMMC 5.1 storage (HS400) - Onboard AP6275P wireless module providing 802.11ax 2x2 MIMO WiFi over PCIe connection and Bluetooth 5.3 over UART with two external detachable antennas - 1x GbE using the onboard GMAC and an RTL8211F PHY - 1x USB 2.0 Type-A (also serves as the Maskrom port) - 1x USB 3.0 Type-A - 1x HDMI 2.1 output - 1x optical SPDIF output (not yet enabled here) - LED line display ("88:88" digits plus icons) driven by an FD6551 IC connected over bitbanged I2C (not yet enabled here) - GPIO connected CIR receiver - Single Rockchip RK806-1 PMIC - 12x onboard ambient LEDs lighting up the bottom of the device - 5v DCIN using a standard round 5.5mm connector Signed-off-by: Alexey Charkov --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts | 785 +++++++++++++++++= ++++ 2 files changed, 786 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 86cc418a2255cdc22f1d503e9519d2d9572d4e9d..47603d0fa128736305277abd2d5= ad71adae6233e 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -138,6 +138,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-edgeble-neu6a-w= ifi.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-edgeble-neu6b-io.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-friendlyelec-cm3588-nas.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-h96-max-v58.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-jaguar.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-nanopc-t6.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-nanopc-t6-lts.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts b/arch/arm= 64/boot/dts/rockchip/rk3588-h96-max-v58.dts new file mode 100644 index 0000000000000000000000000000000000000000..457ec9c43aaca52cdfc8b7a80bd= ca7508a0b6c1c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-h96-max-v58.dts @@ -0,0 +1,785 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include +#include +#include +#include +#include "rk3588.dtsi" + +/ { + model =3D "H96 Max V58 TV Box"; + compatible =3D "haochuangyi,h96-max-v58", "rockchip,rk3588"; + + aliases { + ethernet0 =3D &gmac1; + mmc0 =3D &sdhci; + }; + + adc-keys { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 1>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-function { + label =3D "Reset"; + linux,code =3D ; + press-threshold-microvolt =3D <1750>; + }; + }; + + chosen { + stdout-path =3D "serial2:1500000n8"; + }; + + hdmi0-con { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi0_con_in: endpoint { + remote-endpoint =3D <&hdmi0_out_con>; + }; + }; + }; + + ir-receiver { + compatible =3D "gpio-ir-receiver"; + gpios =3D <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&ir_receiver_pin>; + }; + + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&led_pins>; + + led { + color =3D ; + function =3D LED_FUNCTION_STATUS; + gpios =3D <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + }; + + pcie_3v3: regulator-3v3-pcie { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH + &gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; + pinctrl-0 =3D <&pcie2_0_pow &wl_en>; + pinctrl-names =3D "default"; + regulator-name =3D "pcie_3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc5v0_host: regulator-5v0-host { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + gpios =3D <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + pinctrl-0 =3D <&vcc5v0_host_en>; + pinctrl-names =3D "default"; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc5v0_otg: regulator-5v0-otg { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_otg"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + gpios =3D <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + pinctrl-0 =3D <&vcc5v0_otg_en>; + pinctrl-names =3D "default"; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc5v0_sys: regulator-5v0-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; + + vcc_1v1_nldo_s3: regulator-1v1 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + vin-supply =3D <&vcc5v0_sys>; + }; +}; + +&combphy0_ps { + status =3D "okay"; +}; + +&combphy1_ps { + status =3D "okay"; +}; + +&combphy2_psu { + status =3D "okay"; +}; + +&cpu_b0 { + cpu-supply =3D <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply =3D <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply =3D <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply =3D <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&gpu { + mali-supply =3D <&vdd_gpu_s0>; + status =3D "okay"; +}; + +&hdmi0 { + status =3D "okay"; +}; + +&hdmi0_in { + hdmi0_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi0>; + }; +}; + +&hdmi0_out { + hdmi0_out_con: endpoint { + remote-endpoint =3D <&hdmi0_con_in>; + }; +}; + +&hdptxphy_hdmi0 { + status =3D "okay"; +}; + +&i2c0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0m2_xfer>; + status =3D "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible =3D "rockchip,rk8602"; + reg =3D <0x42>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <1050000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible =3D "rockchip,rk8603", "rockchip,rk8602"; + reg =3D <0x43>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <1050000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c6 { + status =3D "okay"; + + hym8563: rtc@51 { + compatible =3D "haoyu,hym8563"; + reg =3D <0x51>; + #clock-cells =3D <0>; + clock-output-names =3D "hym8563"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hym8563_int>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + wakeup-source; + }; +}; + +&gmac1 { + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy1>; + phy-mode =3D "rgmii-id"; + pinctrl-0 =3D <&gmac1_miim + &gmac1_tx_bus2 + &gmac1_rx_bus2 + &gmac1_rgmii_clk + &gmac1_rgmii_bus>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + /* RTL8211F */ + compatible =3D "ethernet-phy-id001c.c916"; + reg =3D <0x1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rtl8211f_rst>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + }; +}; + +&pcie2x1l0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie2_0_rst>; + reset-gpios =3D <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + status =3D "okay"; + + pcie@0,0 { + reg =3D <0x200000 0 0 0 0>; + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + device_type =3D "pci"; + bus-range =3D <0x20 0x2f>; + + wifi: wifi@0,0 { + compatible =3D "pci14e4,449d"; + reg =3D <0x210000 0 0 0 0>; + clocks =3D <&hym8563>; + clock-names =3D "lpo"; + }; + }; +}; + +&pinctrl { + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins =3D <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + ir-receiver { + ir_receiver_pin: ir-receiver-pin { + rockchip,pins =3D <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + led_pins: led-pins { + rockchip,pins =3D <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie2 { + pcie2_0_rst: pcie2-0-rst { + rockchip,pins =3D <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie2_0_pow: pcie2-0-pow { + rockchip,pins =3D <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtl8211f { + rtl8211f_rst: rtl8211f-rst { + rockchip,pins =3D <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins =3D <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifibt { + wl_en: wl-en { + rockchip,pins =3D <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + wl_wake_host: wl-wake-host { + rockchip,pins =3D <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + bt_en: bt-en { + rockchip,pins =3D <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + bt_wake: bt-wake { + rockchip,pins =3D <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + bt_wake_host: bt-wake-host { + rockchip,pins =3D <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&saradc { + vref-supply =3D <&avcc_1v8_s0>; + status =3D "okay"; +}; + +&sdhci { + bus-width =3D <8>; + no-sdio; + no-sd; + non-removable; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + status =3D "okay"; +}; + +&spi2 { + status =3D "okay"; + assigned-clocks =3D <&cru CLK_SPI2>; + assigned-clock-rates =3D <200000000>; + num-cs =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi2m2_cs0 &spi2m2_pins>; + + pmic@0 { + compatible =3D "rockchip,rk806"; + reg =3D <0x0>; + interrupt-parent =3D <&gpio0>; + interrupts =3D <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + spi-max-frequency =3D <1000000>; + system-power-controller; + + vcc1-supply =3D <&vcc5v0_sys>; + vcc2-supply =3D <&vcc5v0_sys>; + vcc3-supply =3D <&vcc5v0_sys>; + vcc4-supply =3D <&vcc5v0_sys>; + vcc5-supply =3D <&vcc5v0_sys>; + vcc6-supply =3D <&vcc5v0_sys>; + vcc7-supply =3D <&vcc5v0_sys>; + vcc8-supply =3D <&vcc5v0_sys>; + vcc9-supply =3D <&vcc5v0_sys>; + vcc10-supply =3D <&vcc5v0_sys>; + vcc11-supply =3D <&vcc_2v0_pldo_s3>; + vcc12-supply =3D <&vcc5v0_sys>; + vcc13-supply =3D <&vcc_1v1_nldo_s3>; + vcc14-supply =3D <&vcc_1v1_nldo_s3>; + vcca-supply =3D <&vcc5v0_sys>; + + gpio-controller; + #gpio-cells =3D <2>; + + rk806_dvs1_null: dvs1-null-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { + regulator-name =3D "vdd_gpu_s0"; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + regulator-enable-ramp-delay =3D <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { + regulator-name =3D "vdd_cpu_lit_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-name =3D "vdd_log_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <675000>; + regulator-max-microvolt =3D <750000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { + regulator-name =3D "vdd_vdenc_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-name =3D "vdd_ddr_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <675000>; + regulator-max-microvolt =3D <900000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-name =3D "vdd2_ddr_s3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-name =3D "vdd_2v0_pldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <2000000>; + regulator-max-microvolt =3D <2000000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-name =3D "vcc_3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-name =3D "vddq_ddr_s0"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-name =3D "vcc_1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + avcc_1v8_s0: pldo-reg1 { + regulator-name =3D "avcc_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-name =3D "vcc_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + avdd_1v2_s0: pldo-reg3 { + regulator-name =3D "avdd_1v2_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3_s0: pldo-reg4 { + regulator-name =3D "vcc_3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-name =3D "vccio_sd_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-ramp-delay =3D <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-name =3D "pldo6_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-name =3D "vdd_0v75_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vdd_ddr_pll_s0: nldo-reg2 { + regulator-name =3D "vdd_ddr_pll_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <850000>; + }; + }; + + avdd_0v75_s0: nldo-reg3 { + regulator-name =3D "avdd_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v85_s0: nldo-reg4 { + regulator-name =3D "vdd_0v85_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-name =3D "vdd_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&tsadc { + status =3D "okay"; +}; + +&u2phy0 { + status =3D "okay"; +}; + +&u2phy0_otg { + vbus-supply =3D <&vcc5v0_otg_en>; + status =3D "okay"; +}; + +&u2phy1 { + status =3D "okay"; +}; + +&u2phy1_otg { + phy-supply =3D <&vcc5v0_host>; + status =3D "okay"; +}; + +&uart2 { + pinctrl-0 =3D <&uart2m0_xfer>; + status =3D "okay"; +}; + +&uart9 { + pinctrl-0 =3D <&uart9m0_xfer &uart9m0_ctsn &uart9m0_rtsn>; + pinctrl-names =3D "default"; + uart-has-rtscts; + status =3D "okay"; + + bluetooth { + compatible =3D "brcm,bcm43438-bt"; + clocks =3D <&hym8563>; + clock-names =3D "lpo"; + device-wakeup-gpios =3D <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-0 =3D <&bt_en>, <&bt_wake_host>, <&bt_wake>; + pinctrl-names =3D "default"; + shutdown-gpios =3D <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + }; +}; + +&usbdp_phy0 { + status =3D "okay"; +}; + +&usbdp_phy1 { + status =3D "okay"; +}; + +&usb_host0_xhci { + dr_mode =3D "host"; + status =3D "okay"; +}; + +&usb_host1_xhci { + dr_mode =3D "host"; + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vop { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi0_in_vp0>; + }; +}; --=20 2.47.1