From nobody Thu Feb 12 20:17:10 2026 Received: from esa2.hc555-34.eu.iphmx.com (esa2.hc555-34.eu.iphmx.com [23.90.104.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38B04136E3F for ; Sun, 5 Jan 2025 08:41:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=23.90.104.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736066470; cv=none; b=XOLwb4gaVAlW9p2ZYIqr5x5sY6kpTMtQXu6As6bZ0c1uSWotZ/qC4dJCNw1i0ULi34JTes/0OiiQMefAECZrSX4HXjGqj0ixyIqyaQGdH1xiphWk51HAkpWIodLmC9t+vJpfgN4NI+MRb/irIGXUQ+zDLxICR2GlflsXtZmaJvY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736066470; c=relaxed/simple; bh=Z/K0SqeHgdhQcv49IYilM/zZ3lHXS5Gvf9N0LFcoCU4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=rRJ8t8Y4MB8YSV7iHP2G/h7BXXIFOR5YLVhEjfPwf3YK6dOpNXfxo7YPqS62L5ut/wnT7uv6BPnhF+4Askq3ds7NXKdk4sSyB+whlRha7ktAehXYqS7P5DUzrzzncvQARw2lGmVZDDTmHCRQkxBHgF8zaygWphHTFAXMxuN+Ib8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mobileye.com; spf=pass smtp.mailfrom=mobileye.com; dkim=fail (0-bit key) header.d=mobileye.com header.i=@mobileye.com header.b=Ht4yicaD reason="key not found in DNS"; arc=none smtp.client-ip=23.90.104.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mobileye.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mobileye.com Authentication-Results: smtp.subspace.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=mobileye.com header.i=@mobileye.com header.b="Ht4yicaD" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=mobileye.com; i=@mobileye.com; q=dns/txt; s=MoEyIP; t=1736066465; x=1767602465; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Z/K0SqeHgdhQcv49IYilM/zZ3lHXS5Gvf9N0LFcoCU4=; b=Ht4yicaDjH8oGZtGBb9OAGf7OelJYqE4Z/hN1liZMmfZWRRSFkYBev+A YheblFoUTU/3n6WuiN6Cfy4khREWMWPeuC0N17XtOgJzOLwEPklMW+5Wh okEp1wRhKHUDL2muY+4qVcrjimIDdhxjGqb5ySDJ5YS7EaEgsYUFmiUoX tTG8JbDS2pbjeVCNaB3oxC9WD4RDfuCCwD8ueKSydOnR2oVTrQWs7DNxN qSzfy3jdkq0Hf3W4rsLle7a1SD3NF64xOCrjUGTmtN/Tof+ZTthjZGs9m DKjHjZpUSomhIZHcwgpmIbmVh9rjP5XnX9u3ByHHOhMNi0fcFroV3Xexz g==; X-CSE-ConnectionGUID: YgFwCgrJTyGmZQk9xC6w3A== X-CSE-MsgGUID: YZ3rcDsSSHWKyUrpIJQEXw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from unknown (HELO ces01_data.me-corp.lan) ([146.255.191.134]) by esa2.hc555-34.eu.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jan 2025 10:39:53 +0200 X-CSE-ConnectionGUID: XSsLCryfQ2Ke3UGOxo8zcA== X-CSE-MsgGUID: ClLY1LQXRn2Ji/nVT3b89w== Received: from unknown (HELO epgd022.me-corp.lan) ([10.154.54.6]) by ces01_data.me-corp.lan with SMTP; 05 Jan 2025 10:39:51 +0200 Received: by epgd022.me-corp.lan (sSMTP sendmail emulation); Sun, 05 Jan 2025 10:39:51 +0200 From: Vladimir Kondratiev To: Anup Patel , Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Vladimir Kondratiev Subject: [PATCH v2] irqchip/riscv-aplic: add support for hart indexes Date: Sun, 5 Jan 2025 10:39:22 +0200 Message-ID: <20250105083922.3563784-1-vladimir.kondratiev@mobileye.com> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Risc-V APLIC specification defines "hart index" in [1]: Within a given interrupt domain, each of the domain=E2=80=99s harts has a unique index number in the range 0 to 2^14 =E2=88=92 1 (=3D 16,383). The in= dex number a domain associates with a hart may or may not have any relationship to the unique hart identifier (=E2=80=9Chart ID=E2=80=9D) that= the RISC-V Privileged Architecture assigns to the hart. Two different interrupt domains may employ entirely different index numbers for the same set of harts. Further, this document says in "4.5 Memory-mapped control region for an interrupt domain": The array of IDC structures may include some for potential hart index numbers that are not actual hart index numbers in the domain. For example, the first IDC structure is always for hart index 0, but 0 is not necessarily a valid index number for any hart in the domain. Support arbitrary hart indexes specified in optional APLIC property "riscv,hart-index" that should be array of u32 elements, one per interrupt target. If this property not specified, fallback is to use logical hart indexes within the domain. [1]: https://github.com/riscv/riscv-aia Signed-off-by: Vladimir Kondratiev Reviewed-by: Anup Patel --- drivers/irqchip/irq-riscv-aplic-direct.c | 25 +++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-riscv-aplic-direct.c b/drivers/irqchip/irq= -riscv-aplic-direct.c index 7cd6b646774b..c80a65c1732a 100644 --- a/drivers/irqchip/irq-riscv-aplic-direct.c +++ b/drivers/irqchip/irq-riscv-aplic-direct.c @@ -31,7 +31,7 @@ struct aplic_direct { }; =20 struct aplic_idc { - unsigned int hart_index; + u32 hart_index; void __iomem *regs; struct aplic_direct *direct; }; @@ -219,6 +219,21 @@ static int aplic_direct_parse_parent_hwirq(struct devi= ce *dev, u32 index, return 0; } =20 +static int aplic_direct_get_hart_index(struct device *dev, u32 logical_ind= ex, + u32 *hart_index) +{ + static const char *prop_hart_index =3D "riscv,hart-index"; + struct device_node *np =3D to_of_node(dev->fwnode); + + if (!np || !of_property_present(np, prop_hart_index)) { + *hart_index =3D logical_index; + return 0; + } + + return of_property_read_u32_index(np, prop_hart_index, + logical_index, hart_index); +} + int aplic_direct_setup(struct device *dev, void __iomem *regs) { int i, j, rc, cpu, current_cpu, setup_count =3D 0; @@ -265,8 +280,12 @@ int aplic_direct_setup(struct device *dev, void __iome= m *regs) cpumask_set_cpu(cpu, &direct->lmask); =20 idc =3D per_cpu_ptr(&aplic_idcs, cpu); - idc->hart_index =3D i; - idc->regs =3D priv->regs + APLIC_IDC_BASE + i * APLIC_IDC_SIZE; + rc =3D aplic_direct_get_hart_index(dev, i, &idc->hart_index); + if (rc) { + dev_warn(dev, "hart index not found for IDC%d\n", i); + continue; + } + idc->regs =3D priv->regs + APLIC_IDC_BASE + idc->hart_index * APLIC_IDC_= SIZE; idc->direct =3D direct; =20 aplic_idc_set_delivery(idc, true); --=20 2.43.0