From nobody Fri Feb 13 00:07:34 2026 Received: from freeshell.de (freeshell.de [116.202.128.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A3251B6CE4; Thu, 2 Jan 2025 19:46:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.202.128.144 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735847172; cv=none; b=AFgWqbgDuV+3ggUXYqFU4Xtd8i+mtwdXruai0yntlmLLp0jRfdlsH++6+ttJ/PcbPABxV++w4rmO7ycO/NcxywsL5FJ0eFohmg5ygyfyuxbwdRp9UpiRRsk0F7Kf5EoM3QQLhWrhNSpmGwu5NnZoZRwp0NZmQqnitchXz6PzrDo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735847172; c=relaxed/simple; bh=oTIxFWatgWhYxFCFRMuoN6XmPqo1xdFI1LHILwoyojM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KzrqxEbZsB5U/9n2hrnDZ+cUQ74Vz8V980jow3fRv/gtOLCk+z9KQYjX1j40JlJUJ14rFVut22oCQdRBWC7H/gYqMHJW2WbmGjeZR2HM4BS8nzcwqIKH3xiu+yZDJurztLspHiHbl03H3lqDa0YqtND/P57L2b/iDF4TPdfgck0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=freeshell.de; spf=pass smtp.mailfrom=freeshell.de; arc=none smtp.client-ip=116.202.128.144 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=freeshell.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=freeshell.de Received: from hay.lan. (unknown [IPv6:2605:59c8:31de:bf00:6ecf:39ff:fe00:8375]) (Authenticated sender: e) by freeshell.de (Postfix) with ESMTPSA id 19CB4B4B32BD; Thu, 2 Jan 2025 20:46:05 +0100 (CET) From: E Shattow To: Conor Dooley , Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: linux-kernel@vger.kernel.org, E Shattow , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH v1 3/5] riscv: dts: starfive: jh7110-common: assign 24MHz clock-frequency to uart0 Date: Thu, 2 Jan 2025 11:45:09 -0800 Message-ID: <20250102194530.418127-4-e@freeshell.de> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250102194530.418127-1-e@freeshell.de> References: <20250102194530.418127-1-e@freeshell.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Set uart0 clock-frequency for better compatibility with operating system and downstream boot loader SPL secondary program loader. Signed-off-by: E Shattow --- arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/b= oot/dts/starfive/jh7110-common.dtsi index 651f9a602226..bf2f0c34ad4e 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi @@ -636,6 +636,7 @@ GPOEN_DISABLE, }; =20 &uart0 { + clock-frequency =3D <24000000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&uart0_pins>; status =3D "okay"; --=20 2.45.2