From nobody Thu Feb 12 23:04:14 2026 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB8B61A9B42 for ; Thu, 2 Jan 2025 12:01:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735819272; cv=none; b=EDBN8xbd3BwWb4UOfljDtqYoYQ9pb9f97DbXNUJCZ2RNRFjz79JZafpZDONhXp/DopU4KdOt7g4ai36W36m/Bq9jB1Vut1txKILfyzDZRBqNwlor2ByYKRR1MyO1ZT2EqkNlUTGhqRJOnJq1P6G3E655KgU/VRCJb+/JGZPt+kQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735819272; c=relaxed/simple; bh=ycveCP2WQYRC4a48eWGR+FooSeNhmjHE0+BzGOFrjC8=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=qNvB++inf2Q4yKZBU/P8wW6yItIaneUwwevkIDgL/Y5IKd6UzArpGkALYpRN9b0WO3s7m2npk2e34Dmwm4kWQEXQBZz2jmrFQGGkW2QZGPv5x6LfbyB/cbpCOR66SMtaZwXwEd3wO6ABK52JqsFI2ujSLA72lPpAePQ7SUQP+ts= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=Bb9/ORPN; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Bb9/ORPN" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 502C0xWW1883392 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 2 Jan 2025 06:00:59 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1735819259; bh=PlyBZfExEvkhoQt1gX0M1GJlJo7DHqgYf5VfKbzFXbw=; h=From:To:CC:Subject:Date; b=Bb9/ORPNjZRn9pDP+NwCFmqqbX7ce0g/wG3VuE8PHzNezys33CYYlDk27fXALwpj2 yq3TfQaEhgAFL2LdwSpRmXdDDtNlyLt86jn4vWOyD0GMWJ8NRTP2Kzw3Njd9JoT1D0 VVi/6/ERUolKLnE1C4LxbuHgOuS+wU9lCQzAUYsA= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 502C0xrV015420 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 2 Jan 2025 06:00:59 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 2 Jan 2025 06:00:59 -0600 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 2 Jan 2025 06:00:59 -0600 Received: from santhoshkumark.dhcp.ti.com (santhoshkumark.dhcp.ti.com [172.24.227.241]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 502C0u3O040379; Thu, 2 Jan 2025 06:00:57 -0600 From: Santhosh Kumar K To: , CC: , , , , Subject: [PATCH] arm64: defconfig: Enable SPI NAND flashes Date: Thu, 2 Jan 2025 17:30:43 +0530 Message-ID: <20250102120043.1404843-1-s-k6@ti.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Add support for SPI NAND flashes on ARM64 boards/EVMs such as: 1. W35N01JW on AM62x LP SK, AM62Ax SK, J721S2 EVM, J784S4 EVM, J722S EVM, J742S2 EVM 2. W25N01JW on AM62Lx EVM by enabling the MTD_SPI_NAND config as a module. Signed-off-by: Santhosh Kumar K --- Repo: https://github.com/santhosh21/linux/tree/uL_next Test results: https://gist.github.com/santhosh21/71ab6646dccc238a0b3c47c038= 2f219a Regards, Santhosh. arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index dfa5c8d5b658..69e0c458c763 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -283,6 +283,7 @@ CONFIG_MTD_NAND_BRCMNAND=3Dm CONFIG_MTD_NAND_FSL_IFC=3Dy CONFIG_MTD_NAND_QCOM=3Dy CONFIG_MTD_SPI_NOR=3Dy +CONFIG_MTD_SPI_NAND=3Dm CONFIG_MTD_UBI=3Dm CONFIG_MTD_HYPERBUS=3Dm CONFIG_HBMC_AM654=3Dm --=20 2.34.1