From nobody Tue Feb 10 21:19:25 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21AE01E32BD for ; Wed, 1 Jan 2025 15:51:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735746668; cv=none; b=ObSsW/i4nAbQ/TetIuD06Cb99OQoKE4iCp9CJIOlv8yFQRm43iHDfSq+G+TEDCUXv+IabX5UmR/bAGqBklrq7Xl9FLzf1dkCLgb3VXbFIUblhUvCDCs7w9uJJnQPkEYUvloadCXk9OeO7Fa+nvn7jjz+GRqZAqeSSZor2VdqgeI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735746668; c=relaxed/simple; bh=DKlyLIWjqnpf+nAq/U+TMEeD4zkaljAwYs6Mr4SgMPo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Y9Kf0bL8Vh4S1EvhqBXwlpLQIVNdYinrkL8q/cFXCxT3tZV25q2fJ3dUkEVc/8Rro6enGPZXzkd9T5uab+dJtl4DgWj6q3ZquTzejvZF4WiesCsKugLv07H9KCRVH1NzI4jQecB+2E+OlMYo2q7XyV6lPlHmbVqRMVQoUIKrvxw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=P1BmHh6a; arc=none smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="P1BmHh6a" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1735746667; x=1767282667; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DKlyLIWjqnpf+nAq/U+TMEeD4zkaljAwYs6Mr4SgMPo=; b=P1BmHh6aR+Prk7zz5qZqfJZf4yIiIy3g51LVW+3VebJZic7Imys8h+fj Eq3j7iDwxU2ILEytjWoRYprRBtdEMLHVDgPmrrFstjWhkFYK/QFspqQN3 WwNsXF1RppPAviRCLy8DFP6uDq0QpeeTgkx5nY2V7wwuO3MeGdn8n1FBt 3FN1kUjIFnu37eZmUQ6StWoWHuB3vXo8FncCsAx9Tf0krEpbPWXOcY4gw lLne/w8vaTHEB2/N/ikoeVZRgNixyXE/JWpjP9PBDnGvZ0bTbLoFhpXcU m822lBMqmBwsvUj3XtzpY+rLjoVZIKrXVVBf/W0snxKUV44oonkVfA/sT Q==; X-CSE-ConnectionGUID: gCXFZg/BQlq7ezBpNCG5Bg== X-CSE-MsgGUID: cM+CgZoVQdmR8gUiXx9fWA== X-IronPort-AV: E=McAfee;i="6700,10204,11302"; a="46485616" X-IronPort-AV: E=Sophos;i="6.12,282,1728975600"; d="scan'208";a="46485616" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jan 2025 07:51:07 -0800 X-CSE-ConnectionGUID: sM9h1oo2Tp6wmsoyZgg4MQ== X-CSE-MsgGUID: 6zi7dCEZRyKlRIDgAcgkZQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,282,1728975600"; d="scan'208";a="132138980" Received: from sannilnx-dsk.jer.intel.com ([10.12.231.107]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jan 2025 07:51:02 -0800 From: Alexander Usyskin To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , Karthik Poosa Cc: Reuven Abliyev , Oren Weil , linux-mtd@lists.infradead.org, dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, Alexander Usyskin Subject: [PATCH v4 06/11] mtd: intel-dg: align 64bit read and write Date: Wed, 1 Jan 2025 17:39:20 +0200 Message-ID: <20250101153925.865703-7-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250101153925.865703-1-alexander.usyskin@intel.com> References: <20250101153925.865703-1-alexander.usyskin@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 35 ++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/mtd/devices/mtd-intel-dg.c b/drivers/mtd/devices/mtd-i= ntel-dg.c index 76ef7198fff8..230bf444b7fe 100644 --- a/drivers/mtd/devices/mtd-intel-dg.c +++ b/drivers/mtd/devices/mtd-intel-dg.c @@ -238,6 +238,24 @@ static ssize_t idg_write(struct intel_dg_nvm *nvm, u8 = region, len_s -=3D to_shift; } =20 + if (!IS_ALIGNED(to, sizeof(u64)) && + ((to ^ (to + len_s)) & GENMASK(31, 10))) { + /* + * Workaround reads/writes across 1k-aligned addresses + * (start u32 before 1k, end u32 after) + * as this fails on hardware. + */ + u32 data; + + memcpy(&data, &buf[0], sizeof(u32)); + idg_nvm_write32(nvm, to, data); + if (idg_nvm_error(nvm)) + return -EIO; + buf +=3D sizeof(u32); + to +=3D sizeof(u32); + len_s -=3D sizeof(u32); + } + len8 =3D ALIGN_DOWN(len_s, sizeof(u64)); for (i =3D 0; i < len8; i +=3D sizeof(u64)) { u64 data; @@ -295,6 +313,23 @@ static ssize_t idg_read(struct intel_dg_nvm *nvm, u8 r= egion, from +=3D from_shift; } =20 + if (!IS_ALIGNED(from, sizeof(u64)) && + ((from ^ (from + len_s)) & GENMASK(31, 10))) { + /* + * Workaround reads/writes across 1k-aligned addresses + * (start u32 before 1k, end u32 after) + * as this fails on hardware. + */ + u32 data =3D idg_nvm_read32(nvm, from); + + if (idg_nvm_error(nvm)) + return -EIO; + memcpy(&buf[0], &data, sizeof(data)); + len_s -=3D sizeof(u32); + buf +=3D sizeof(u32); + from +=3D sizeof(u32); + } + len8 =3D ALIGN_DOWN(len_s, sizeof(u64)); for (i =3D 0; i < len8; i +=3D sizeof(u64)) { u64 data =3D idg_nvm_read64(nvm, from + i); --=20 2.43.0