From nobody Sun Feb 8 19:56:58 2026 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 58A661A8F6B; Thu, 26 Dec 2024 21:59:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735250366; cv=none; b=Kgzuc1DniAN+aY7FPPtC+kxwmHbngrGfgc9OhP189BMe8/2VWeyp8YgcaOoKaePj6zjq5OBlYFRxaHHwWeCwJbKO5PjS9tla/P0PlKeDyRE15v21Pt6cfjWnKz5gFsL1Y+OKKFkZubdc5Roic1Segavxbt7wVrxMb1n6TJptzZ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735250366; c=relaxed/simple; bh=b6afsaNxqjvKpBm7KYqGT1O9UMGaX9ccD7lJEUjfhQk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=X987cr+ntmkDf6MrpeQkKBvN1tH/CTbz9R+ZVx9TqZ7nm9LMz9529aSofMQPx8uZkGk6f7QzzKPFWvkWG9vJmDCi5SvUoTnzbWYtHxV2n65J+esKJ5Fc3JP5nhdI2ubdcoJKCfXniuAMVdX62CE41TXnn7AHzYWNG8sXMYMJKYw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=cYFkJ3mM; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="cYFkJ3mM" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 4BQLx0Yr1038861 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 26 Dec 2024 15:59:00 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1735250340; bh=X2NVU+6ADJ0x/U25xn+zj8JCYbLcy/OVZZ9gnyWUOqk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=cYFkJ3mMervNyPwIiICMuNa1pkwd5rz8xpiM/4bdGTO5gb4/dqz7ltrgTymZN7wH5 rAcqnXGIvPPbiQgIrGUxKWIo74GnVquDZkMUfjoc0nAkFHFUbmfxFr9rrzCizuv+8f dpRPGK7pY0MZYzrFx/D62VM/kgumrOCOhRI8IOq8= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 4BQLx0Fv076122 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 26 Dec 2024 15:59:00 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 26 Dec 2024 15:58:59 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 26 Dec 2024 15:58:59 -0600 Received: from DMZ007XYY.dhcp.ti.com ([10.250.33.34]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4BQLww5w056047; Thu, 26 Dec 2024 15:58:59 -0600 From: Shree Ramamoorthy To: , , , , , , , , , CC: , Subject: [PATCH v1 1/3] gpio: tps65215: Add TPS65215 to platform_device_id table Date: Thu, 26 Dec 2024 15:58:56 -0600 Message-ID: <20241226215858.397054-2-s-ramamoorthy@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241226215858.397054-1-s-ramamoorthy@ti.com> References: <20241226215858.397054-1-s-ramamoorthy@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Add platform_device_id struct and use the platform_get_device_id() output to match which PMIC device is in use. With new name options, the gpio_chip .label field is now assigned to the platform_device name match. Remove MODULE_ALIAS since it is now generated by MODULE_DEVICE_TABLE. Signed-off-by: Shree Ramamoorthy --- drivers/gpio/gpio-tps65219.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-tps65219.c b/drivers/gpio/gpio-tps65219.c index 526640c39a11..8508c8f320d0 100644 --- a/drivers/gpio/gpio-tps65219.c +++ b/drivers/gpio/gpio-tps65219.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0 /* - * GPIO driver for TI TPS65219 PMICs + * GPIO driver for TI TPS65215/TPS65219 PMICs * - * Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/ */ =20 #include @@ -141,7 +141,6 @@ static int tps65219_gpio_direction_output(struct gpio_c= hip *gc, unsigned int off } =20 static const struct gpio_chip tps65219_template_chip =3D { - .label =3D "tps65219-gpio", .owner =3D THIS_MODULE, .get_direction =3D tps65219_gpio_get_direction, .direction_input =3D tps65219_gpio_direction_input, @@ -164,20 +163,28 @@ static int tps65219_gpio_probe(struct platform_device= *pdev) =20 gpio->tps =3D tps; gpio->gpio_chip =3D tps65219_template_chip; + gpio->gpio_chip.label =3D dev_name(&pdev->dev); gpio->gpio_chip.parent =3D tps->dev; =20 return devm_gpiochip_add_data(&pdev->dev, &gpio->gpio_chip, gpio); } =20 +static const struct platform_device_id tps6521x_gpio_id_table[] =3D { + { "tps65219-gpio", TPS65219 }, + { "tps65215-gpio", TPS65215 }, + { }, +}; +MODULE_DEVICE_TABLE(platform, tps6521x_gpio_id_table); + static struct platform_driver tps65219_gpio_driver =3D { .driver =3D { .name =3D "tps65219-gpio", }, .probe =3D tps65219_gpio_probe, + .id_table =3D tps6521x_gpio_id_table, }; module_platform_driver(tps65219_gpio_driver); =20 -MODULE_ALIAS("platform:tps65219-gpio"); MODULE_AUTHOR("Jonathan Cormier "); -MODULE_DESCRIPTION("TPS65219 GPIO driver"); +MODULE_DESCRIPTION("TPS65215/TPS65219 GPIO driver"); MODULE_LICENSE("GPL"); --=20 2.34.1 From nobody Sun Feb 8 19:56:58 2026 Received: from lelvem-ot02.ext.ti.com (lelvem-ot02.ext.ti.com [198.47.23.235]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D5B11B6CF0; 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Thu, 26 Dec 2024 15:59:00 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 26 Dec 2024 15:59:00 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 26 Dec 2024 15:59:00 -0600 Received: from DMZ007XYY.dhcp.ti.com ([10.250.33.34]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4BQLww5x056047; Thu, 26 Dec 2024 15:58:59 -0600 From: Shree Ramamoorthy To: , , , , , , , , , CC: , Subject: [PATCH v1 2/3] gpio: tps65215: Update GPIO0_IDX macro prefix Date: Thu, 26 Dec 2024 15:58:57 -0600 Message-ID: <20241226215858.397054-3-s-ramamoorthy@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241226215858.397054-1-s-ramamoorthy@ti.com> References: <20241226215858.397054-1-s-ramamoorthy@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Updating the macro name to TPS6521X_GPIO0_IDX is meant to indicate this macro applies to both PMIC devices. Signed-off-by: Shree Ramamoorthy Acked-by: Linus Walleij --- drivers/gpio/gpio-tps65219.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-tps65219.c b/drivers/gpio/gpio-tps65219.c index 8508c8f320d0..7adc1274d80e 100644 --- a/drivers/gpio/gpio-tps65219.c +++ b/drivers/gpio/gpio-tps65219.c @@ -14,7 +14,7 @@ =20 #define TPS65219_GPIO0_DIR_MASK BIT(3) #define TPS65219_GPIO0_OFFSET 2 -#define TPS65219_GPIO0_IDX 0 +#define TPS6521X_GPIO0_IDX 0 =20 struct tps65219_gpio { struct gpio_chip gpio_chip; @@ -26,7 +26,7 @@ static int tps65219_gpio_get_direction(struct gpio_chip *= gc, unsigned int offset struct tps65219_gpio *gpio =3D gpiochip_get_data(gc); int ret, val; =20 - if (offset !=3D TPS65219_GPIO0_IDX) + if (offset !=3D TPS6521X_GPIO0_IDX) return GPIO_LINE_DIRECTION_OUT; =20 ret =3D regmap_read(gpio->tps->regmap, TPS65219_REG_MFP_1_CONFIG, &val); @@ -42,7 +42,7 @@ static int tps65219_gpio_get(struct gpio_chip *gc, unsign= ed int offset) struct device *dev =3D gpio->tps->dev; int ret, val; =20 - if (offset !=3D TPS65219_GPIO0_IDX) { + if (offset !=3D TPS6521X_GPIO0_IDX) { dev_err(dev, "GPIO%d is output only, cannot get\n", offset); return -ENOTSUPP; } @@ -71,7 +71,7 @@ static void tps65219_gpio_set(struct gpio_chip *gc, unsig= ned int offset, int val struct device *dev =3D gpio->tps->dev; int v, mask, bit; =20 - bit =3D (offset =3D=3D TPS65219_GPIO0_IDX) ? TPS65219_GPIO0_OFFSET : offs= et - 1; + bit =3D (offset =3D=3D TPS6521X_GPIO0_IDX) ? TPS65219_GPIO0_OFFSET : offs= et - 1; =20 mask =3D BIT(bit); v =3D value ? mask : 0; @@ -117,7 +117,7 @@ static int tps65219_gpio_direction_input(struct gpio_ch= ip *gc, unsigned int offs struct tps65219_gpio *gpio =3D gpiochip_get_data(gc); struct device *dev =3D gpio->tps->dev; =20 - if (offset !=3D TPS65219_GPIO0_IDX) { + if (offset !=3D TPS6521X_GPIO0_IDX) { dev_err(dev, "GPIO%d is output only, cannot change to input\n", offset); return -ENOTSUPP; } @@ -131,7 +131,7 @@ static int tps65219_gpio_direction_input(struct gpio_ch= ip *gc, unsigned int offs static int tps65219_gpio_direction_output(struct gpio_chip *gc, unsigned i= nt offset, int value) { tps65219_gpio_set(gc, offset, value); - if (offset !=3D TPS65219_GPIO0_IDX) + if (offset !=3D TPS6521X_GPIO0_IDX) return 0; =20 if (tps65219_gpio_get_direction(gc, offset) =3D=3D GPIO_LINE_DIRECTION_OU= T) --=20 2.34.1 From nobody Sun Feb 8 19:56:58 2026 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BDA391B21AB; Thu, 26 Dec 2024 21:59:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735250367; cv=none; b=LVQAX6G4woLzgj4sVnbz4mduUc851Z88Gng/viiLsu0xz1pURIuRtwT9+vCFcgYq2Dm2VJwTUoMeRBF0Y2twKMcLc9HDFAC3IggD66x3LkxT0O+psedusqsjkJWLltrgR65+MfCidOW9kVjA1vALmX8jz0MNo1wR6UmmUwFOSu4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735250367; c=relaxed/simple; bh=YOJFcQUVYHvLAon8zslNiB3RMNDVOXFQDrTZMWRacwA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=INHBHOLV53BTLvYrQcuucLoM9+/QakluBieBpZgvayhd+Tvhhfmyk/DUGFHZBFErQGO+VidU/2dkNekI8TB2k8j2cbNWZ5DsvQGqQySBo6cyKL6HJTQrw0wwCUuFYHa3CpIHhy1C8It0xiFI3POl8uKf2T//qJNeEpDdez1plVI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=tbmQcLKr; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="tbmQcLKr" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 4BQLx0xK1011603 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 26 Dec 2024 15:59:01 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1735250341; bh=VgXU2JJnzqdxhbvzpcY0jkgaaM3Y+6O185ODfuYm7OY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=tbmQcLKrAYzFVAaekz2uFqCOkrw/DVX6p2D9zDsZrlzFAdEmYb+5nujXhRePyOw+P Ljv3Q37NQtQjTXri3jDN1AspdOCszf/ngEIRQqEa6wlms8onBMH+17I9Bt6bMJ0QN4 buQhuHWa3N+6Gscs+QpQtavKa3zG92muFCu5zoF4= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 4BQLx0Jr076129 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 26 Dec 2024 15:59:00 -0600 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 26 Dec 2024 15:59:00 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 26 Dec 2024 15:59:00 -0600 Received: from DMZ007XYY.dhcp.ti.com ([10.250.33.34]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4BQLww60056047; Thu, 26 Dec 2024 15:59:00 -0600 From: Shree Ramamoorthy To: , , , , , , , , , CC: , Subject: [PATCH v1 3/3] gpio tps65215: Add support for varying gpio/offset values Date: Thu, 26 Dec 2024 15:58:58 -0600 Message-ID: <20241226215858.397054-4-s-ramamoorthy@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241226215858.397054-1-s-ramamoorthy@ti.com> References: <20241226215858.397054-1-s-ramamoorthy@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Add device-specific structs to select the different PMIC .npgio and .offset values. With the chip_data struct values selected based on the match data, having a separate GPIO0_OFFSET macro is no longer needed. Signed-off-by: Shree Ramamoorthy --- drivers/gpio/gpio-tps65219.c | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-tps65219.c b/drivers/gpio/gpio-tps65219.c index 7adc1274d80e..18055c2dd35c 100644 --- a/drivers/gpio/gpio-tps65219.c +++ b/drivers/gpio/gpio-tps65219.c @@ -13,7 +13,6 @@ #include =20 #define TPS65219_GPIO0_DIR_MASK BIT(3) -#define TPS65219_GPIO0_OFFSET 2 #define TPS6521X_GPIO0_IDX 0 =20 struct tps65219_gpio { @@ -21,6 +20,11 @@ struct tps65219_gpio { struct tps65219 *tps; }; =20 +struct chip_data { + int ngpio; + int offset; +}; + static int tps65219_gpio_get_direction(struct gpio_chip *gc, unsigned int = offset) { struct tps65219_gpio *gpio =3D gpiochip_get_data(gc); @@ -71,7 +75,7 @@ static void tps65219_gpio_set(struct gpio_chip *gc, unsig= ned int offset, int val struct device *dev =3D gpio->tps->dev; int v, mask, bit; =20 - bit =3D (offset =3D=3D TPS6521X_GPIO0_IDX) ? TPS65219_GPIO0_OFFSET : offs= et - 1; + bit =3D (offset =3D=3D TPS6521X_GPIO0_IDX) ? (gpio->gpio_chip.ngpio - 1) = : offset - 1; =20 mask =3D BIT(bit); v =3D value ? mask : 0; @@ -148,14 +152,29 @@ static const struct gpio_chip tps65219_template_chip = =3D { .get =3D tps65219_gpio_get, .set =3D tps65219_gpio_set, .base =3D -1, - .ngpio =3D 3, .can_sleep =3D true, }; =20 +static const struct chip_data chip_info_table[] =3D { + [TPS65219] =3D { + .ngpio =3D 3, + .offset =3D 2, + }, + [TPS65215] =3D { + .ngpio =3D 2, + .offset =3D 1, + }, +}; + static int tps65219_gpio_probe(struct platform_device *pdev) { struct tps65219 *tps =3D dev_get_drvdata(pdev->dev.parent); struct tps65219_gpio *gpio; + const struct chip_data *pmic; + + enum pmic_id chip =3D platform_get_device_id(pdev)->driver_data; + + pmic =3D &chip_info_table[chip]; =20 gpio =3D devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); if (!gpio) @@ -164,6 +183,8 @@ static int tps65219_gpio_probe(struct platform_device *= pdev) gpio->tps =3D tps; gpio->gpio_chip =3D tps65219_template_chip; gpio->gpio_chip.label =3D dev_name(&pdev->dev); + gpio->gpio_chip.ngpio =3D pmic->ngpio; + gpio->gpio_chip.offset =3D pmic->offset; gpio->gpio_chip.parent =3D tps->dev; =20 return devm_gpiochip_add_data(&pdev->dev, &gpio->gpio_chip, gpio); --=20 2.34.1