From nobody Tue Feb 10 20:50:08 2026 Received: from mx1.sberdevices.ru (mx1.sberdevices.ru [37.18.73.165]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 32FD218E1F for ; Thu, 26 Dec 2024 13:56:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=37.18.73.165 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735221402; cv=none; b=Rs/2R+1PyGOD4vaIqNessi6ESrLW99xhQGR0eIjatAkKuF3cS0b6SzMQ02tVpFsYToIAC+pMNgOPAQEGpkzuUxHuOSiSRMX+qncfDCngKQy1v83KHXxUcZbCg7ofl3AwPplB7Ywqt0AHwt2Ed0kU7Akr+cEqwSybcmOEN/XFgQs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735221402; c=relaxed/simple; bh=f/tWfd9CXRWui+Y1AWJ2r5iPNuDui46eWwN/UbpxGjI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=TtVro0deFOvX4DjsUEJZXWfMZPRMLEaHmM7Uz2gpVxKjApSrgAVj/sxbfLrYlXoodsBKA2bW7Fs7VsutTsOGNvddB4cSd6y48w/wddSVCGIctsRWsZpzGUtTnYKJBXEaicrt6UkU+UHqKqW4BaGIcYXAoAftHe1l61GUqrRQxvI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=salutedevices.com; spf=pass smtp.mailfrom=salutedevices.com; dkim=pass (2048-bit key) header.d=salutedevices.com header.i=@salutedevices.com header.b=nnltGPHa; arc=none smtp.client-ip=37.18.73.165 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=salutedevices.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=salutedevices.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=salutedevices.com header.i=@salutedevices.com header.b="nnltGPHa" Received: from p-infra-ksmg-sc-msk01.sberdevices.ru (localhost [127.0.0.1]) by mx1.sberdevices.ru (Postfix) with ESMTP id 8CEDD100008; Thu, 26 Dec 2024 16:56:36 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.sberdevices.ru 8CEDD100008 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=salutedevices.com; s=mail; t=1735221396; bh=XTST6i6yTc9vLtzNPts6dg52V/B9tBq1q3P3PLwGUxU=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:From; b=nnltGPHa9D8raZL8j65dUOeS04QyGw9PZvfRIGIc/eCmRlx3r+58MQfFF5s5v0+RY ikL8iQhfgA9gqsPkc9WOQ9Ede5+7sOp0+LkcdTRn2tJJ2bagPCW784ie11qc6pEZ4v YWiCIr04djYV1jg1La4THwe0zXRNev+I46k3UqhMHDlW0WUAehzPHD8Q4SWzqWbLd6 MHgz1PTwo0a+LqqPTe7cYb51IwEiZ3Vik9+n81rL0NDGYW9X/3RC670vyxSFzJedJQ tFuNXV7r1m7LZB869a+KP+C6934/J8C3pLEeBGyivKUBpn7hYMiKOkFbeMouPaAIWD 9G8oPxRzh12Cw== Received: from smtp.sberdevices.ru (p-i-exch-sc-m01.sberdevices.ru [172.16.192.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.sberdevices.ru (Postfix) with ESMTPS; Thu, 26 Dec 2024 16:56:36 +0300 (MSK) From: Martin Kurbanov To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Ezra Buehler , Alexey Romanov , Frieder Schrempf CC: , , , Martin Kurbanov Subject: [PATCH v3 2/7] mtd: spinand: add OTP support Date: Thu, 26 Dec 2024 16:55:47 +0300 Message-ID: <20241226135623.43098-3-mmkurbanov@salutedevices.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241226135623.43098-1-mmkurbanov@salutedevices.com> References: <20241226135623.43098-1-mmkurbanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: p-i-exch-a-m2.sberdevices.ru (172.24.196.120) To p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 190075 [Dec 26 2024] X-KSMG-AntiSpam-Version: 6.1.1.7 X-KSMG-AntiSpam-Envelope-From: mmkurbanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 49 0.3.49 28b3b64a43732373258a371bd1554adb2caa23cb, {Tracking_from_domain_doesnt_match_to}, smtp.sberdevices.ru:5.0.1,7.1.1;127.0.0.199:7.1.2;salutedevices.com:7.1.1;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1, FromAlignment: s X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/12/26 12:50:00 #26919000 X-KSMG-AntiVirus-Status: Clean, skipped Content-Type: text/plain; charset="utf-8" The MTD subsystem already supports accessing two OTP areas: user and factory. User areas can be written by the user. This patch only adds support for the user areas. In this patch the OTP_INFO macro is provided to add parameters to spinand_info. To implement OTP operations, the client (flash driver) is provided with 5 callbacks: .read(), .write(), .info(), .lock(), .erase(). Signed-off-by: Martin Kurbanov --- drivers/mtd/nand/spi/Makefile | 3 +- drivers/mtd/nand/spi/core.c | 7 ++ drivers/mtd/nand/spi/otp.c | 169 ++++++++++++++++++++++++++++++++++ include/linux/mtd/spinand.h | 52 +++++++++++ 4 files changed, 230 insertions(+), 1 deletion(-) create mode 100644 drivers/mtd/nand/spi/otp.c diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile index 19cc77288ebbc..60d2e830ffc6b 100644 --- a/drivers/mtd/nand/spi/Makefile +++ b/drivers/mtd/nand/spi/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 -spinand-objs :=3D core.o alliancememory.o ato.o esmt.o foresee.o gigadevic= e.o macronix.o +spinand-objs :=3D core.o otp.o +spinand-objs +=3D alliancememory.o ato.o esmt.o foresee.o gigadevice.o mac= ronix.o spinand-objs +=3D micron.o paragon.o toshiba.o winbond.o xtx.o obj-$(CONFIG_MTD_SPI_NAND) +=3D spinand.o diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index 4b394eace2d09..d12f09b28e371 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -1111,6 +1111,7 @@ int spinand_match_and_init(struct spinand_device *spi= nand, spinand->flags =3D table[i].flags; spinand->id.len =3D 1 + table[i].devid.len; spinand->select_target =3D table[i].select_target; + spinand->otp =3D &table[i].otp; =20 op =3D spinand_select_op_variant(spinand, info->op_variants.read_cache); @@ -1292,6 +1293,12 @@ static int spinand_init(struct spinand_device *spina= nd) mtd->_max_bad_blocks =3D nanddev_mtd_max_bad_blocks; mtd->_resume =3D spinand_mtd_resume; =20 + if (spinand_otp_size(spinand)) { + ret =3D spinand_set_mtd_otp_ops(spinand); + if (ret) + goto err_cleanup_ecc_engine; + } + if (nand->ecc.engine) { ret =3D mtd_ooblayout_count_freebytes(mtd); if (ret < 0) diff --git a/drivers/mtd/nand/spi/otp.c b/drivers/mtd/nand/spi/otp.c new file mode 100644 index 0000000000000..3650ff336db14 --- /dev/null +++ b/drivers/mtd/nand/spi/otp.c @@ -0,0 +1,169 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024, SaluteDevices. All Rights Reserved. + * + * Author: Martin Kurbanov + */ + +#include +#include + +/** + * spinand_otp_size() - Get SPI-NAND OTP area size + * @spinand: the spinand device + * + * Return: the OTP size. + */ +size_t spinand_otp_size(struct spinand_device *spinand) +{ + struct nand_device *nand =3D spinand_to_nand(spinand); + size_t otp_pagesize =3D nanddev_page_size(nand) + + nanddev_per_page_oobsize(nand); + + return spinand->otp->layout.npages * otp_pagesize; +} + +static int spinand_otp_check_bounds(struct spinand_device *spinand, loff_t= ofs, + size_t len) +{ + if (ofs < 0 || ofs + len > spinand_otp_size(spinand)) + return -EINVAL; + + return 0; +} + +static int spinand_mtd_otp_info(struct mtd_info *mtd, size_t len, + size_t *retlen, struct otp_info *buf) +{ + struct spinand_device *spinand =3D mtd_to_spinand(mtd); + const struct spinand_otp_ops *ops =3D spinand->otp->ops; + int ret; + + *retlen =3D 0; + + mutex_lock(&spinand->lock); + ret =3D ops->info(spinand, len, buf, retlen); + mutex_unlock(&spinand->lock); + + return ret; +} + +static int spinand_mtd_otp_read(struct mtd_info *mtd, loff_t ofs, size_t l= en, + size_t *retlen, u8 *buf) +{ + struct spinand_device *spinand =3D mtd_to_spinand(mtd); + const struct spinand_otp_ops *ops =3D spinand->otp->ops; + int ret; + + *retlen =3D 0; + + if (!len) + return 0; + + ret =3D spinand_otp_check_bounds(spinand, ofs, len); + if (ret) + return ret; + + mutex_lock(&spinand->lock); + ret =3D ops->read(spinand, ofs, len, retlen, buf); + mutex_unlock(&spinand->lock); + + return ret; +} + +static int spinand_mtd_otp_write(struct mtd_info *mtd, loff_t ofs, size_t = len, + size_t *retlen, const u8 *buf) +{ + struct spinand_device *spinand =3D mtd_to_spinand(mtd); + const struct spinand_otp_ops *ops =3D spinand->otp->ops; + int ret; + + *retlen =3D 0; + + if (!len) + return 0; + + ret =3D spinand_otp_check_bounds(spinand, ofs, len); + if (ret) + return ret; + + mutex_lock(&spinand->lock); + ret =3D ops->write(spinand, ofs, len, retlen, buf); + mutex_unlock(&spinand->lock); + + return ret; +} + +static int spinand_mtd_otp_erase(struct mtd_info *mtd, loff_t ofs, size_t = len) +{ + struct spinand_device *spinand =3D mtd_to_spinand(mtd); + const struct spinand_otp_ops *ops =3D spinand->otp->ops; + int ret; + + if (!len) + return 0; + + ret =3D spinand_otp_check_bounds(spinand, ofs, len); + if (ret) + return ret; + + mutex_lock(&spinand->lock); + ret =3D ops->erase(spinand, ofs, len); + mutex_unlock(&spinand->lock); + + return ret; +} + +static int spinand_mtd_otp_lock(struct mtd_info *mtd, loff_t ofs, size_t l= en) +{ + struct spinand_device *spinand =3D mtd_to_spinand(mtd); + const struct spinand_otp_ops *ops =3D spinand->otp->ops; + int ret; + + if (!len) + return 0; + + ret =3D spinand_otp_check_bounds(spinand, ofs, len); + if (ret) + return ret; + + mutex_lock(&spinand->lock); + ret =3D ops->lock(spinand, ofs, len); + mutex_unlock(&spinand->lock); + + return ret; +} + +/** + * spinand_set_mtd_otp_ops() - Setup OTP methods + * @spinand: the spinand device + * + * Setup OTP methods. + * + * Return: 0 on success, a negative error code otherwise. + */ +int spinand_set_mtd_otp_ops(struct spinand_device *spinand) +{ + struct mtd_info *mtd =3D spinand_to_mtd(spinand); + const struct spinand_otp_ops *ops =3D spinand->otp->ops; + + if (!ops) + return -EINVAL; + + if (ops->info) + mtd->_get_user_prot_info =3D spinand_mtd_otp_info; + + if (ops->read) + mtd->_read_user_prot_reg =3D spinand_mtd_otp_read; + + if (ops->write) + mtd->_write_user_prot_reg =3D spinand_mtd_otp_write; + + if (ops->lock) + mtd->_lock_user_prot_reg =3D spinand_mtd_otp_lock; + + if (ops->erase) + mtd->_erase_user_prot_reg =3D spinand_mtd_otp_erase; + + return 0; +} diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index 555846517faf6..a9ad286de2902 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -322,6 +322,43 @@ struct spinand_ondie_ecc_conf { u8 status; }; =20 +/** + * struct spinand_otp_layout - structure to describe the SPI NAND OTP area + * @npages: number of pages in the OTP + */ +struct spinand_otp_layout { + unsigned int npages; +}; + +/** + * struct spinand_otp_ops - SPI NAND OTP methods + * @info: get the OTP area information + * @lock: lock an OTP region + * @erase: erase an OTP region + * @read: read from the SPI NAND OTP area + * @write: write to the SPI NAND OTP area + */ +struct spinand_otp_ops { + int (*info)(struct spinand_device *spinand, size_t len, + struct otp_info *buf, size_t *retlen); + int (*lock)(struct spinand_device *spinand, loff_t from, size_t len); + int (*erase)(struct spinand_device *spinand, loff_t from, size_t len); + int (*read)(struct spinand_device *spinand, loff_t from, size_t len, + size_t *retlen, u8 *buf); + int (*write)(struct spinand_device *spinand, loff_t from, size_t len, + size_t *retlen, const u8 *buf); +}; + +/** + * struct spinand_otp - SPI NAND OTP grouping structure + * @layout: OTP region layout + * @ops: OTP access ops + */ +struct spinand_otp { + const struct spinand_otp_layout layout; + const struct spinand_otp_ops *ops; +}; + /** * struct spinand_info - Structure used to describe SPI NAND chips * @model: model name @@ -354,6 +391,7 @@ struct spinand_info { } op_variants; int (*select_target)(struct spinand_device *spinand, unsigned int target); + struct spinand_otp otp; }; =20 #define SPINAND_ID(__method, ...) \ @@ -379,6 +417,14 @@ struct spinand_info { #define SPINAND_SELECT_TARGET(__func) \ .select_target =3D __func, =20 +#define SPINAND_OTP_INFO(__npages, __ops) \ + .otp =3D { \ + .layout =3D { \ + .npages =3D __npages, \ + }, \ + .ops =3D __ops, \ + } + #define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants, \ __flags, ...) \ { \ @@ -422,6 +468,7 @@ struct spinand_dirmap { * passed in spi_mem_op be DMA-able, so we can't based the bufs on * the stack * @manufacturer: SPI NAND manufacturer information + * @otp: SPI NAND OTP info. * @priv: manufacturer private data */ struct spinand_device { @@ -450,6 +497,7 @@ struct spinand_device { u8 *oobbuf; u8 *scratchbuf; const struct spinand_manufacturer *manufacturer; + const struct spinand_otp *otp; void *priv; }; =20 @@ -525,4 +573,8 @@ int spinand_read_page(struct spinand_device *spinand, int spinand_write_page(struct spinand_device *spinand, const struct nand_page_io_req *req); =20 +size_t spinand_otp_size(struct spinand_device *spinand); + +int spinand_set_mtd_otp_ops(struct spinand_device *spinand); + #endif /* __LINUX_MTD_SPINAND_H */ --=20 2.43.0