From nobody Sun Feb 8 18:39:15 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C551238B for ; Wed, 25 Dec 2024 00:32:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735086746; cv=none; b=YEWzPSCjM0DjB42pUSpfcEvrRNg3fgARoMxIkONaATqIfX3f0tQKdFVut7oECXHF5deOJ714B+apwgbOdcs5EHnz89IwapWoYdM/FfdRTTP1ah4qCGD3XXxmIwm6DjZT01+DfGE5Enqkejnbq4i0b7DYbThrq3rOnWHrcQ0sXSc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735086746; c=relaxed/simple; bh=t0jcLCRObhzVLRqGLP0uU+0CslfOS8tNFOIebwMIGIs=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=TrrZfgb9Hz9SPUTsSWebx3rulW7i2d4ZxhmaB7oQcEsiy3c1WPugW9X4stA/yR+oDlulMaNKCK71ddTe41EM6uNA9PtLCaSN21ssgaK/PWXji4K5Rd0iv3IfeB2YnBUg/s898M34BV9obyNqedL+JkGUMq5eankmHa/rj/7Wqvo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Wed, 25 Dec 2024 08:32:15 +0800 Received: from twmbx02.aspeed.com (192.168.10.10) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Wed, 25 Dec 2024 08:32:15 +0800 From: Jammy Huang To: , , , , , , CC: , Subject: [PATCH v3] drm/ast: Support timings, 1280x720/1280x960/1600x900 Date: Wed, 25 Dec 2024 08:32:15 +0800 Message-ID: <20241225003215.1343996-1-jammy_huang@aspeedtech.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In this patch, 3 new timings are added into support list. If you want to have new timings, 1280x720 and 1280x960 on DisplayPort, your dp-fw should be newer than version, 20240502. Signed-off-by: Jammy Huang --- v2: - Fix build errors. v3: - Fix typo. --- drivers/gpu/drm/ast/ast_dp.c | 9 ++++++++- drivers/gpu/drm/ast/ast_drv.h | 3 +++ drivers/gpu/drm/ast/ast_mode.c | 14 ++++++++++++++ drivers/gpu/drm/ast/ast_tables.h | 18 ++++++++++++++++++ 4 files changed, 43 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/ast/ast_dp.c b/drivers/gpu/drm/ast/ast_dp.c index 0e282b7b167c..0b56f0335871 100644 --- a/drivers/gpu/drm/ast/ast_dp.c +++ b/drivers/gpu/drm/ast/ast_dp.c @@ -255,6 +255,10 @@ static void ast_dp_set_mode(struct drm_crtc *crtc, str= uct ast_vbios_mode_info *v case 1280: if (crtc->mode.crtc_vdisplay =3D=3D 800) ModeIdx =3D (ASTDP_1280x800_60_RB - (u8) ulRefreshRateIndex); + else if (crtc->mode.crtc_vdisplay =3D=3D 720) + ModeIdx =3D ASTDP_1280x720_60; + else if (crtc->mode.crtc_vdisplay =3D=3D 960) + ModeIdx =3D ASTDP_1280x960_60; else // 1024 ModeIdx =3D (ASTDP_1280x1024_60 + (u8) ulRefreshRateIndex); break; @@ -267,7 +271,10 @@ static void ast_dp_set_mode(struct drm_crtc *crtc, str= uct ast_vbios_mode_info *v break; case 1600: if (crtc->mode.crtc_vdisplay =3D=3D 900) - ModeIdx =3D (ASTDP_1600x900_60_RB - (u8) ulRefreshRateIndex); + if (ulRefreshRateIndex =3D=3D 2) + ModeIdx =3D ASTDP_1600x900_60_DMT; + else + ModeIdx =3D (ASTDP_1600x900_60_RB - (u8) ulRefreshRateIndex); else //1200 ModeIdx =3D ASTDP_1600x1200_60; break; diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h index 21ce3769bf0d..e7cef334b3ec 100644 --- a/drivers/gpu/drm/ast/ast_drv.h +++ b/drivers/gpu/drm/ast/ast_drv.h @@ -442,6 +442,9 @@ int ast_mode_config_init(struct ast_device *ast); #define ASTDP_1600x900_60_RB 0x1D #define ASTDP_1366x768_60 0x1E #define ASTDP_1152x864_75 0x1F +#define ASTDP_1600x900_60_DMT 0x51 +#define ASTDP_1280x720_60 0x52 +#define ASTDP_1280x960_60 0x53 =20 int ast_mm_init(struct ast_device *ast); =20 diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c index 9d5321c81e68..48d1065846a2 100644 --- a/drivers/gpu/drm/ast/ast_mode.c +++ b/drivers/gpu/drm/ast/ast_mode.c @@ -147,6 +147,10 @@ static bool ast_get_vbios_mode_info(const struct drm_f= ormat_info *format, case 1280: if (mode->crtc_vdisplay =3D=3D 800) vbios_mode->enh_table =3D &res_1280x800[refresh_rate_index]; + else if (mode->crtc_vdisplay =3D=3D 720) + vbios_mode->enh_table =3D &res_1280x720[refresh_rate_index]; + else if (mode->crtc_vdisplay =3D=3D 960) + vbios_mode->enh_table =3D &res_1280x960[refresh_rate_index]; else vbios_mode->enh_table =3D &res_1280x1024[refresh_rate_index]; break; @@ -475,6 +479,12 @@ static void ast_set_dclk_reg(struct ast_device *ast, ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xbb, 0x0f, (clk_info->param3 & 0xc0) | ((clk_info->param3 & 0x3) << 4)); + + /* Set SEQ; Half dclk for this timing */ + if (vbios_mode->enh_table->flags & HalfDCLK) + ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xff, 0x08); + else + ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xf7, 0x00); } =20 static void ast_set_color_reg(struct ast_device *ast, @@ -1027,8 +1037,12 @@ ast_crtc_helper_mode_valid(struct drm_crtc *crtc, co= nst struct drm_display_mode if (ast->support_wide_screen) { if ((mode->hdisplay =3D=3D 1680) && (mode->vdisplay =3D=3D 1050)) return MODE_OK; + if ((mode->hdisplay =3D=3D 1280) && (mode->vdisplay =3D=3D 960)) + return MODE_OK; if ((mode->hdisplay =3D=3D 1280) && (mode->vdisplay =3D=3D 800)) return MODE_OK; + if ((mode->hdisplay =3D=3D 1280) && (mode->vdisplay =3D=3D 720)) + return MODE_OK; if ((mode->hdisplay =3D=3D 1440) && (mode->vdisplay =3D=3D 900)) return MODE_OK; if ((mode->hdisplay =3D=3D 1360) && (mode->vdisplay =3D=3D 768)) diff --git a/drivers/gpu/drm/ast/ast_tables.h b/drivers/gpu/drm/ast/ast_tab= les.h index 0378c9bc079b..329d6bac867b 100644 --- a/drivers/gpu/drm/ast/ast_tables.h +++ b/drivers/gpu/drm/ast/ast_tables.h @@ -254,6 +254,13 @@ static const struct ast_vbios_enhtable res_1024x768[] = =3D { (SyncPP | Charx8Dot), 0xFF, 4, 0x31 }, }; =20 +static const struct ast_vbios_enhtable res_1280x960[] =3D { + {1800, 1280, 96, 112, 1000, 960, 1, 3, VCLK108, /* 60Hz */ + (SyncPP | Charx8Dot), 60, 1, 0x3E }, + {1800, 1280, 96, 112, 1000, 960, 1, 3, VCLK108, /* end */ + (SyncPP | Charx8Dot), 0xFF, 1, 0x3E }, +}; + static const struct ast_vbios_enhtable res_1280x1024[] =3D { {1688, 1280, 48, 112, 1066, 1024, 1, 3, VCLK108, /* 60Hz */ (SyncPP | Charx8Dot), 60, 1, 0x32 }, @@ -280,6 +287,15 @@ static const struct ast_vbios_enhtable res_1152x864[] = =3D { }; =20 /* 16:9 */ +static const struct ast_vbios_enhtable res_1280x720[] =3D { + {1650, 1280, 110, 40, 750, 720, 5, 5, VCLK148_5, /* 60Hz */ + (SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | + HalfDCLK), 60, 1, 0x3D }, + {1650, 1280, 110, 40, 750, 720, 5, 5, VCLK148_5, /* end */ + (SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo | + HalfDCLK), 0xFF, 1, 0x3D }, +}; + static const struct ast_vbios_enhtable res_1360x768[] =3D { {1792, 1360, 64, 112, 795, 768, 3, 6, VCLK85_5, /* 60Hz */ (SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60= , 1, 0x39 }, @@ -294,6 +310,8 @@ static const struct ast_vbios_enhtable res_1600x900[] = =3D { AST2500PreCatchCRT), 60, 1, 0x3A }, {2112, 1600, 88, 168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */ (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60= , 2, 0x3A }, + {1800, 1600, 24, 80, 1000, 900, 1, 3, VCLK108, /* 60Hz DMT */ + (SyncPP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60= , 3, 0x3A }, {2112, 1600, 88, 168, 934, 900, 3, 5, VCLK118_25, /* 60Hz CVT */ (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0x= FF, 2, 0x3A }, }; base-commit: 4bbf9020becbfd8fc2c3da790855b7042fad455b --=20 2.25.1