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Fri, 20 Dec 2024 00:39:56 -0800 (PST) Received: from hsinchu26.internal.sifive.com ([210.176.154.34]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6dd181d528csm14617866d6.112.2024.12.20.00.39.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Dec 2024 00:39:55 -0800 (PST) From: Yong-Xuan Wang To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: greentime.hu@sifive.com, vincent.chen@sifive.com, AndybnAC@gmail.com, andybnac@gmail.com, zong.li@sifive.com, Yong-Xuan Wang , Paul Walmsley , Palmer Dabbelt , Albert Ou , Haibo Xu , Conor Dooley , Usama Arif , Hanjun Guo , Samuel Holland , Alexandre Ghiti , Heiko Stuebner , =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= Subject: [PATCH v2 2/2] riscv: signal: fix signal_minsigstksz Date: Fri, 20 Dec 2024 16:39:24 +0800 Message-Id: <20241220083926.19453-3-yongxuan.wang@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20241220083926.19453-1-yongxuan.wang@sifive.com> References: <20241220083926.19453-1-yongxuan.wang@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The init_rt_signal_env() funciton is called before the alternative patch is applied, so using the alternative-related API to check the availability of an extension within this function doesn't have the intended effect. This patch reorders the init_rt_signal_env() and apply_boot_alternatives() to get the correct signal_minsigstksz. Fixes: e92f469b0771 ("riscv: signal: Report signal frame size to userspace = via auxv") Signed-off-by: Yong-Xuan Wang Reviewed-by: Zong Li Reviewed-by: Alexandre Ghiti Reviewed-by: Andy Chiu --- arch/riscv/kernel/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index 016b48fcd6f2..b7c91f546453 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -324,8 +324,8 @@ void __init setup_arch(char **cmdline_p) =20 riscv_init_cbo_blocksizes(); riscv_fill_hwcap(); - init_rt_signal_env(); apply_boot_alternatives(); + init_rt_signal_env(); =20 if (IS_ENABLED(CONFIG_RISCV_ISA_ZICBOM) && riscv_isa_extension_available(NULL, ZICBOM)) --=20 2.17.1