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Thu, 19 Dec 2024 12:03:44 -0800 (PST) From: Markus Schneider-Pargmann Date: Thu, 19 Dec 2024 21:02:12 +0100 Subject: [PATCH v4 1/4] firmware: ti_sci: Support transfers without response Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241219-topic-am62-partialio-v6-12-b4-v4-1-1cb8eabd407e@baylibre.com> References: <20241219-topic-am62-partialio-v6-12-b4-v4-0-1cb8eabd407e@baylibre.com> In-Reply-To: <20241219-topic-am62-partialio-v6-12-b4-v4-0-1cb8eabd407e@baylibre.com> To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Anand Gadiyar Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Vishal Mahaveer , Kevin Hilman , Dhruva Gole , Markus Schneider-Pargmann X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1782; i=msp@baylibre.com; h=from:subject:message-id; bh=r5ZUm8egrlEYPDoShASduxwkqRTGU1fuNRSx+4vY6C0=; b=owGbwMvMwCGm0rPl0RXRdfaMp9WSGNJTarj39TIrHVuh58/m8JBRxrr1qJ5uREmCxJxbSsaiq ZwXu7Z0lLIwiHEwyIopstz9sPBdndz1BRHrHjnCzGFlAhnCwMUpABP5tJ6RYZPROX8WkaCDr54v ar7xNHraOY+HXUInGqX2H0xJm9e4Upfhn+otye2fkkWaw2PnSnS2aloe7Hv+uyqESeRU+tFuzap 8BgA= X-Developer-Key: i=msp@baylibre.com; a=openpgp; fpr=BADD88DB889FDC3E8A3D5FE612FA6A01E0A45B41 Check the header flags if an response is expected or not. If it is not expected skip the receive part of ti_sci_do_xfer(). This prepares the driver for one-way messages as prepare_sleep for Partial-IO. Signed-off-by: Markus Schneider-Pargmann --- drivers/firmware/ti_sci.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c index 806a975fff22ae00ecb88587b2c47ba172120bc2..ec0c54935ac0d667323d98b86ac= 9d288b73be6aa 100644 --- a/drivers/firmware/ti_sci.c +++ b/drivers/firmware/ti_sci.c @@ -398,10 +398,13 @@ static void ti_sci_put_one_xfer(struct ti_sci_xfers_i= nfo *minfo, static inline int ti_sci_do_xfer(struct ti_sci_info *info, struct ti_sci_xfer *xfer) { + struct ti_sci_msg_hdr *hdr =3D (struct ti_sci_msg_hdr *)xfer->tx_message.= buf; int ret; int timeout; struct device *dev =3D info->dev; bool done_state =3D true; + bool response_expected =3D !!(hdr->flags & (TI_SCI_FLAG_REQ_ACK_ON_PROCES= SED | + TI_SCI_FLAG_REQ_ACK_ON_RECEIVED)); =20 ret =3D mbox_send_message(info->chan_tx, &xfer->tx_message); if (ret < 0) @@ -409,6 +412,9 @@ static inline int ti_sci_do_xfer(struct ti_sci_info *in= fo, =20 ret =3D 0; =20 + if (!response_expected) + goto no_response; + if (system_state <=3D SYSTEM_RUNNING) { /* And we wait for the response. */ timeout =3D msecs_to_jiffies(info->desc->max_rx_timeout_ms); @@ -429,6 +435,7 @@ static inline int ti_sci_do_xfer(struct ti_sci_info *in= fo, dev_err(dev, "Mbox timedout in resp(caller: %pS)\n", (void *)_RET_IP_); =20 +no_response: /* * NOTE: we might prefer not to need the mailbox ticker to manage the * transfer queueing since the protocol layer queues things by itself. --=20 2.45.2 From nobody Mon Feb 9 01:00:57 2026 Received: from mail-ej1-f47.google.com (mail-ej1-f47.google.com [209.85.218.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3D4B1DC987 for ; Thu, 19 Dec 2024 20:03:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734638630; cv=none; b=tFj6dD0OZd+r6MfFBlzVWbQz8Jlkt8YBG2DF2q3exIsCFi2B+oaAybo3FzE99hrGxzeXbbNgArKsv5Ieql4Qmxn4IYRcrA0goZ7JRy9Wnt3KyzkSFZwNGHNta6KwSJ9/NRibnYG3MzUzRhg1fVk6IKggfqwfd5x+TEzgd04WIjM= ARC-Message-Signature: i=1; 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Thu, 19 Dec 2024 12:03:46 -0800 (PST) Received: from localhost ([2001:4090:a244:82f5:6854:cb:184:5d19]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aac0f066130sm98016366b.183.2024.12.19.12.03.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 12:03:45 -0800 (PST) From: Markus Schneider-Pargmann Date: Thu, 19 Dec 2024 21:02:13 +0100 Subject: [PATCH v4 2/4] firmware: ti_sci: Partial-IO support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241219-topic-am62-partialio-v6-12-b4-v4-2-1cb8eabd407e@baylibre.com> References: <20241219-topic-am62-partialio-v6-12-b4-v4-0-1cb8eabd407e@baylibre.com> In-Reply-To: <20241219-topic-am62-partialio-v6-12-b4-v4-0-1cb8eabd407e@baylibre.com> To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Anand Gadiyar Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Vishal Mahaveer , Kevin Hilman , Dhruva Gole , Markus Schneider-Pargmann X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6234; i=msp@baylibre.com; h=from:subject:message-id; bh=rrxkM9wENQkQ5BRvp3GV3Fgk68SnQpzcLBWyU5asn80=; b=owGbwMvMwCGm0rPl0RXRdfaMp9WSGNJTavhLGkUXvH4w9/vuA289jCQ/sJ2Szn3/On7dpYsBP kVvqmfLdZSyMIhxMMiKKbLc/bDwXZ3c9QUR6x45wsxhZQIZwsDFKQATOTeB4b/D7DXBOyd2G66e lTqxX/OJ36E96avWPr6x1P2PuMkULt3nDP+Uvuq99HbiuvmpKHCn8kOe038VGSSETe6edjm+Skx hzhpOAA== X-Developer-Key: i=msp@baylibre.com; a=openpgp; fpr=BADD88DB889FDC3E8A3D5FE612FA6A01E0A45B41 Add support for Partial-IO poweroff. In Partial-IO pins of a few hardware units can generate system wakeups while DDR memory is not powered resulting in a fresh boot of the system. These hardware units in the SoC are always powered so that some logic can detect pin activity. If the system supports Partial-IO as described in the fw capabilities, a sys_off handler is added. This sys_off handler decides if the poweroff is executed by entering normal poweroff or Partial-IO instead. The decision is made by checking if wakeup is enabled on all devices that may wake up the SoC from Partial-IO. The possible wakeup devices are found by checking which devices have the "poweroff" in the list of wakeup-source power states. Only devices that are actually enabled by the user will be considered as an active wakeup source. If none of the wakeup sources is enabled the system will do a normal poweroff. If at least one wakeup source is enabled it will instead send a TI_SCI_MSG_PREPARE_SLEEP message from the sys_off handler. Sending this message will result in an immediate shutdown of the system. No execution is expected after this point. The code will wait for 5s and do an emergency_restart afterwards if Partial-IO wasn't entered at that point. A short documentation about Partial-IO can be found in section 6.2.4.5 of the TRM at https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Markus Schneider-Pargmann --- drivers/firmware/ti_sci.c | 115 ++++++++++++++++++++++++++++++++++++++++++= +++- drivers/firmware/ti_sci.h | 5 ++ 2 files changed, 119 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c index ec0c54935ac0d667323d98b86ac9d288b73be6aa..693ac816f8ba3941a9156bd3952= 4099ca476d712 100644 --- a/drivers/firmware/ti_sci.c +++ b/drivers/firmware/ti_sci.c @@ -3746,6 +3746,100 @@ static const struct dev_pm_ops ti_sci_pm_ops =3D { #endif }; =20 +/* + * Enter Partial-IO, which disables everything including DDR with only a s= mall + * logic being active for wakeup. + */ +static int tisci_enter_partial_io(struct ti_sci_info *info) +{ + struct ti_sci_msg_req_prepare_sleep *req; + struct ti_sci_xfer *xfer; + struct device *dev =3D info->dev; + int ret =3D 0; + + xfer =3D ti_sci_get_one_xfer(info, TI_SCI_MSG_PREPARE_SLEEP, + TI_SCI_FLAG_REQ_GENERIC_NORESPONSE, + sizeof(*req), sizeof(struct ti_sci_msg_hdr)); + if (IS_ERR(xfer)) { + ret =3D PTR_ERR(xfer); + dev_err(dev, "Message alloc failed(%d)\n", ret); + return ret; + } + + req =3D (struct ti_sci_msg_req_prepare_sleep *)xfer->xfer_buf; + req->mode =3D TISCI_MSG_VALUE_SLEEP_MODE_PARTIAL_IO; + req->ctx_lo =3D 0; + req->ctx_hi =3D 0; + req->debug_flags =3D 0; + + dev_info(dev, "Entering Partial-IO because a powered wakeup-enabled devic= e was found.\n"); + + ret =3D ti_sci_do_xfer(info, xfer); + if (ret) { + dev_err(dev, "Mbox send fail %d\n", ret); + goto fail; + } + +fail: + ti_sci_put_one_xfer(&info->minfo, xfer); + + return ret; +} + +static bool tisci_canuart_wakeup_enabled(struct ti_sci_info *info) +{ + struct device_node *wakeup_node =3D NULL; + + for (wakeup_node =3D of_find_node_with_property(NULL, "wakeup-source"); + wakeup_node; + wakeup_node =3D of_find_node_with_property(wakeup_node, "wakeup-sour= ce")) { + struct platform_device *pdev; + int index; + + index =3D of_property_match_string(wakeup_node, "wakeup-source", "powero= ff"); + if (index < 0) + continue; + + pdev =3D of_find_device_by_node(wakeup_node); + if (!pdev) + break; + + if (device_may_wakeup(&pdev->dev)) { + dev_dbg(info->dev, "%pOF identified as wakeup source for Partial-IO\n", + wakeup_node); + put_device(&pdev->dev); + of_node_put(wakeup_node); + return true; + } + } + + return false; +} + +static int tisci_sys_off_handler(struct sys_off_data *data) +{ + struct ti_sci_info *info =3D data->cb_data; + bool enter_partial_io =3D tisci_canuart_wakeup_enabled(info); + int ret; + + if (!enter_partial_io) + return NOTIFY_DONE; + + ret =3D tisci_enter_partial_io(info); + + if (ret) { + dev_err(info->dev, + "Failed to enter Partial-IO %pe, trying to do an emergency restart\n", + ERR_PTR(ret)); + emergency_restart(); + } + + mdelay(5000); + emergency_restart(); + + return NOTIFY_DONE; +} + /* Description for K2G */ static const struct ti_sci_desc ti_sci_pmmc_k2g_desc =3D { .default_host_id =3D 2, @@ -3889,6 +3983,19 @@ static int ti_sci_probe(struct platform_device *pdev) goto out; } =20 + if (info->fw_caps & MSG_FLAG_CAPS_LPM_PARTIAL_IO) { + ret =3D devm_register_sys_off_handler(dev, + SYS_OFF_MODE_POWER_OFF, + SYS_OFF_PRIO_FIRMWARE, + tisci_sys_off_handler, + info); + if (ret) { + dev_err(dev, "Failed to register sys_off_handler %pe\n", + ERR_PTR(ret)); + goto out; + } + } + dev_info(dev, "ABI: %d.%d (firmware rev 0x%04x '%s')\n", info->handle.version.abi_major, info->handle.version.abi_minor, info->handle.version.firmware_revision, @@ -3898,7 +4005,13 @@ static int ti_sci_probe(struct platform_device *pdev) list_add_tail(&info->node, &ti_sci_list); mutex_unlock(&ti_sci_list_mutex); =20 - return of_platform_populate(dev->of_node, NULL, NULL, dev); + ret =3D of_platform_populate(dev->of_node, NULL, NULL, dev); + if (ret) { + dev_err(dev, "platform_populate failed %pe\n", ERR_PTR(ret)); + goto out; + } + return 0; + out: if (!IS_ERR(info->chan_tx)) mbox_free_channel(info->chan_tx); diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h index 053387d7baa064498e6a208daa7f70040ef87281..dec9e20cbe5da8f6d9393d56bb9= a1e73cb083a42 100644 --- a/drivers/firmware/ti_sci.h +++ b/drivers/firmware/ti_sci.h @@ -592,6 +592,11 @@ struct ti_sci_msg_resp_get_clock_freq { struct ti_sci_msg_req_prepare_sleep { struct ti_sci_msg_hdr hdr; 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Thu, 19 Dec 2024 12:03:47 -0800 (PST) Received: from localhost ([2001:4090:a244:82f5:6854:cb:184:5d19]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aac0e830ae6sm99991566b.22.2024.12.19.12.03.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 12:03:46 -0800 (PST) From: Markus Schneider-Pargmann Date: Thu, 19 Dec 2024 21:02:14 +0100 Subject: [PATCH v4 3/4] arm64: dts: ti: k3-pinctrl: Add WKUP_EN flag Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241219-topic-am62-partialio-v6-12-b4-v4-3-1cb8eabd407e@baylibre.com> References: <20241219-topic-am62-partialio-v6-12-b4-v4-0-1cb8eabd407e@baylibre.com> In-Reply-To: <20241219-topic-am62-partialio-v6-12-b4-v4-0-1cb8eabd407e@baylibre.com> To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Anand Gadiyar Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Vishal Mahaveer , Kevin Hilman , Dhruva Gole , Markus Schneider-Pargmann X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1051; i=msp@baylibre.com; h=from:subject:message-id; bh=raNMV7XctJIbSEmg1aR+IsRod9wfbi2q0jEtotc1h3A=; b=owGbwMvMwCGm0rPl0RXRdfaMp9WSGNJTakRWuOsJ1L8p1NALuSEx9UrfAfFqxypZpe5/mybfe H/3tVpVRykLgxgHg6yYIsvdDwvf1cldXxCx7pEjzBxWJpAhDFycAjCRJx8ZGZ4Lvit/aTfVSXaL VsTXWYmMm7yWfTJzz9u4c8fr0kU90q8Z/ucWZ+evvDdrgfvTgAOrgmccv9IhqL1uqa/1R4ak+wn RqWwA X-Developer-Key: i=msp@baylibre.com; a=openpgp; fpr=BADD88DB889FDC3E8A3D5FE612FA6A01E0A45B41 WKUP_EN is a flag to enable pin wakeup. Any activity will wakeup the SoC in that case. Signed-off-by: Markus Schneider-Pargmann --- arch/arm64/boot/dts/ti/k3-pinctrl.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k= 3-pinctrl.h index 22b8d73cfd3264735ddf91874e60a0c5fc7ade5b..dd4d53e8420a1d671e04a70d4af= 8b0ea1b75b2b2 100644 --- a/arch/arm64/boot/dts/ti/k3-pinctrl.h +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h @@ -12,6 +12,7 @@ #define PULLTYPESEL_SHIFT (17) #define RXACTIVE_SHIFT (18) #define DEBOUNCE_SHIFT (11) +#define WKUP_EN_SHIFT (29) =20 #define PULL_DISABLE (1 << PULLUDEN_SHIFT) #define PULL_ENABLE (0 << PULLUDEN_SHIFT) @@ -38,6 +39,8 @@ #define PIN_DEBOUNCE_CONF5 (5 << DEBOUNCE_SHIFT) #define PIN_DEBOUNCE_CONF6 (6 << DEBOUNCE_SHIFT) =20 +#define WKUP_EN (1 << WKUP_EN_SHIFT) + /* Default mux configuration for gpio-ranges to use with pinctrl */ #define PIN_GPIO_RANGE_IOPAD (PIN_INPUT | 7) =20 --=20 2.45.2 From nobody Mon Feb 9 01:00:57 2026 Received: from mail-ej1-f49.google.com (mail-ej1-f49.google.com [209.85.218.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D01A21F1920 for ; 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Thu, 19 Dec 2024 12:03:48 -0800 (PST) Received: from localhost ([2001:4090:a244:82f5:6854:cb:184:5d19]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aac0f011f87sm98415366b.142.2024.12.19.12.03.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Dec 2024 12:03:48 -0800 (PST) From: Markus Schneider-Pargmann Date: Thu, 19 Dec 2024 21:02:15 +0100 Subject: [PATCH v4 4/4] arm64: dts: ti: am62-lp-sk: Add wakeup mcu_mcan0/1 pinctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241219-topic-am62-partialio-v6-12-b4-v4-4-1cb8eabd407e@baylibre.com> References: <20241219-topic-am62-partialio-v6-12-b4-v4-0-1cb8eabd407e@baylibre.com> In-Reply-To: <20241219-topic-am62-partialio-v6-12-b4-v4-0-1cb8eabd407e@baylibre.com> To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Anand Gadiyar Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Vishal Mahaveer , Kevin Hilman , Dhruva Gole , Markus Schneider-Pargmann X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2255; i=msp@baylibre.com; h=from:subject:message-id; bh=IOefNd31nyYbDmidXJO9wxo5hzXqvpD8mI8ntPvadk0=; b=owGbwMvMwCGm0rPl0RXRdfaMp9WSGNJTaiTq6r7J5Zyv2RT7eklD9UodC2fLU5s+uYeHt1SnP 9PUn87cUcrCIMbBICumyHL3w8J3dXLXF0Sse+QIM4eVCWQIAxenAEykn4GRYedvBcGnond2OHxo eJH+Oyfg9YPrq2X+MP90NW7zP1Mw6zzD/yILA+GjCyQ+1Rc+V3g8y+/aMydGsXqHw3u1I+7xTFn yngkA X-Developer-Key: i=msp@baylibre.com; a=openpgp; fpr=BADD88DB889FDC3E8A3D5FE612FA6A01E0A45B41 Add pincontrol definitions for mcu_mcan0 and mcu_mcan1 for wakeup from Partial-IO. Add these as wakeup pinctrl entries for both devices. Signed-off-by: Markus Schneider-Pargmann --- arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts | 52 ++++++++++++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts b/arch/arm64/boot/dts= /ti/k3-am62-lp-sk.dts index 8e9fc00a6b3c7459a360f9e1d6bbb60e68c460ab..22695715239644b1bfe209ba4f1= c42fae4c59f70 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk.dts @@ -232,3 +232,55 @@ &tlv320aic3106 { &gpmc0 { ranges =3D <0 0 0x00 0x51000000 0x01000000>; /* CS0 space. Min partition = =3D 16MB */ }; + +&mcu_mcan0 { + pinctrl-names =3D "default", "wakeup"; + pinctrl-0 =3D <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_default>; + pinctrl-1 =3D <&mcu_mcan0_tx_pins_default>, <&mcu_mcan0_rx_pins_wakeup>; + status =3D "okay"; +}; + +&mcu_mcan1 { + pinctrl-names =3D "default", "wakeup"; + pinctrl-0 =3D <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_default>; + pinctrl-1 =3D <&mcu_mcan1_tx_pins_default>, <&mcu_mcan1_rx_pins_wakeup>; + status =3D "okay"; +}; + +&mcu_pmx0 { + mcu_mcan0_tx_pins_default: mcu-mcan0-tx-default-pins { + pinctrl-single,pins =3D < + AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ + >; + }; + + mcu_mcan0_rx_pins_default: mcu-mcan0-rx-default-pins { + pinctrl-single,pins =3D < + AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan0_rx_pins_wakeup: mcu-mcan0-rx-wakeup-pins { + pinctrl-single,pins =3D < + AM62X_IOPAD(0x038, PIN_INPUT | WKUP_EN, 0) /* (B3) MCU_MCAN0_RX */ + >; + }; + + mcu_mcan1_tx_pins_default: mcu-mcan1-tx-default-pins { + pinctrl-single,pins =3D < + AM62X_IOPAD(0x03c, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */ + >; + }; + + mcu_mcan1_rx_pins_default: mcu-mcan1-rx-default-pins { + pinctrl-single,pins =3D < + AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */ + >; + }; + + mcu_mcan1_rx_pins_wakeup: mcu-mcan1-rx-wakeup-pins { + pinctrl-single,pins =3D < + AM62X_IOPAD(0x040, PIN_INPUT | WKUP_EN, 0) /* (D4) MCU_MCAN1_RX */ + >; + }; +}; --=20 2.45.2