From nobody Sat Feb 7 05:01:27 2026 Received: from mail.fris.de (mail.fris.de [116.203.77.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A297189F2B for ; Wed, 18 Dec 2024 15:29:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.203.77.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734535798; cv=none; b=TXRuVfNywldC5Gtlt/vHlZKsRfz+aFdF5nezCRGqI2re2/Z8TN04sSsYUa2oAZMEaAU7+A6YPwjED/YMuuydEVXsbGKeCPNdHqTVzhtw3Lpd483HXuGf1JQlZYEO+//7bA6UbTLPaOg52hvAOP7nYepJR1lW0CArPdq2UlVTNEU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734535798; c=relaxed/simple; bh=tJ81igfhmGN1J4Y/DW8sHSjcY+1zkO3KPBz1T4Sk4cY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qom/duJAsUhbY4TJQx1hfQPHGtLU+kC1nQX49Zcm40dXnrslpMQzfjneEHna5wdFLMrS++StzypS2pSZRSb+G2kLGN0QptJNHCVCuk1r5CXDhCZ3c7Ex7ZI2jX+CthLxfnG9PNxHKK35b3UnZL7kDvBHaARptDZ+bvfzDOAwOzw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=fris.de; spf=pass smtp.mailfrom=fris.de; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b=ht14TP0J; arc=none smtp.client-ip=116.203.77.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=fris.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fris.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b="ht14TP0J" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 2A314BFB7D; Wed, 18 Dec 2024 16:29:53 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1734535793; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=siaclr4zkEMoTiPCVrQwCJy/mBig+w8wCm0lzo6tDAc=; b=ht14TP0JXeK9x3oZ4WhEa6p6ic7FJPjxdLY3e5DJ3E6iZNZlIW1zdlRZgkI111Ri1hOIs5 odxFZa/+4UrzRuNZQrFwtvYqNdeH4dTSYZgAkTvz/kecOa3BFN0lGQGXq+a1hqwu0RUbms +XcQle4BVi5i4Iv6kEwRAhhLk0jSnOxw6lelLKUNGSPI+ukpk4MwxwU66h6LmpDAAPbbuZ k7sE97avvFtraa/iMw8rkiUj4Iw4cT3cuHShmcpMrRIw/f+/wQq0pF6bwCcY2gOVPDSFHO 9UpzVgAvX4b9wXE8wPuJedNMyHE+Yp7t8i6c0Acco9DH4XL/W/iXpjJ25fx5Ew== From: Frieder Schrempf To: linux-arm-kernel@lists.infradead.org, Marek Vasut , Conor Dooley , Frieder Schrempf , Liam Girdwood , linux-kernel@vger.kernel.org, Mark Brown , Robin Gong Cc: Bo Liu , Frank Li , Joy Zou Subject: [PATCH v3 5/9] regulator: pca9450: Fix enable register for LDO5 Date: Wed, 18 Dec 2024 16:27:28 +0100 Message-ID: <20241218152842.97483-6-frieder@fris.de> In-Reply-To: <20241218152842.97483-1-frieder@fris.de> References: <20241218152842.97483-1-frieder@fris.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" From: Frieder Schrempf The LDO5 regulator has two configuration registers, but only LDO5CTRL_L contains the bits for enabling/disabling the regulator. Fixes: 0935ff5f1f0a ("regulator: pca9450: add pca9450 pmic driver") Signed-off-by: Frieder Schrempf Reviewed-by: Marek Vasut --- Changes for v3: * Rebase to next-20241218 Changes for v2: * none --- drivers/regulator/pca9450-regulator.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/pca9450-regulator.c b/drivers/regulator/pca9= 450-regulator.c index 4cf5fa73765b7..4519e725706cd 100644 --- a/drivers/regulator/pca9450-regulator.c +++ b/drivers/regulator/pca9450-regulator.c @@ -512,7 +512,7 @@ static const struct pca9450_regulator_desc pca9450a_reg= ulators[] =3D { .n_linear_ranges =3D ARRAY_SIZE(pca9450_ldo5_volts), .vsel_reg =3D PCA9450_REG_LDO5CTRL_H, .vsel_mask =3D LDO5HOUT_MASK, - .enable_reg =3D PCA9450_REG_LDO5CTRL_H, + .enable_reg =3D PCA9450_REG_LDO5CTRL_L, .enable_mask =3D LDO5H_EN_MASK, .owner =3D THIS_MODULE, }, @@ -726,7 +726,7 @@ static const struct pca9450_regulator_desc pca9450bc_re= gulators[] =3D { .n_linear_ranges =3D ARRAY_SIZE(pca9450_ldo5_volts), .vsel_reg =3D PCA9450_REG_LDO5CTRL_H, .vsel_mask =3D LDO5HOUT_MASK, - .enable_reg =3D PCA9450_REG_LDO5CTRL_H, + .enable_reg =3D PCA9450_REG_LDO5CTRL_L, .enable_mask =3D LDO5H_EN_MASK, .owner =3D THIS_MODULE, }, @@ -916,7 +916,7 @@ static const struct pca9450_regulator_desc pca9451a_reg= ulators[] =3D { .n_linear_ranges =3D ARRAY_SIZE(pca9450_ldo5_volts), .vsel_reg =3D PCA9450_REG_LDO5CTRL_H, .vsel_mask =3D LDO5HOUT_MASK, - .enable_reg =3D PCA9450_REG_LDO5CTRL_H, + .enable_reg =3D PCA9450_REG_LDO5CTRL_L, .enable_mask =3D LDO5H_EN_MASK, .owner =3D THIS_MODULE, }, --=20 2.47.1