From nobody Sat Feb 7 10:44:35 2026 Received: from mail.fris.de (mail.fris.de [116.203.77.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 59BF7481B3 for ; Wed, 18 Dec 2024 15:29:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.203.77.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734535796; cv=none; b=MipvoboswG+ZI8LMvAHdXpvrssk9tf+Cpyc0F+Z1Gnmkr30PVux6JhFFIBxaFySi+mvmmwbTMAdGR1bL5Y0q8vekCmNb2Urz0BJHQzhTEAlaolglbI6aMxzD/7CwAotC01zTKNb0a1lftlxe2vIK5CN6LvSgjpaGL98URtycYKE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734535796; c=relaxed/simple; bh=Va63iI8DFOzrZhycSJqFrgllsR+VVoVe+5B20uVJBSs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZYJUYc0dKEkUJXvN4mi1GBITWJ/JPnCKQsGNj/mmZceLsb1ep3maXRmi+OhJno/KwpusmD+aHxx97ANXaJr70o2JL0qmpugkEmo8CEot5Lh9z+bIXduZ1U61DjTM1l4yxEJZwnXOhATr3tsQ8InyulM0roeLZqVr2XSwIHM06Ho= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=fris.de; spf=pass smtp.mailfrom=fris.de; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b=HRNsph/b; arc=none smtp.client-ip=116.203.77.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=fris.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fris.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fris.de header.i=@fris.de header.b="HRNsph/b" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 984A0BFB77; Wed, 18 Dec 2024 16:29:50 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1734535791; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=5h6PDz93cAsSjJaoLgJuNr9vMtXMwVw9OLTwqQ4t0aY=; b=HRNsph/bjC7OvmSiyDUB7Jb4bfzGhOWnyu0hcxgOc0OjPUNo330c71RqgdIKqv3Qv0Vgl3 UB9/IK40AktiataquBfy0on0yIFoqVWetidvFgeQ1g8Nlp1ELkR2vv61w1JAIctsvORd4r LTTd7BCOKDZv4UBO5MeGzFpL6TreaLo3dluPjxDxfhmDf46apiAKR9Dhkvxg4gRDIbJ8fD lERXh2i+iL0wdqVXdyezwjBN4TgycZqTwhMxlRKLglxpqiURXsz5qCm3C0gfNRwIoOJWN3 ZTV9Ip+oKpT414klu8H7AoKslZH4ko89/SXb/uALEsYy4wiNM4xkl1MvxaFV0A== From: Frieder Schrempf To: linux-arm-kernel@lists.infradead.org, Marek Vasut , Conor Dooley , Liam Girdwood , linux-kernel@vger.kernel.org, Mark Brown Cc: Frieder Schrempf , Bo Liu , Frank Li , Joy Zou , Robin Gong Subject: [PATCH v3 4/9] regulator: pca9450: Fix control register for LDO5 Date: Wed, 18 Dec 2024 16:27:27 +0100 Message-ID: <20241218152842.97483-5-frieder@fris.de> In-Reply-To: <20241218152842.97483-1-frieder@fris.de> References: <20241218152842.97483-1-frieder@fris.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" From: Frieder Schrempf For LDO5 we need to be able to check the status of the SD_VSEL input in order to know which control register is used. Read the status of the SD_VSEL signal via GPIO and use the correct register accordingly. To use this, the LDO5 node in the devicetree needs the sd-vsel-gpios property to reference the GPIO that is used to read back the SD_VSEL status internally. Please note that the SION bit in the IOMUX must be set if the signal is muxed as VSELECT and controlled by the USDHC controller. Signed-off-by: Frieder Schrempf --- Changes for v3: * Rebase to next-20241218 Changes for v2: * rebase to current master and stop using generic helper from regulator core --- drivers/regulator/pca9450-regulator.c | 89 ++++++++++++++++++++++++++- 1 file changed, 86 insertions(+), 3 deletions(-) diff --git a/drivers/regulator/pca9450-regulator.c b/drivers/regulator/pca9= 450-regulator.c index 9e5e81a9315f6..4cf5fa73765b7 100644 --- a/drivers/regulator/pca9450-regulator.c +++ b/drivers/regulator/pca9450-regulator.c @@ -5,6 +5,7 @@ */ =20 #include +#include #include #include #include @@ -31,6 +32,7 @@ struct pca9450_regulator_desc { struct pca9450 { struct device *dev; struct regmap *regmap; + struct gpio_desc *sd_vsel_gpio; enum pca9450_chip_type type; unsigned int rcnt; int irq; @@ -96,6 +98,58 @@ static const struct regulator_ops pca9450_ldo_regulator_= ops =3D { .get_voltage_sel =3D regulator_get_voltage_sel_regmap, }; =20 +static unsigned int pca9450_ldo5_get_reg_voltage_sel(struct regulator_dev = *rdev) +{ + struct pca9450 *pca9450 =3D rdev_get_drvdata(rdev); + + if (pca9450->sd_vsel_gpio && !gpiod_get_value(pca9450->sd_vsel_gpio)) + return PCA9450_REG_LDO5CTRL_L; + + return rdev->desc->vsel_reg; +} + +static int pca9450_ldo5_get_voltage_sel_regmap(struct regulator_dev *rdev) +{ + unsigned int val; + int ret; + + ret =3D regmap_read(rdev->regmap, pca9450_ldo5_get_reg_voltage_sel(rdev),= &val); + if (ret !=3D 0) + return ret; + + val &=3D rdev->desc->vsel_mask; + val >>=3D ffs(rdev->desc->vsel_mask) - 1; + + return val; +} + +static int pca9450_ldo5_set_voltage_sel_regmap(struct regulator_dev *rdev,= unsigned int sel) +{ + int ret; + + sel <<=3D ffs(rdev->desc->vsel_mask) - 1; + + ret =3D regmap_update_bits(rdev->regmap, pca9450_ldo5_get_reg_voltage_sel= (rdev), + rdev->desc->vsel_mask, sel); + if (ret) + return ret; + + if (rdev->desc->apply_bit) + ret =3D regmap_update_bits(rdev->regmap, rdev->desc->apply_reg, + rdev->desc->apply_bit, + rdev->desc->apply_bit); + return ret; +} + +static const struct regulator_ops pca9450_ldo5_regulator_ops =3D { + .enable =3D regulator_enable_regmap, + .disable =3D regulator_disable_regmap, + .is_enabled =3D regulator_is_enabled_regmap, + .list_voltage =3D regulator_list_voltage_linear_range, + .set_voltage_sel =3D pca9450_ldo5_set_voltage_sel_regmap, + .get_voltage_sel =3D pca9450_ldo5_get_voltage_sel_regmap, +}; + /* * BUCK1/2/3 * 0.60 to 2.1875V (12.5mV step) @@ -451,7 +505,7 @@ static const struct pca9450_regulator_desc pca9450a_reg= ulators[] =3D { .of_match =3D of_match_ptr("LDO5"), .regulators_node =3D of_match_ptr("regulators"), .id =3D PCA9450_LDO5, - .ops =3D &pca9450_ldo_regulator_ops, + .ops =3D &pca9450_ldo5_regulator_ops, .type =3D REGULATOR_VOLTAGE, .n_voltages =3D PCA9450_LDO5_VOLTAGE_NUM, .linear_ranges =3D pca9450_ldo5_volts, @@ -665,7 +719,7 @@ static const struct pca9450_regulator_desc pca9450bc_re= gulators[] =3D { .of_match =3D of_match_ptr("LDO5"), .regulators_node =3D of_match_ptr("regulators"), .id =3D PCA9450_LDO5, - .ops =3D &pca9450_ldo_regulator_ops, + .ops =3D &pca9450_ldo5_regulator_ops, .type =3D REGULATOR_VOLTAGE, .n_voltages =3D PCA9450_LDO5_VOLTAGE_NUM, .linear_ranges =3D pca9450_ldo5_volts, @@ -855,7 +909,7 @@ static const struct pca9450_regulator_desc pca9451a_reg= ulators[] =3D { .of_match =3D of_match_ptr("LDO5"), .regulators_node =3D of_match_ptr("regulators"), .id =3D PCA9450_LDO5, - .ops =3D &pca9450_ldo_regulator_ops, + .ops =3D &pca9450_ldo5_regulator_ops, .type =3D REGULATOR_VOLTAGE, .n_voltages =3D PCA9450_LDO5_VOLTAGE_NUM, .linear_ranges =3D pca9450_ldo5_volts, @@ -913,6 +967,7 @@ static int pca9450_i2c_probe(struct i2c_client *i2c) of_device_get_match_data(&i2c->dev); const struct pca9450_regulator_desc *regulator_desc; struct regulator_config config =3D { }; + struct regulator_dev *ldo5; struct pca9450 *pca9450; unsigned int device_id, i; unsigned int reset_ctrl; @@ -978,11 +1033,15 @@ static int pca9450_i2c_probe(struct i2c_client *i2c) =20 config.regmap =3D pca9450->regmap; config.dev =3D pca9450->dev; + config.driver_data =3D pca9450; =20 rdev =3D devm_regulator_register(pca9450->dev, desc, &config); if (IS_ERR(rdev)) return dev_err_probe(pca9450->dev, PTR_ERR(rdev), "Failed to register regulator(%s)\n", desc->name); + + if (!strcmp(desc->name, "ldo5")) + ldo5 =3D rdev; } =20 if (pca9450->irq) { @@ -1029,6 +1088,30 @@ static int pca9450_i2c_probe(struct i2c_client *i2c) "Failed to enable I2C level translator\n"); } =20 + /* + * For LDO5 we need to be able to check the status of the SD_VSEL input in + * order to know which control register is used. Most boards connect SD_V= SEL + * to the VSELECT signal, so we can use the GPIO that is internally routed + * to this signal (if SION bit is set in IOMUX). + */ + pca9450->sd_vsel_gpio =3D gpiod_get_optional(&ldo5->dev, "sd-vsel", GPIOD= _IN); + if (IS_ERR(pca9450->sd_vsel_gpio)) { + dev_err(&i2c->dev, "Failed to get SD_VSEL GPIO\n"); + return ret; + } + + /* + * For LDO5 we need to be able to check the status of the SD_VSEL input in + * order to know which control register is used. Most boards connect SD_V= SEL + * to the VSELECT signal, so we can use the GPIO that is internally routed + * to this signal (if SION bit is set in IOMUX). + */ + pca9450->sd_vsel_gpio =3D gpiod_get_optional(&ldo5->dev, "sd-vsel", GPIOD= _IN); + if (IS_ERR(pca9450->sd_vsel_gpio)) { + dev_err(&i2c->dev, "Failed to get SD_VSEL GPIO\n"); + return ret; + } + dev_info(&i2c->dev, "%s probed.\n", type =3D=3D PCA9450_TYPE_PCA9450A ? "pca9450a" : (type =3D=3D PCA9450_TYPE_PCA9451A ? "pca9451a" : "pca9450bc")); --=20 2.47.1