From nobody Thu Dec 18 09:49:01 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3389119D898; Wed, 18 Dec 2024 10:54:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734519255; cv=none; b=Ryy9YlQanEgLci9QEE6eoHOZBpGUzVQaBQVu7MoLcpGhlJXxacl76hy/iKeJ0Fg7Lb6qiYFlqfft/xgzG/K3TzJToWq/dlD607+1zxs9cEHhiM4N/OJhGdNnJbttUB2g9RBEZXlLDFgIcoZhx9jCZB42hitrNVSm/ReRaS9H/Tc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734519255; c=relaxed/simple; bh=epCoJXcqUsYqi+GYIyzyKTK3DIPV97DI5SVng2FaHf8=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=Eq5mTvWO/+RQiDHb6N1613C6CwcHeeYozp3vz/nLwiQN3jgNZBXV1VTvLTfL2HEZpEVgOeyjCL2ISH6yWdW1iML62hPTnL2ctsXfsC2BUw9X/+T/LiE9bbXuJa1sjs/XRtbBEcWrn8+ynJd+KK6OYEzWKfv6QpnWq/R2ozoWsaw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=bfjgeqSy; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="bfjgeqSy" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1734519252; bh=epCoJXcqUsYqi+GYIyzyKTK3DIPV97DI5SVng2FaHf8=; h=From:To:Cc:Subject:Date:From; b=bfjgeqSyW/uGw9JxWiBq+jSZqZRyO7uk584FpPu5zgkQz4mc2DImn+xCrOvVnkRAP yorGbIT5n7nGMKDjpl9G8VLfDPjORwZi8LisnQ7s5kGD1v2Gg4p+5DTk+JYb8rIne7 CSMs3gilUCf6fezlqpuXR+XYeHOTeVfbvsNPY/icHPIxcjV1t+/QcrN3k5Piovy9TS 7c5JCkzHl8mtIP0Ej2x8pAMslnDnpXjm/vM78hueiHWRvm7WsG9Eqqw+lOBA1TrN81 bNlXamfKfmMQYg8wWnDlSVxqxwTAVq7f1YY9NH43+vUTOPdKg/AsvaErhlBBbLexQK 3fp/nnFC2x7/w== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id 15FA917E3612; Wed, 18 Dec 2024 11:54:12 +0100 (CET) From: AngeloGioacchino Del Regno To: linux-mediatek@lists.infradead.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, macpaul.lin@mediatek.com Subject: [PATCH] arm64: dts: mediatek: mt8188: Add tertiary eMMC/SD/SDIO controller Date: Wed, 18 Dec 2024 11:54:09 +0100 Message-ID: <20241218105409.39165-1-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.47.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a node for the third instance of the eMMC/SD/SDIO controller found on the MT8188 SoC and keep it disabled. It is expected that only boards that are using this controller instance will configure and enable it. Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8188.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts= /mediatek/mt8188.dtsi index 6ef385072c9f..f2d71da50ea3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -1794,6 +1794,20 @@ mmc1: mmc@11240000 { status =3D "disabled"; }; =20 + mmc2: mmc@11250000 { + compatible =3D "mediatek,mt8188-mmc", "mediatek,mt8183-mmc"; + reg =3D <0 0x11250000 0 0x1000>, + <0 0x11e60000 0 0x1000>; + interrupts =3D ; + clocks =3D <&topckgen CLK_TOP_MSDC30_2>, + <&infracfg_ao CLK_INFRA_AO_MSDC2>, + <&infracfg_ao CLK_INFRA_AO_MSDC30_2>; + clock-names =3D "source", "hclk", "source_cg"; + assigned-clocks =3D <&topckgen CLK_TOP_MSDC30_2>; + assigned-clock-parents =3D <&topckgen CLK_TOP_MSDCPLL_D2>; + status =3D "disabled"; + }; + lvts_mcu: thermal-sensor@11278000 { compatible =3D "mediatek,mt8188-lvts-mcu"; reg =3D <0 0x11278000 0 0x1000>; --=20 2.46.1