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=E2=94=82 =E2=94=82 PCI Endpoint Controller =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=8C=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94= =80=E2=94=90 =E2=94=8C=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94= =90 =E2=94=8C=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=90 =E2= =94=82 PCI Bus =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 = =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2= =94=80=E2=96=BA =E2=94=82 =E2=94=82Func1=E2=94=82 =E2=94=82Func2=E2=94= =82 ... =E2=94=82Func =E2=94=82 =E2=94=82 Doorbell =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 = =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 = =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=94=E2=94=80=E2=94=80=E2=94=AC=E2=94=80=E2=94= =80=E2=94=98 =E2=94=94=E2=94=80=E2=94=80=E2=94=AC=E2=94=80=E2=94=80=E2=94= =98 =E2=94=94=E2=94=80=E2=94=80=E2=94=AC=E2=94=80=E2=94=80=E2=94=98 =E2= =94=82 =E2=94=82 =E2=94=82 =E2=94=82 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Endpoint (EP) controller, So PCI Root Complex (RC) can write MSI message to MSI controller to trigger doorbell IRQ for difference EP functions. Signed-off-by: Frank Li --- change from v12 to v13 - new patch --- drivers/irqchip/irq-msi-lib.c | 4 ++++ drivers/irqchip/irq-msi-lib.h | 6 ++++++ include/linux/irqdomain_defs.h | 2 ++ 3 files changed, 12 insertions(+) diff --git a/drivers/irqchip/irq-msi-lib.c b/drivers/irqchip/irq-msi-lib.c index d8e29fc0d4068..cf39f2e481477 100644 --- a/drivers/irqchip/irq-msi-lib.c +++ b/drivers/irqchip/irq-msi-lib.c @@ -57,6 +57,10 @@ bool msi_lib_init_dev_msi_info(struct device *dev, struc= t irq_domain *domain, return false; =20 break; + case DOMAIN_BUS_DEVICE_PCI_EP_MSI: + if (WARN_ON_ONCE(!IS_ENABLED(CONFIG_PCI_ENDPOINT))) + return false; + fallthrough; case DOMAIN_BUS_DEVICE_MSI: /* * Per device MSI should never have any MSI feature bits diff --git a/drivers/irqchip/irq-msi-lib.h b/drivers/irqchip/irq-msi-lib.h index 681ceabb7bc74..5ccfdb14fce1d 100644 --- a/drivers/irqchip/irq-msi-lib.h +++ b/drivers/irqchip/irq-msi-lib.h @@ -17,6 +17,12 @@ =20 #define MATCH_PLATFORM_MSI BIT(DOMAIN_BUS_PLATFORM_MSI) =20 +#ifdef CONFIG_PCI_ENDPOINT +#define MATCH_PLATFORM_PCI_EP_MSI BIT(DOMAIN_BUS_PLATFORM_PCI_EP_MSI) +#else +#define MATCH_PLATFORM_PCI_EP_MSI (0) +#endif + int msi_lib_irq_domain_select(struct irq_domain *d, struct irq_fwspec *fws= pec, enum irq_domain_bus_token bus_token); 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Signed-off-by: Frank Li --- change from v12 to v13 - new patch --- drivers/pci/endpoint/Makefile | 2 +- drivers/pci/endpoint/pci-ep-msi.c | 36 ++++++++++++++++++++++++++++++++++++ include/linux/pci-ep-msi.h | 21 +++++++++++++++++++++ 3 files changed, 58 insertions(+), 1 deletion(-) diff --git a/drivers/pci/endpoint/Makefile b/drivers/pci/endpoint/Makefile index 95b2fe47e3b06..a1ccce440c2c5 100644 --- a/drivers/pci/endpoint/Makefile +++ b/drivers/pci/endpoint/Makefile @@ -5,4 +5,4 @@ =20 obj-$(CONFIG_PCI_ENDPOINT_CONFIGFS) +=3D pci-ep-cfs.o obj-$(CONFIG_PCI_ENDPOINT) +=3D pci-epc-core.o pci-epf-core.o\ - pci-epc-mem.o functions/ + pci-epc-mem.o pci-ep-msi.o functions/ diff --git a/drivers/pci/endpoint/pci-ep-msi.c b/drivers/pci/endpoint/pci-e= p-msi.c new file mode 100644 index 0000000000000..7aedc1cafbd14 --- /dev/null +++ b/drivers/pci/endpoint/pci-ep-msi.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCI Endpoint *Controller* (EPC) MSI library + * + * Copyright (C) 2024 NXP + * Author: Frank Li + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +int pci_epf_msi_domain_get_msi_rid(struct device *dev, u32 *rid) +{ + struct pci_epf *epf =3D to_pci_epf(dev); + struct pci_epc *epc =3D epf->epc; + + if (!rid) + return -EINVAL; + + /* + * PCI Endpoint device ID can't full reuse PCI's BDF, BUS number is + * Root Complex Bus number, which is no means for EP side. Move func_no + * as low 3 bits to partially match PCI's BDF. + */ + *rid =3D of_msi_map_id(epc->dev.parent, NULL, (epf->func_no & 0x7) | (epf= ->vfunc_no << 3)); + + return 0; +} +EXPORT_SYMBOL_GPL(pci_epf_msi_domain_get_msi_rid); diff --git a/include/linux/pci-ep-msi.h b/include/linux/pci-ep-msi.h new file mode 100644 index 0000000000000..75236867426a4 --- /dev/null +++ b/include/linux/pci-ep-msi.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * PCI Endpoint *Function* side MSI header file + * + * Copyright (C) 2024 NXP + * Author: Frank Li + */ + +#ifndef __PCI_EP_MSI__ +#define __PCI_EP_MSI__ + +#ifdef CONFIG_PCI_ENDPOINT +int pci_epf_msi_domain_get_msi_rid(struct device *dev, u32 *rid); +#else +static inline int pci_epf_msi_domain_get_msi_rid(struct device *dev, u32 *= rid) +{ + return -EINVAL; +} +#endif + +#endif /* __PCI_EP_MSI__ */ --=20 2.34.1 From nobody Sat Dec 28 03:52:34 2024 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2084.outbound.protection.outlook.com [40.107.20.84]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F24851FCCEE; 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No function change. Signed-off-by: Frank Li --- change from v12 to v13 - new patch --- drivers/irqchip/irq-gic-v3-its-msi-parent.c | 30 ++++++++++++++++++-------= ---- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its-msi-parent.c b/drivers/irqchip/= irq-gic-v3-its-msi-parent.c index 75aa0d4bd1346..b2a4b67545b82 100644 --- a/drivers/irqchip/irq-gic-v3-its-msi-parent.c +++ b/drivers/irqchip/irq-gic-v3-its-msi-parent.c @@ -132,19 +132,10 @@ int __weak iort_pmsi_get_dev_id(struct device *dev, u= 32 *dev_id) return -1; } =20 -static int its_pmsi_prepare(struct irq_domain *domain, struct device *dev, - int nvec, msi_alloc_info_t *info) +static int its_pmsi_prepare_devid(struct irq_domain *domain, struct device= *dev, + int nvec, msi_alloc_info_t *info, u32 dev_id) { struct msi_domain_info *msi_info; - u32 dev_id; - int ret; - - if (dev->of_node) - ret =3D of_pmsi_get_dev_id(domain->parent, dev, &dev_id); - else - ret =3D iort_pmsi_get_dev_id(dev, &dev_id); - if (ret) - return ret; =20 /* ITS specific DeviceID, as the core ITS ignores dev. */ info->scratchpad[0].ul =3D dev_id; @@ -165,6 +156,23 @@ static int its_pmsi_prepare(struct irq_domain *domain,= struct device *dev, dev, nvec, info); } =20 +static int its_pmsi_prepare(struct irq_domain *domain, struct device *dev, + int nvec, msi_alloc_info_t *info) +{ + u32 dev_id; + int ret; + + if (dev->of_node) + ret =3D of_pmsi_get_dev_id(domain->parent, dev, &dev_id); + else + ret =3D iort_pmsi_get_dev_id(dev, &dev_id); + + if (ret) + return ret; + + return its_pmsi_prepare_devid(domain, dev, nvec, info, dev_id); +} + static bool its_init_dev_msi_info(struct device *dev, struct irq_domain *d= omain, struct irq_domain *real_parent, struct msi_domain_info *info) { --=20 2.34.1 From nobody Sat Dec 28 03:52:34 2024 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2069.outbound.protection.outlook.com [40.107.20.69]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5157E1FDE26; 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=E2=94=82 =E2=94=82 PCI Endpoint Controller =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=8C=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94= =80=E2=94=90 =E2=94=8C=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94= =90 =E2=94=8C=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=90 =E2= =94=82 PCI Bus =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 = =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2= =94=80=E2=96=BA =E2=94=82 =E2=94=82Func1=E2=94=82 =E2=94=82Func2=E2=94= =82 ... =E2=94=82Func =E2=94=82 =E2=94=82 Doorbell =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 = =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 = =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=94=E2=94=80=E2=94=80=E2=94=AC=E2=94=80=E2=94= =80=E2=94=98 =E2=94=94=E2=94=80=E2=94=80=E2=94=AC=E2=94=80=E2=94=80=E2=94= =98 =E2=94=94=E2=94=80=E2=94=80=E2=94=AC=E2=94=80=E2=94=80=E2=94=98 =E2= =94=82 =E2=94=82 =E2=94=82 =E2=94=82 =E2=94=82 = =E2=94=82 =E2=94=94=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80= =E2=94=BC=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2= =94=80=E2=94=BC=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94= =80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=BC=E2=94=80=E2=94=80=E2=94=80= =E2=94=80=E2=94=98 =E2=94=82 =E2=94=82 =E2=94=82 =E2=96=BC =E2=96=BC =E2=96=BC =E2=94=8C=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94= =80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80= =E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2= =94=80=E2=94=80=E2=94=90 =E2=94=82 MSI Controller =E2=94=82 =E2=94=94=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94= =80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80= =E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2=94=80=E2= =94=80=E2=94=80=E2=94=98 Add domain DOMAIN_BUS_DEVICE_PCI_EP_MSI to allocate MSI domain for Endpoint function in PCI Endpoint (EP) controller, So PCI Root Complex (RC) can write MSI message to MSI controller to trigger doorbell IRQ for difference EP functions. Signed-off-by: Frank Li --- change from v12 to v13 - new patch --- drivers/irqchip/irq-gic-v3-its-msi-parent.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-gic-v3-its-msi-parent.c b/drivers/irqchip/= irq-gic-v3-its-msi-parent.c index b2a4b67545b82..16e7d53f0b133 100644 --- a/drivers/irqchip/irq-gic-v3-its-msi-parent.c +++ b/drivers/irqchip/irq-gic-v3-its-msi-parent.c @@ -5,6 +5,7 @@ // Copyright (C) 2022 Intel =20 #include +#include #include =20 #include "irq-gic-common.h" @@ -173,6 +174,19 @@ static int its_pmsi_prepare(struct irq_domain *domain,= struct device *dev, return its_pmsi_prepare_devid(domain, dev, nvec, info, dev_id); } =20 +static int its_pci_ep_msi_prepare(struct irq_domain *domain, struct device= *dev, + int nvec, msi_alloc_info_t *info) +{ + u32 dev_id; + int ret; + + ret =3D pci_epf_msi_domain_get_msi_rid(dev, &dev_id); + if (ret) + return ret; + + return its_pmsi_prepare_devid(domain, dev, nvec, info, dev_id); +} + static bool its_init_dev_msi_info(struct device *dev, struct irq_domain *d= omain, struct irq_domain *real_parent, struct msi_domain_info *info) { @@ -205,6 +219,9 @@ static bool its_init_dev_msi_info(struct device *dev, s= truct irq_domain *domain, */ info->ops->msi_prepare =3D its_pmsi_prepare; break; + case DOMAIN_BUS_DEVICE_PCI_EP_MSI: + info->ops->msi_prepare =3D its_pci_ep_msi_prepare; + break; default: /* Confused. How did the lib return true? */ WARN_ON_ONCE(1); @@ -218,7 +235,7 @@ const struct msi_parent_ops gic_v3_its_msi_parent_ops = =3D { .supported_flags =3D ITS_MSI_FLAGS_SUPPORTED, .required_flags =3D ITS_MSI_FLAGS_REQUIRED, .bus_select_token =3D DOMAIN_BUS_NEXUS, - .bus_select_mask =3D MATCH_PCI_MSI | MATCH_PLATFORM_MSI, + .bus_select_mask =3D MATCH_PCI_MSI | MATCH_PLATFORM_MSI | MATCH_PLATFORM_= PCI_EP_MSI, .prefix =3D "ITS-", .init_dev_msi_info =3D its_init_dev_msi_info, }; --=20 2.34.1 From nobody Sat Dec 28 03:52:34 2024 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2082.outbound.protection.outlook.com [40.107.22.82]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 08E5A1FE453; Wed, 18 Dec 2024 23:09:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.22.82 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; 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It is the responsibility of the EPF driver to pass the actual message data to be written by the host to the doorbell BAR region through its own logic. Tested-by: Niklas Cassel Signed-off-by: Frank Li --- Change from v12 to v13 - Use DOMAIN_BUS_DEVICE_PCI_EP_MSI Change from v10 to v12 - none Change from v9 to v10 - Create msi domain for each function device. - Remove only function support limiation. My hardware only support one function, so not test more than one case. - use "msi-map" descript msi information msi-map =3D ; Chagne from v8 to v9 - sort header file - use pci_epc_get(dev_name(msi_desc_to_dev(desc))); - check epf number at pci_epf_alloc_doorbell - Add comments for miss msi-parent case change from v5 to v8 -none Change from v4 to v5 - Remove request_irq() in pci_epc_alloc_doorbell() and leave to EP function driver, so ep function driver can register differece call back function for difference doorbell events and set irq affinity to differece CPU core. - Improve error message when MSI allocate failure. Change from v3 to v4 - msi change to use msi_get_virq() avoid use msi_for_each_desc(). - add new struct for pci_epf_doorbell_msg to msi msg,virq and irq name. - move mutex lock to epc function - initialize variable at declear place. - passdown epf to epc*() function to simplify code. --- drivers/pci/endpoint/pci-ep-msi.c | 104 ++++++++++++++++++++++++++++++++++= ++++ include/linux/pci-ep-msi.h | 5 ++ include/linux/pci-epf.h | 16 ++++++ 3 files changed, 125 insertions(+) diff --git a/drivers/pci/endpoint/pci-ep-msi.c b/drivers/pci/endpoint/pci-e= p-msi.c index 7aedc1cafbd14..33503d86cf2bc 100644 --- a/drivers/pci/endpoint/pci-ep-msi.c +++ b/drivers/pci/endpoint/pci-ep-msi.c @@ -34,3 +34,107 @@ int pci_epf_msi_domain_get_msi_rid(struct device *dev, = u32 *rid) return 0; } EXPORT_SYMBOL_GPL(pci_epf_msi_domain_get_msi_rid); + +static void pci_epf_write_msi_msg(struct irq_data *d, struct msi_msg *msg) +{ + struct msi_desc *desc =3D irq_data_get_msi_desc(d); + struct pci_epf *epf =3D to_pci_epf(desc->dev); + + if (epf && epf->db_msg && desc->msi_index < epf->num_db) + memcpy(&epf->db_msg[desc->msi_index].msg, msg, sizeof(*msg)); +} + +static void pci_epf_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *d= esc) +{ + arg->desc =3D desc; + arg->hwirq =3D desc->msi_index; +} + +static const struct msi_domain_template pci_epf_msi_template =3D { + .chip =3D { + .name =3D "EP-MSI", + .irq_mask =3D irq_chip_mask_parent, + .irq_unmask =3D irq_chip_unmask_parent, + .irq_write_msi_msg =3D pci_epf_write_msi_msg, + /* The rest is filled in by the MSI parent */ + }, + + .ops =3D { + .set_desc =3D pci_epf_msi_set_desc, + }, + + .info =3D { + .bus_token =3D DOMAIN_BUS_DEVICE_PCI_EP_MSI, + }, +}; + +static int pci_epf_device_msi_init_and_alloc_irqs(struct device *dev, unsi= gned int nvec) +{ + struct irq_domain *domain =3D dev->msi.domain; + + if (!domain) + return -EINVAL; + + if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN, + &pci_epf_msi_template, nvec, NULL, NULL)) + return -ENODEV; + + return msi_domain_alloc_irqs_range(dev, MSI_DEFAULT_DOMAIN, 0, nvec - 1); +} + +int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 num_db) +{ + struct pci_epc *epc =3D epf->epc; + struct device *dev =3D &epf->dev; + struct irq_domain *dom; + void *msg; + u32 rid; + int ret; + int i; + + rid =3D (epf->func_no & 0x7) | (epf->vfunc_no << 3); + dom =3D of_msi_map_get_device_domain(epc->dev.parent, rid, DOMAIN_BUS_PLA= TFORM_PCI_EP_MSI); + if (!dom) { + dev_err(dev, "Can't find msi domain\n"); + return -EINVAL; + } + + dev_set_msi_domain(dev, dom); + + msg =3D kcalloc(num_db, sizeof(struct pci_epf_doorbell_msg), GFP_KERNEL); + if (!msg) + return -ENOMEM; + + epf->num_db =3D num_db; + epf->db_msg =3D msg; + + ret =3D pci_epf_device_msi_init_and_alloc_irqs(dev, num_db); + if (ret) { + /* + * The pcie_ep DT node has to specify 'msi-parent' for EP + * doorbell support to work. Right now only GIC ITS is + * supported. If you have GIC ITS and reached this print, + * perhaps you are missing 'msi-map' in DT. + */ + dev_err(dev, "Failed to allocate MSI\n"); + kfree(msg); + return -ENOMEM; + } + + for (i =3D 0; i < num_db; i++) + epf->db_msg[i].virq =3D msi_get_virq(dev, i); + + return ret; +} +EXPORT_SYMBOL_GPL(pci_epf_alloc_doorbell); + +void pci_epf_free_doorbell(struct pci_epf *epf) +{ + msi_domain_free_irqs_all(&epf->dev, MSI_DEFAULT_DOMAIN); + msi_remove_device_irq_domain(&epf->dev, MSI_DEFAULT_DOMAIN); + + kfree(epf->db_msg); + epf->db_msg =3D NULL; + epf->num_db =3D 0; +} +EXPORT_SYMBOL_GPL(pci_epf_free_doorbell); diff --git a/include/linux/pci-ep-msi.h b/include/linux/pci-ep-msi.h index 75236867426a4..26b1c86893ee4 100644 --- a/include/linux/pci-ep-msi.h +++ b/include/linux/pci-ep-msi.h @@ -18,4 +18,9 @@ static inline int pci_epf_msi_domain_get_msi_rid(struct d= evice *dev, u32 *rid) } #endif =20 +struct pci_epf; + +int pci_epf_alloc_doorbell(struct pci_epf *epf, u16 nums); +void pci_epf_free_doorbell(struct pci_epf *epf); + #endif /* __PCI_EP_MSI__ */ diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index 18a3aeb62ae4e..5374e6515ffa0 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -12,6 +12,7 @@ #include #include #include +#include #include =20 struct pci_epf; @@ -125,6 +126,17 @@ struct pci_epf_bar { int flags; }; =20 +/** + * struct pci_epf_doorbell_msg - represents doorbell message + * @msi_msg: MSI message + * @virq: irq number of this doorbell MSI message + * @name: irq name for doorbell interrupt + */ +struct pci_epf_doorbell_msg { + struct msi_msg msg; + int virq; +}; + /** * struct pci_epf - represents the PCI EPF device * @dev: the PCI EPF device @@ -152,6 +164,8 @@ struct pci_epf_bar { * @vfunction_num_map: bitmap to manage virtual function number * @pci_vepf: list of virtual endpoint functions associated with this func= tion * @event_ops: Callbacks for capturing the EPC events + * @db_msg: data for MSI from RC side + * @num_db: number of doorbells */ struct pci_epf { struct device dev; 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Signed-off-by: Frank Li --- Change form v9 to v13 - none change from v8 to v9 - pci_epf_align_inbound_addr(), base and off must be not NULL - rm pci_epf_align_inbound_addr_lo_hi() change from v7 to v8 - change name to pci_epf_align_inbound_addr() - update comment said only need for memory, which not allocated by pci_epf_alloc_space(). change from v6 to v7 - new patch --- drivers/pci/endpoint/pci-epf-core.c | 44 +++++++++++++++++++++++++++++++++= ++++ include/linux/pci-epf.h | 3 +++ 2 files changed, 47 insertions(+) diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci= -epf-core.c index 8fa2797d4169a..d7a80f9c1e661 100644 --- a/drivers/pci/endpoint/pci-epf-core.c +++ b/drivers/pci/endpoint/pci-epf-core.c @@ -464,6 +464,50 @@ struct pci_epf *pci_epf_create(const char *name) } EXPORT_SYMBOL_GPL(pci_epf_create); =20 +/** + * pci_epf_align_inbound_addr() - Get base address and offset that match B= AR's + * alignment requirement + * @epf: the EPF device + * @addr: the address of the memory + * @bar: the BAR number corresponding to map addr + * @base: return base address, which match BAR's alignment requirement. + * @off: return offset. + * + * Helper function to convert input 'addr' to base and offset, which match + * BAR's alignment requirement. + * + * The pci_epf_alloc_space() function already accounts for alignment. This= is + * primarily intended for use with other memory regions not allocated by + * pci_epf_alloc_space(), such as peripheral register spaces or the trigger + * address for a platform MSI controller. + */ +int pci_epf_align_inbound_addr(struct pci_epf *epf, enum pci_barno bar, + u64 addr, u64 *base, size_t *off) +{ + const struct pci_epc_features *epc_features; + u64 align; + + if (!base || !off) + return -EINVAL; + + epc_features =3D pci_epc_get_features(epf->epc, epf->func_no, epf->vfunc_= no); + if (!epc_features) { + dev_err(&epf->dev, "epc_features not implemented\n"); + return -EOPNOTSUPP; + } + + align =3D epc_features->align; + align =3D align ? align : 128; + if (epc_features->bar[bar].type =3D=3D BAR_FIXED) + align =3D max(epc_features->bar[bar].fixed_size, align); + + *base =3D round_down(addr, align); + *off =3D addr & (align - 1); + + return 0; +} +EXPORT_SYMBOL_GPL(pci_epf_align_inbound_addr); + static void pci_epf_dev_release(struct device *dev) { struct pci_epf *epf =3D to_pci_epf(dev); diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index 5374e6515ffa0..2847d195433bf 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -238,6 +238,9 @@ void *pci_epf_alloc_space(struct pci_epf *epf, size_t s= ize, enum pci_barno bar, enum pci_epc_interface_type type); void pci_epf_free_space(struct pci_epf *epf, void *addr, enum pci_barno ba= r, enum pci_epc_interface_type type); + +int pci_epf_align_inbound_addr(struct pci_epf *epf, enum pci_barno bar, + u64 addr, u64 *base, size_t *off); int pci_epf_bind(struct pci_epf *epf); void pci_epf_unbind(struct pci_epf *epf); int pci_epf_add_vepf(struct pci_epf *epf_pf, struct pci_epf *epf_vf); --=20 2.34.1 From nobody Sat Dec 28 03:52:34 2024 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2085.outbound.protection.outlook.com [40.107.21.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 011931FECB3; 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Use pci_epf_alloc_doorbell() to allocate a doorbell address space. Enable the Root Complex (RC) side driver to trigger pci-epc-test's doorbell callback handler by writing doorbell_data to the mapped doorbell_bar's address space. Set STATUS_DOORBELL_SUCCESS in the doorbell callback to indicate completion. Avoid breaking compatibility between host and endpoint, add new command COMMAND_ENABLE_DOORBELL and COMMAND_DISABLE_DOORBELL. Host side need send COMMAND_ENABLE_DOORBELL to map one bar's inbound address to MSI space. the command COMMAND_DISABLE_DOORBELL to recovery original inbound address mapping. Host side new driver Host side old driver EP: new driver S F EP: old driver F F S: If EP side support MSI, 'pcitest -B' return success. If EP side doesn't support MSI, the same to 'F'. F: 'pcitest -B' return failure, other case as usual. Tested-by: Niklas Cassel Signed-off-by: Frank Li --- Change from v9 to v13 - none Change from v8 to v9 - move pci_epf_alloc_doorbell() into pci_epf_{enable/disable}_doorbell(). - remove doorbell_done in commit message. - rename pci_epf_{enable/disable}_doorbell() to pci_epf_test_{enable/disable}_doorbell() to align corrent code style. Change from v7 to v8 - rename to pci_epf_align_inbound_addr_lo_hi() Change from v6 to v7 - use help function pci_epf_align_addr_lo_hi() Change from v5 to v6 - rename doorbell_addr to doorbell_offset Chagne from v4 to v5 - Add doorbell free at unbind function. - Move msi irq handler to here to more complex user case, such as differece doorbell can use difference handler function. - Add Niklas's code to handle fixed bar's case. If need add your signed-off tag or co-developer tag, please let me know. change from v3 to v4 - remove revid requirement - Add command COMMAND_ENABLE_DOORBELL and COMMAND_DISABLE_DOORBELL. - call pci_epc_set_bar() to map inbound address to MSI space only at COMMAND_ENABLE_DOORBELL. --- drivers/pci/endpoint/functions/pci-epf-test.c | 132 ++++++++++++++++++++++= ++++ 1 file changed, 132 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/en= dpoint/functions/pci-epf-test.c index ef6677f34116e..a0a0e86a081cb 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -11,12 +11,14 @@ #include #include #include +#include #include #include #include =20 #include #include +#include #include =20 #define IRQ_TYPE_INTX 0 @@ -29,6 +31,8 @@ #define COMMAND_READ BIT(3) #define COMMAND_WRITE BIT(4) #define COMMAND_COPY BIT(5) +#define COMMAND_ENABLE_DOORBELL BIT(6) +#define COMMAND_DISABLE_DOORBELL BIT(7) =20 #define STATUS_READ_SUCCESS BIT(0) #define STATUS_READ_FAIL BIT(1) @@ -39,6 +43,11 @@ #define STATUS_IRQ_RAISED BIT(6) #define STATUS_SRC_ADDR_INVALID BIT(7) #define STATUS_DST_ADDR_INVALID BIT(8) +#define STATUS_DOORBELL_SUCCESS BIT(9) +#define STATUS_DOORBELL_ENABLE_SUCCESS BIT(10) +#define STATUS_DOORBELL_ENABLE_FAIL BIT(11) +#define STATUS_DOORBELL_DISABLE_SUCCESS BIT(12) +#define STATUS_DOORBELL_DISABLE_FAIL BIT(13) =20 #define FLAG_USE_DMA BIT(0) =20 @@ -74,6 +83,9 @@ struct pci_epf_test_reg { u32 irq_type; u32 irq_number; u32 flags; + u32 doorbell_bar; + u32 doorbell_offset; + u32 doorbell_data; } __packed; =20 static struct pci_epf_header test_header =3D { @@ -642,6 +654,117 @@ static void pci_epf_test_raise_irq(struct pci_epf_tes= t *epf_test, } } =20 +static irqreturn_t pci_epf_test_doorbell_handler(int irq, void *data) +{ + struct pci_epf_test *epf_test =3D data; + enum pci_barno test_reg_bar =3D epf_test->test_reg_bar; + struct pci_epf_test_reg *reg =3D epf_test->reg[test_reg_bar]; + + reg->status |=3D STATUS_DOORBELL_SUCCESS; + pci_epf_test_raise_irq(epf_test, reg); + + return IRQ_HANDLED; +} + +static void pci_epf_test_doorbell_cleanup(struct pci_epf_test *epf_test) +{ + struct pci_epf_test_reg *reg =3D epf_test->reg[epf_test->test_reg_bar]; + struct pci_epf *epf =3D epf_test->epf; + + if (reg->doorbell_bar > 0) { + free_irq(epf->db_msg[0].virq, epf_test); + reg->doorbell_bar =3D NO_BAR; + } + + if (epf->db_msg) + pci_epf_free_doorbell(epf); +} + +static void pci_epf_test_enable_doorbell(struct pci_epf_test *epf_test, + struct pci_epf_test_reg *reg) +{ + struct pci_epf *epf =3D epf_test->epf; + struct pci_epf_bar db_bar =3D {}; + struct pci_epc *epc =3D epf->epc; + struct msi_msg *msg; + enum pci_barno bar; + size_t offset; + int ret; + + ret =3D pci_epf_alloc_doorbell(epf, 1); + if (ret) { + reg->status |=3D STATUS_DOORBELL_ENABLE_FAIL; + return; + } + + msg =3D &epf->db_msg[0].msg; + bar =3D pci_epc_get_next_free_bar(epf_test->epc_features, epf_test->test_= reg_bar + 1); + if (bar < BAR_0 || bar =3D=3D epf_test->test_reg_bar || !epf->db_msg) { + reg->status |=3D STATUS_DOORBELL_ENABLE_FAIL; + return; + } + + ret =3D request_irq(epf->db_msg[0].virq, pci_epf_test_doorbell_handler, 0, + "pci-test-doorbell", epf_test); + if (ret) { + dev_err(&epf->dev, + "Failed to request irq %d, doorbell feature is not supported\n", + epf->db_msg[0].virq); + reg->status |=3D STATUS_DOORBELL_ENABLE_FAIL; + pci_epf_test_doorbell_cleanup(epf_test); + return; + } + + reg->doorbell_data =3D msg->data; + reg->doorbell_bar =3D bar; + + msg =3D &epf->db_msg[0].msg; + ret =3D pci_epf_align_inbound_addr(epf, bar, ((u64)msg->address_hi << 32)= | msg->address_lo, + &db_bar.phys_addr, &offset); + + if (ret) { + reg->status |=3D STATUS_DOORBELL_ENABLE_FAIL; + pci_epf_test_doorbell_cleanup(epf_test); + return; + } + + reg->doorbell_offset =3D offset; + + db_bar.barno =3D bar; + db_bar.size =3D epf->bar[bar].size; + db_bar.flags =3D epf->bar[bar].flags; + + ret =3D pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, &db_bar); + if (ret) { + reg->status |=3D STATUS_DOORBELL_ENABLE_FAIL; + pci_epf_test_doorbell_cleanup(epf_test); + } else { + reg->status |=3D STATUS_DOORBELL_ENABLE_SUCCESS; + } +} + +static void pci_epf_test_disable_doorbell(struct pci_epf_test *epf_test, + struct pci_epf_test_reg *reg) +{ + enum pci_barno bar =3D reg->doorbell_bar; + struct pci_epf *epf =3D epf_test->epf; + struct pci_epc *epc =3D epf->epc; + int ret; + + if (bar < BAR_0 || bar =3D=3D epf_test->test_reg_bar || !epf->db_msg) { + reg->status |=3D STATUS_DOORBELL_DISABLE_FAIL; + return; + } + + ret =3D pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, &epf->bar[bar]); + if (ret) + reg->status |=3D STATUS_DOORBELL_DISABLE_FAIL; + else + reg->status |=3D STATUS_DOORBELL_DISABLE_SUCCESS; + + pci_epf_test_doorbell_cleanup(epf_test); +} + static void pci_epf_test_cmd_handler(struct work_struct *work) { u32 command; @@ -688,6 +811,14 @@ static void pci_epf_test_cmd_handler(struct work_struc= t *work) pci_epf_test_copy(epf_test, reg); pci_epf_test_raise_irq(epf_test, reg); break; + case COMMAND_ENABLE_DOORBELL: + pci_epf_test_enable_doorbell(epf_test, reg); + pci_epf_test_raise_irq(epf_test, reg); + break; + case COMMAND_DISABLE_DOORBELL: + pci_epf_test_disable_doorbell(epf_test, reg); + pci_epf_test_raise_irq(epf_test, reg); + break; default: dev_err(dev, "Invalid command 0x%x\n", command); break; @@ -934,6 +1065,7 @@ static void pci_epf_test_unbind(struct pci_epf *epf) pci_epf_test_clean_dma_chan(epf_test); pci_epf_test_clear_bar(epf); } + pci_epf_test_doorbell_cleanup(epf_test); pci_epf_test_free_space(epf); } =20 --=20 2.34.1 From nobody Sat Dec 28 03:52:34 2024 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2083.outbound.protection.outlook.com [40.107.20.83]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0E431FECCF; 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Trigger the doorbell by writing data from PCI_ENDPOINT_TEST_DB_DATA to the address provided by PCI_ENDPOINT_TEST_DB_OFFSET and wait for endpoint feedback. Add two command to COMMAND_ENABLE_DOORBELL and COMMAND_DISABLE_DOORBELL to enable EP side's doorbell support and avoid compatible problem, which host side driver miss-match with endpoint side function driver. See below table: Host side new driver Host side old driver EP: new driver S F EP: old driver F F S: If EP side support MSI, 'pcitest -B' return success. If EP side doesn't support MSI, the same to 'F'. F: 'pcitest -B' return failure, other case as usual. Tested-by: Niklas Cassel Signed-off-by: Frank Li --- Change from v9 to v13 - none Change from v8 to v9 - change PCITEST_DOORBELL to 0xa Change form v6 to v8 - none Change from v5 to v6 - %s/PCI_ENDPOINT_TEST_DB_ADDR/PCI_ENDPOINT_TEST_DB_OFFSET/g Change from v4 to v5 - remove unused varible - add irq_type at pci_endpoint_test_doorbell(); change from v3 to v4 - Add COMMAND_ENABLE_DOORBELL and COMMAND_DISABLE_DOORBELL. - Remove new DID requirement. --- drivers/misc/pci_endpoint_test.c | 80 ++++++++++++++++++++++++++++++++++++= ++++ include/uapi/linux/pcitest.h | 1 + 2 files changed, 81 insertions(+) diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_t= est.c index 3aaaf47fa4ee2..b3f36b6ba8ba2 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -42,6 +42,8 @@ #define COMMAND_READ BIT(3) #define COMMAND_WRITE BIT(4) #define COMMAND_COPY BIT(5) +#define COMMAND_ENABLE_DOORBELL BIT(6) +#define COMMAND_DISABLE_DOORBELL BIT(7) =20 #define PCI_ENDPOINT_TEST_STATUS 0x8 #define STATUS_READ_SUCCESS BIT(0) @@ -53,6 +55,11 @@ #define STATUS_IRQ_RAISED BIT(6) #define STATUS_SRC_ADDR_INVALID BIT(7) #define STATUS_DST_ADDR_INVALID BIT(8) +#define STATUS_DOORBELL_SUCCESS BIT(9) +#define STATUS_DOORBELL_ENABLE_SUCCESS BIT(10) +#define STATUS_DOORBELL_ENABLE_FAIL BIT(11) +#define STATUS_DOORBELL_DISABLE_SUCCESS BIT(12) +#define STATUS_DOORBELL_DISABLE_FAIL BIT(13) =20 #define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR 0x0c #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR 0x10 @@ -67,6 +74,10 @@ #define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28 =20 #define PCI_ENDPOINT_TEST_FLAGS 0x2c +#define PCI_ENDPOINT_TEST_DB_BAR 0x30 +#define PCI_ENDPOINT_TEST_DB_OFFSET 0x34 +#define PCI_ENDPOINT_TEST_DB_DATA 0x38 + #define FLAG_USE_DMA BIT(0) =20 #define PCI_DEVICE_ID_TI_AM654 0xb00c @@ -108,6 +119,7 @@ enum pci_barno { BAR_3, BAR_4, BAR_5, + NO_BAR =3D -1, }; =20 struct pci_endpoint_test { @@ -746,6 +758,71 @@ static bool pci_endpoint_test_set_irq(struct pci_endpo= int_test *test, return false; } =20 +static bool pci_endpoint_test_doorbell(struct pci_endpoint_test *test) +{ + struct pci_dev *pdev =3D test->pdev; + struct device *dev =3D &pdev->dev; + int irq_type =3D test->irq_type; + enum pci_barno bar; + u32 data, status; + u32 addr; + + if (irq_type < IRQ_TYPE_INTX || irq_type > IRQ_TYPE_MSIX) { + dev_err(dev, "Invalid IRQ type option\n"); + return false; + } + + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type); + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1); + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND, + COMMAND_ENABLE_DOORBELL); + + wait_for_completion_timeout(&test->irq_raised, msecs_to_jiffies(1000)); + + status =3D pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS); + if (status & STATUS_DOORBELL_ENABLE_FAIL) { + dev_err(dev, "Failed to enable doorbell\n"); + return false; + } + + data =3D pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_DB_DATA); + addr =3D pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_DB_OFFSET); + bar =3D pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_DB_BAR); + + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type); + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1); + + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_STATUS, 0); + + bar =3D pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_DB_BAR); + + writel(data, test->bar[bar] + addr); + + wait_for_completion_timeout(&test->irq_raised, msecs_to_jiffies(1000)); + + status =3D pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS); + + if (!(status & STATUS_DOORBELL_SUCCESS)) + dev_err(dev, "Endpoint have not received Doorbell\n"); + + pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND, + COMMAND_DISABLE_DOORBELL); + + wait_for_completion_timeout(&test->irq_raised, msecs_to_jiffies(1000)); + + status |=3D pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS); + + if (status & STATUS_DOORBELL_DISABLE_FAIL) { + dev_err(dev, "Failed to disable doorbell\n"); + return false; + } + + if (!(status & STATUS_DOORBELL_SUCCESS)) + return false; + + return true; +} + static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { @@ -793,6 +870,9 @@ static long pci_endpoint_test_ioctl(struct file *file, = unsigned int cmd, case PCITEST_CLEAR_IRQ: ret =3D pci_endpoint_test_clear_irq(test); break; + case PCITEST_DOORBELL: + ret =3D pci_endpoint_test_doorbell(test); + break; } =20 ret: diff --git a/include/uapi/linux/pcitest.h b/include/uapi/linux/pcitest.h index 94b46b043b536..b82e7f2ed937d 100644 --- a/include/uapi/linux/pcitest.h +++ b/include/uapi/linux/pcitest.h @@ -20,6 +20,7 @@ #define PCITEST_MSIX _IOW('P', 0x7, int) #define PCITEST_SET_IRQTYPE _IOW('P', 0x8, int) #define PCITEST_GET_IRQTYPE _IO('P', 0x9) +#define PCITEST_DOORBELL _IO('P', 0xa) #define PCITEST_CLEAR_IRQ _IO('P', 0x10) =20 #define PCITEST_FLAGS_USE_DMA 0x00000001 --=20 2.34.1 From nobody Sat Dec 28 03:52:34 2024 Received: from EUR05-DB8-obe.outbound.protection.outlook.com (mail-db8eur05on2046.outbound.protection.outlook.com [40.107.20.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 11F831FF1DC; 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Tested-by: Niklas Cassel Signed-off-by: Frank Li --- Change from v3 to v13 - none --- tools/pci/pcitest.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/tools/pci/pcitest.c b/tools/pci/pcitest.c index 7b530d838d408..fcff0224a3381 100644 --- a/tools/pci/pcitest.c +++ b/tools/pci/pcitest.c @@ -34,6 +34,7 @@ struct pci_test { bool copy; unsigned long size; bool use_dma; + bool doorbell; }; =20 static int run_test(struct pci_test *test) @@ -147,6 +148,15 @@ static int run_test(struct pci_test *test) fprintf(stdout, "%s\n", result[ret]); } =20 + if (test->doorbell) { + ret =3D ioctl(fd, PCITEST_DOORBELL, 0); + fprintf(stdout, "Ringing doorbell on the EP\t\t"); + if (ret < 0) + fprintf(stdout, "TEST FAILED\n"); + else + fprintf(stdout, "%s\n", result[ret]); + } + fflush(stdout); close(fd); return (ret < 0) ? ret : 1 - ret; /* return 0 if test succeeded */ @@ -172,7 +182,7 @@ int main(int argc, char **argv) /* set default endpoint device */ test->device =3D "/dev/pci-endpoint-test.0"; =20 - while ((c =3D getopt(argc, argv, "D:b:m:x:i:deIlhrwcs:")) !=3D EOF) + while ((c =3D getopt(argc, argv, "D:b:m:x:i:BdeIlhrwcs:")) !=3D EOF) switch (c) { case 'D': test->device =3D optarg; @@ -222,6 +232,9 @@ int main(int argc, char **argv) case 'd': test->use_dma =3D true; continue; + case 'B': + test->doorbell =3D true; + continue; case 'h': default: usage: @@ -241,6 +254,7 @@ int main(int argc, char **argv) "\t-w Write buffer test\n" "\t-c Copy buffer test\n" "\t-s Size of buffer {default: 100KB}\n" + "\t-B Doorbell test\n" "\t-h Print this help message\n", argv[0]); return -EINVAL; --=20 2.34.1