From nobody Wed Dec 17 21:41:01 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 03F97205E00 for ; Mon, 16 Dec 2024 11:50:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734349831; cv=none; b=hLNpbH1fqSi49Klk+WQmAQQ63fFm/0nkLKof841GB+YTI/uAOXcIgwUFWkiI+MTdE/1gFv+tMHzAG/kfvUq0+5Fdu3VzYtfy22sQXYOwVDuwBBA7ozbO3yg2PrBUxxX8xCmKxMbgV6iqeIpSt16/AtSc3nWdQflWFwt2TWb23r8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734349831; c=relaxed/simple; bh=IsO+1yLGTY881Y/b2LoIim+/Z+q6QMa4VM1mZ4kn0f8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=B9xcWUa759JaYD0l0nvBjdRa86+ZiW4dUBQVS0UhcGr8la5SXGaSw69qNb5ayR6s7EFKAqzbMuWH8TAzZk14tlFufhoKiNSTKEkUKqoPqa3Y0iBCMOvGAlHUmnT20VMPXz6ol5a29wraUwFr8eRLC8Q3rOOjglZA2IaUh/R/2TY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BE8B6113E; Mon, 16 Dec 2024 03:50:57 -0800 (PST) Received: from e129823.cambridge.arm.com (e129823.arm.com [10.1.197.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A4C153F58B; Mon, 16 Dec 2024 03:50:27 -0800 (PST) From: Yeoreum Yun To: suzuki.poulose@arm.com, mike.leach@linaro.org, james.clark@linaro.org, alexander.shishkin@linux.intel.com, bigeasy@linutronix.de, clrkwllms@kernel.org, rostedt@goodmis.org Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, Yeoreum Yun Subject: [PATCH v3 8/9] coresight-tmc: change tmc_drvdata spinlock's type to raw_spinlock_t Date: Mon, 16 Dec 2024 11:50:05 +0000 Message-Id: <20241216115006.415861-9-yeoreum.yun@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241216115006.415861-1-yeoreum.yun@arm.com> References: <20241216115006.415861-1-yeoreum.yun@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In coresight-tmc drivers, tmc_drvdata->spinlock can be held during __schedule() by perf_event_task_sched_out()/in(). Since tmc_drvdata->spinlock type is spinlock_t and perf_event_task_sched_out()/in() is called after acquiring rq_lock, which is raw_spinlock_t (an unsleepable lock), this poses an issue in PREEMPT_RT kernel where spinlock_t is sleepable. To address this, change type tmc_drvdata->spinlock in coresight-tmc drivers, which can be called by perf_event_task_sched_out()/in(), from spinlock_t to raw_spinlock_t. Signed-off-by: Yeoreum Yun Reviewed-by: Mike Leach --- .../hwtracing/coresight/coresight-tmc-core.c | 6 +-- .../hwtracing/coresight/coresight-tmc-etf.c | 48 +++++++++---------- .../hwtracing/coresight/coresight-tmc-etr.c | 40 ++++++++-------- drivers/hwtracing/coresight/coresight-tmc.h | 2 +- 4 files changed, 48 insertions(+), 48 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index e9876252a789..4e9925300931 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -492,7 +492,7 @@ static int __tmc_probe(struct device *dev, struct resou= rce *res) drvdata->base =3D base; desc.access =3D CSDEV_ACCESS_IOMEM(base); =20 - spin_lock_init(&drvdata->spinlock); + raw_spin_lock_init(&drvdata->spinlock); =20 devid =3D readl_relaxed(drvdata->base + CORESIGHT_DEVID); drvdata->config_type =3D BMVAL(devid, 6, 7); @@ -596,7 +596,7 @@ static void tmc_shutdown(struct amba_device *adev) unsigned long flags; struct tmc_drvdata *drvdata =3D amba_get_drvdata(adev); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_DISABLED) goto out; @@ -610,7 +610,7 @@ static void tmc_shutdown(struct amba_device *adev) * the system is going down after this. */ out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); } =20 static void __tmc_remove(struct device *dev) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtr= acing/coresight/coresight-tmc-etf.c index d4f641cd9de6..fca8e9ffb3cf 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -182,9 +182,9 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_d= evice *csdev) * If we don't have a buffer release the lock and allocate memory. * Otherwise keep the lock and move along. */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (!drvdata->buf) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Allocating the memory here while outside of the spinlock */ buf =3D kzalloc(drvdata->size, GFP_KERNEL); @@ -192,7 +192,7 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_d= evice *csdev) return -ENOMEM; =20 /* Let's try again */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); } =20 if (drvdata->reading) { @@ -235,7 +235,7 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_d= evice *csdev) used =3D false; } out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Free memory outside the spinlock if need be */ if (!used) @@ -253,7 +253,7 @@ static int tmc_enable_etf_sink_perf(struct coresight_de= vice *csdev, void *data) struct perf_output_handle *handle =3D data; struct cs_buffers *buf =3D etm_perf_sink_config(handle); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); do { ret =3D -EINVAL; if (drvdata->reading) @@ -296,7 +296,7 @@ static int tmc_enable_etf_sink_perf(struct coresight_de= vice *csdev, void *data) csdev->refcnt++; } } while (0); - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return ret; } @@ -331,16 +331,16 @@ static int tmc_disable_etf_sink(struct coresight_devi= ce *csdev) unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 csdev->refcnt--; if (csdev->refcnt) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 @@ -351,7 +351,7 @@ static int tmc_disable_etf_sink(struct coresight_device= *csdev) drvdata->pid =3D -1; coresight_set_mode(csdev, CS_MODE_DISABLED); =20 - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 dev_dbg(&csdev->dev, "TMC-ETB/ETF disabled\n"); return 0; @@ -366,9 +366,9 @@ static int tmc_enable_etf_link(struct coresight_device = *csdev, struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); bool first_enable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 @@ -381,7 +381,7 @@ static int tmc_enable_etf_link(struct coresight_device = *csdev, } if (!ret) csdev->refcnt++; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (first_enable) dev_dbg(&csdev->dev, "TMC-ETF enabled\n"); @@ -396,9 +396,9 @@ static void tmc_disable_etf_link(struct coresight_devic= e *csdev, struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); bool last_disable =3D false; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return; } =20 @@ -408,7 +408,7 @@ static void tmc_disable_etf_link(struct coresight_devic= e *csdev, coresight_set_mode(csdev, CS_MODE_DISABLED); last_disable =3D true; } - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (last_disable) dev_dbg(&csdev->dev, "TMC-ETF disabled\n"); @@ -488,7 +488,7 @@ static unsigned long tmc_update_etf_buffer(struct cores= ight_device *csdev, if (WARN_ON_ONCE(coresight_get_mode(csdev) !=3D CS_MODE_PERF)) return 0; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* Don't do anything if another tracer is using this sink */ if (csdev->refcnt !=3D 1) @@ -585,7 +585,7 @@ static unsigned long tmc_update_etf_buffer(struct cores= ight_device *csdev, */ CS_LOCK(drvdata->base); out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return to_read; } @@ -623,7 +623,7 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) drvdata->config_type !=3D TMC_CONFIG_TYPE_ETF)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 if (drvdata->reading) { ret =3D -EBUSY; @@ -655,7 +655,7 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) =20 drvdata->reading =3D true; out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return ret; } @@ -672,14 +672,14 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdat= a) drvdata->config_type !=3D TMC_CONFIG_TYPE_ETF)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* Re-enable the TMC if need be */ if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { /* There is no point in reading a TMC in HW FIFO mode */ mode =3D readl_relaxed(drvdata->base + TMC_MODE); if (mode !=3D TMC_MODE_CIRCULAR_BUFFER) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EINVAL; } /* @@ -693,7 +693,7 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) memset(drvdata->buf, 0, drvdata->size); rc =3D __tmc_etb_enable_hw(drvdata); if (rc) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; } } else { @@ -706,7 +706,7 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) } =20 drvdata->reading =3D false; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* * Free allocated memory outside of the spinlock. There is no need diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtr= acing/coresight/coresight-tmc-etr.c index a48bb85d0e7f..a0a90ce7333e 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1176,10 +1176,10 @@ static struct etr_buf *tmc_etr_get_sysfs_buffer(str= uct coresight_device *csdev) * buffer, provided the size matches. Any allocation has to be done * with the lock released. */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); sysfs_buf =3D READ_ONCE(drvdata->sysfs_buf); if (!sysfs_buf || (sysfs_buf->size !=3D drvdata->size)) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Allocate memory with the locks released */ free_buf =3D new_buf =3D tmc_etr_setup_sysfs_buf(drvdata); @@ -1187,7 +1187,7 @@ static struct etr_buf *tmc_etr_get_sysfs_buffer(struc= t coresight_device *csdev) return new_buf; =20 /* Let's try again */ - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); } =20 if (drvdata->reading || coresight_get_mode(csdev) =3D=3D CS_MODE_PERF) { @@ -1206,7 +1206,7 @@ static struct etr_buf *tmc_etr_get_sysfs_buffer(struc= t coresight_device *csdev) } =20 out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Free memory outside the spinlock if need be */ if (free_buf) @@ -1224,7 +1224,7 @@ static int tmc_enable_etr_sink_sysfs(struct coresight= _device *csdev) if (IS_ERR(sysfs_buf)) return PTR_ERR(sysfs_buf); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* * In sysFS mode we can have multiple writers per sink. Since this @@ -1243,7 +1243,7 @@ static int tmc_enable_etr_sink_sysfs(struct coresight= _device *csdev) } =20 out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 if (!ret) dev_dbg(&csdev->dev, "TMC-ETR enabled\n"); @@ -1562,17 +1562,17 @@ tmc_update_etr_buffer(struct coresight_device *csde= v, struct etr_perf_buffer *etr_perf =3D config; struct etr_buf *etr_buf =3D etr_perf->etr_buf; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* Don't do anything if another tracer is using this sink */ if (csdev->refcnt !=3D 1) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); goto out; } =20 if (WARN_ON(drvdata->perf_buf !=3D etr_buf)) { lost =3D true; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); goto out; } =20 @@ -1582,7 +1582,7 @@ tmc_update_etr_buffer(struct coresight_device *csdev, tmc_sync_etr_buf(drvdata); =20 CS_LOCK(drvdata->base); - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 lost =3D etr_buf->full; offset =3D etr_buf->offset; @@ -1651,7 +1651,7 @@ static int tmc_enable_etr_sink_perf(struct coresight_= device *csdev, void *data) struct perf_output_handle *handle =3D data; struct etr_perf_buffer *etr_perf =3D etm_perf_sink_config(handle); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); /* Don't use this sink if it is already claimed by sysFS */ if (coresight_get_mode(csdev) =3D=3D CS_MODE_SYSFS) { rc =3D -EBUSY; @@ -1691,7 +1691,7 @@ static int tmc_enable_etr_sink_perf(struct coresight_= device *csdev, void *data) } =20 unlock_out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; } =20 @@ -1713,16 +1713,16 @@ static int tmc_disable_etr_sink(struct coresight_de= vice *csdev) unsigned long flags; struct tmc_drvdata *drvdata =3D dev_get_drvdata(csdev->dev.parent); =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 if (drvdata->reading) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 csdev->refcnt--; if (csdev->refcnt) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); return -EBUSY; } =20 @@ -1735,7 +1735,7 @@ static int tmc_disable_etr_sink(struct coresight_devi= ce *csdev) /* Reset perf specific data */ drvdata->perf_buf =3D NULL; =20 - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 dev_dbg(&csdev->dev, "TMC-ETR disabled\n"); return 0; @@ -1762,7 +1762,7 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) if (WARN_ON_ONCE(drvdata->config_type !=3D TMC_CONFIG_TYPE_ETR)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); if (drvdata->reading) { ret =3D -EBUSY; goto out; @@ -1784,7 +1784,7 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) =20 drvdata->reading =3D true; out: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 return ret; } @@ -1798,7 +1798,7 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdat= a) if (WARN_ON_ONCE(drvdata->config_type !=3D TMC_CONFIG_TYPE_ETR)) return -EINVAL; =20 - spin_lock_irqsave(&drvdata->spinlock, flags); + raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 /* RE-enable the TMC if need be */ if (coresight_get_mode(drvdata->csdev) =3D=3D CS_MODE_SYSFS) { @@ -1818,7 +1818,7 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdat= a) } =20 drvdata->reading =3D false; - spin_unlock_irqrestore(&drvdata->spinlock, flags); + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); =20 /* Free allocated memory out side of the spinlock */ if (sysfs_buf) diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracin= g/coresight/coresight-tmc.h index 2671926be62a..60b395025bc4 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -195,7 +195,7 @@ struct tmc_drvdata { void __iomem *base; struct coresight_device *csdev; struct miscdevice miscdev; - spinlock_t spinlock; + raw_spinlock_t spinlock; pid_t pid; bool reading; union { --=20 LEVI:{C3F47F37-75D8-414A-A8BA-3980EC8A46D7}