From nobody Thu Dec 18 15:12:24 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id AE2AB1C3F0E for ; Mon, 16 Dec 2024 04:08:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734322132; cv=none; b=JuO3Z0fyL7Xq8X85K1zNDAiixid6Spoyu4JjHQcdeZahts4D3VbDSID4dC+V2slbf7np973BInuQPCeL7UV+ouwb3Vmte+Kpz1fgBtWip5ajRO12vA95KkMirCD5bNz3wJOa64LEnSop4VeFeNN8+aRFkOo4TX1y6n/bfD+5DJQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734322132; c=relaxed/simple; bh=IUJZIYdttaUlv6hbhzryrA4QhshdOKnDcCZXtcCN+J8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=PshwB9DB4iJbLm2/Jsw8rJqGV1mXvO4ibtREPGWwFiRsTT+898qGQyEfmCEiYyVtliftDTP1HJb1sR++pR8WJDOFu2L9aZstOi7fntQxJDKrJ2LEGFEJDrtUDQqJc05bkFo7c90wuanAWBp4c0N3mdq9yIkLqPS3g6U88Vmv4Wg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4E5741AC1; Sun, 15 Dec 2024 20:09:18 -0800 (PST) Received: from a077893.blr.arm.com (a077893.blr.arm.com [10.162.16.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 4D71E3F58B; Sun, 15 Dec 2024 20:08:46 -0800 (PST) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Anshuman Khandual , Jonathan Corbet , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon , Mark Brown , Mark Rutland , kvmarm@lists.linux.dev Subject: [PATCH V3 2/7] arm64/sysreg: Add register fields for MDSELR_EL1 Date: Mon, 16 Dec 2024 09:38:26 +0530 Message-Id: <20241216040831.2448257-3-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241216040831.2448257-1-anshuman.khandual@arm.com> References: <20241216040831.2448257-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This adds register fields for MDSELR_EL1 as per the definitions based on DDI0601 2024-09. Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Brown Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Mark Brown Signed-off-by: Anshuman Khandual --- arch/arm64/tools/sysreg | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index a6cbe0dcd63b..fe878eb194a0 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -93,6 +93,17 @@ Res0 63:32 Field 31:0 DTRTX EndSysreg =20 +Sysreg MDSELR_EL1 2 0 0 4 2 +Res0 63:6 +Enum 5:4 BANK + 0b00 BANK_0 + 0b01 BANK_1 + 0b10 BANK_2 + 0b11 BANK_3 +EndEnum +Res0 3:0 +EndSysreg + Sysreg OSECCR_EL1 2 0 0 6 2 Res0 63:32 Field 31:0 EDECCR --=20 2.25.1