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Fri, 13 Dec 2024 03:42:44 -0800 (PST) From: Xu Lu To: tjeznach@rivosinc.com, joro@8bytes.org, will@kernel.org Cc: lihangjing@bytedance.com, xieyongji@bytedance.com, guojinhui.liam@bytedance.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Xu Lu Subject: [PATCH 1/2] iommu/riscv: Empty iommu queue before enabling it Date: Fri, 13 Dec 2024 19:42:32 +0800 Message-Id: <20241213114233.12388-2-luxu.kernel@bytedance.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20241213114233.12388-1-luxu.kernel@bytedance.com> References: <20241213114233.12388-1-luxu.kernel@bytedance.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Changing cqen/fqen/pqen from 0 to 1 sets the cqh/fqt/pqt registers to 0. But the cqt/fqh/pqh registers are left unmodified. This commit resets cqt/fqh/pqh registers to ensure corresponding queues are empty before being enabled during initialization. Signed-off-by: Xu Lu --- drivers/iommu/riscv/iommu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c index 8a05def774bd..84806724f568 100644 --- a/drivers/iommu/riscv/iommu.c +++ b/drivers/iommu/riscv/iommu.c @@ -240,6 +240,12 @@ static int riscv_iommu_queue_enable(struct riscv_iommu= _device *iommu, return rc; } =20 + /* Empty queue before enabling it */ + if (queue->qid =3D=3D RISCV_IOMMU_INTR_CQ) + riscv_iommu_writel(queue->iommu, Q_TAIL(queue), 0); + else + riscv_iommu_writel(queue->iommu, Q_HEAD(queue), 0); + /* * Enable queue with interrupts, clear any memory fault if any. * Wait for the hardware to acknowledge request and activate queue --=20 2.20.1 From nobody Sun Feb 8 17:01:07 2026 Received: from mail-pf1-f182.google.com (mail-pf1-f182.google.com [209.85.210.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D2A381DF279 for ; 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Fri, 13 Dec 2024 03:42:48 -0800 (PST) Received: from J9GPGXL7NT.bytedance.net ([61.213.176.56]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7fd4b961f1asm8666340a12.30.2024.12.13.03.42.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 13 Dec 2024 03:42:47 -0800 (PST) From: Xu Lu To: tjeznach@rivosinc.com, joro@8bytes.org, will@kernel.org Cc: lihangjing@bytedance.com, xieyongji@bytedance.com, guojinhui.liam@bytedance.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Xu Lu Subject: [PATCH 2/2] iommu/riscv: Add shutdown function for iommu driver Date: Fri, 13 Dec 2024 19:42:33 +0800 Message-Id: <20241213114233.12388-3-luxu.kernel@bytedance.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20241213114233.12388-1-luxu.kernel@bytedance.com> References: <20241213114233.12388-1-luxu.kernel@bytedance.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This commit supplies shutdown callback for iommu pmu driver. The shutdown callback resets necessary registers so that newly booted kernel can pass riscv_iommu_init_check() after kexec. Also, the shutdown callback resets iommu mode to bare instead of off so that new kernel can still use PCIE devices even when CONFIG_RISCV_IOMMU is not enabled. Signed-off-by: Xu Lu --- drivers/iommu/riscv/iommu-pci.c | 8 ++++++++ drivers/iommu/riscv/iommu-platform.c | 6 ++++++ drivers/iommu/riscv/iommu.c | 6 ++++-- drivers/iommu/riscv/iommu.h | 1 + 4 files changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/riscv/iommu-pci.c b/drivers/iommu/riscv/iommu-pc= i.c index c7a89143014c..d82d2b00904c 100644 --- a/drivers/iommu/riscv/iommu-pci.c +++ b/drivers/iommu/riscv/iommu-pci.c @@ -101,6 +101,13 @@ static void riscv_iommu_pci_remove(struct pci_dev *pde= v) riscv_iommu_remove(iommu); } =20 +static void riscv_iommu_pci_shutdown(struct pci_dev *pdev) +{ + struct riscv_iommu_device *iommu =3D dev_get_drvdata(&pdev->dev); + + riscv_iommu_disable(iommu); +} + static const struct pci_device_id riscv_iommu_pci_tbl[] =3D { {PCI_VDEVICE(REDHAT, PCI_DEVICE_ID_REDHAT_RISCV_IOMMU), 0}, {PCI_VDEVICE(RIVOS, PCI_DEVICE_ID_RIVOS_RISCV_IOMMU_GA), 0}, @@ -112,6 +119,7 @@ static struct pci_driver riscv_iommu_pci_driver =3D { .id_table =3D riscv_iommu_pci_tbl, .probe =3D riscv_iommu_pci_probe, .remove =3D riscv_iommu_pci_remove, + .shutdown =3D riscv_iommu_pci_shutdown, .driver =3D { .suppress_bind_attrs =3D true, }, diff --git a/drivers/iommu/riscv/iommu-platform.c b/drivers/iommu/riscv/iom= mu-platform.c index 382ba2841849..62c40b99cf62 100644 --- a/drivers/iommu/riscv/iommu-platform.c +++ b/drivers/iommu/riscv/iommu-platform.c @@ -74,6 +74,11 @@ static void riscv_iommu_platform_remove(struct platform_= device *pdev) riscv_iommu_remove(dev_get_drvdata(&pdev->dev)); }; =20 +static void riscv_iommu_platform_shutdown(struct platform_device *pdev) +{ + riscv_iommu_disable(dev_get_drvdata(&pdev->dev)); +}; + static const struct of_device_id riscv_iommu_of_match[] =3D { {.compatible =3D "riscv,iommu",}, {}, @@ -82,6 +87,7 @@ static const struct of_device_id riscv_iommu_of_match[] = =3D { static struct platform_driver riscv_iommu_platform_driver =3D { .probe =3D riscv_iommu_platform_probe, .remove =3D riscv_iommu_platform_remove, + .shutdown =3D riscv_iommu_platform_shutdown, .driver =3D { .name =3D "riscv,iommu", .of_match_table =3D riscv_iommu_of_match, diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c index 84806724f568..670b4302aca8 100644 --- a/drivers/iommu/riscv/iommu.c +++ b/drivers/iommu/riscv/iommu.c @@ -651,9 +651,11 @@ static struct riscv_iommu_dc *riscv_iommu_get_dc(struc= t riscv_iommu_device *iomm * This is best effort IOMMU translation shutdown flow. * Disable IOMMU without waiting for hardware response. */ -static void riscv_iommu_disable(struct riscv_iommu_device *iommu) +void riscv_iommu_disable(struct riscv_iommu_device *iommu) { - riscv_iommu_writeq(iommu, RISCV_IOMMU_REG_DDTP, 0); + riscv_iommu_writeq(iommu, RISCV_IOMMU_REG_DDTP, + FIELD_PREP(RISCV_IOMMU_DDTP_IOMMU_MODE, + RISCV_IOMMU_DDTP_IOMMU_MODE_BARE)); riscv_iommu_writel(iommu, RISCV_IOMMU_REG_CQCSR, 0); riscv_iommu_writel(iommu, RISCV_IOMMU_REG_FQCSR, 0); riscv_iommu_writel(iommu, RISCV_IOMMU_REG_PQCSR, 0); diff --git a/drivers/iommu/riscv/iommu.h b/drivers/iommu/riscv/iommu.h index b1c4664542b4..46df79dd5495 100644 --- a/drivers/iommu/riscv/iommu.h +++ b/drivers/iommu/riscv/iommu.h @@ -64,6 +64,7 @@ struct riscv_iommu_device { =20 int riscv_iommu_init(struct riscv_iommu_device *iommu); void riscv_iommu_remove(struct riscv_iommu_device *iommu); +void riscv_iommu_disable(struct riscv_iommu_device *iommu); =20 #define riscv_iommu_readl(iommu, addr) \ readl_relaxed((iommu)->reg + (addr)) --=20 2.20.1