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AJvYcCUSd4YftSjS67rid6T+DERTucMrom7rsNmibMhfDWmnHFqh1eZDokMY80MojijnERs6cx8U7FjWyzXRbvU=@vger.kernel.org X-Gm-Message-State: AOJu0YzhZMrV7H+Jzpp+BT1gIR/mANwt+ffKhKdbeSgnOWP0rf97L3cj tPNW9YC7PU0/YuZWWfuAd3QZdnJECI+XP9AAdgkuRK+oI9+Y+rrVbtGPEFlTz7RM0OhqDZeQJHL n0AvVd5JrsQ== X-Google-Smtp-Source: AGHT+IHoAtLMCXcx0pNbqpLg+273hrX6BxpTnA/fbV1HglY7lURxrvsoWLSyAcKravbhVxC4p30yvMPx2T2q2A== X-Received: from wmbay15.prod.google.com ([2002:a05:600c:1e0f:b0:434:ff52:1c7]) (user=smostafa job=prod-delivery.src-stubby-dispatcher) by 2002:a05:600c:5127:b0:434:fddf:5c0a with SMTP id 5b1f17b1804b1-4361c344c70mr73849075e9.3.1734026769635; Thu, 12 Dec 2024 10:06:09 -0800 (PST) Date: Thu, 12 Dec 2024 18:04:05 +0000 In-Reply-To: <20241212180423.1578358-1-smostafa@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20241212180423.1578358-1-smostafa@google.com> X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog Message-ID: <20241212180423.1578358-42-smostafa@google.com> Subject: [RFC PATCH v2 41/58] KVM: arm64: smmu-v3: Add DABT handler From: Mostafa Saleh To: iommu@lists.linux.dev, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, robdclark@gmail.com, joro@8bytes.org, robin.murphy@arm.com, jean-philippe@linaro.org, jgg@ziepe.ca, nicolinc@nvidia.com, vdonnefort@google.com, qperret@google.com, tabba@google.com, danielmentz@google.com, tzukui@google.com, Mostafa Saleh Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a data abort handler for the SMMUv3, we allow access for ETVQ and GERROR for debug purpose. Signed-off-by: Mostafa Saleh --- arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c | 58 +++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c b/arch/arm64/kvm/h= yp/nvhe/iommu/arm-smmu-v3.c index 1821a3420a4d..2a99873d980f 100644 --- a/arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c +++ b/arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c @@ -13,6 +13,7 @@ #include #include #include +#include =20 #define ARM_SMMU_POLL_TIMEOUT_US 100000 /* 100ms arbitrary timeout */ =20 @@ -1269,6 +1270,62 @@ static phys_addr_t smmu_iova_to_phys(struct kvm_hyp_= iommu_domain *domain, return paddr; } =20 +static bool smmu_dabt_device(struct hyp_arm_smmu_v3_device *smmu, + struct kvm_cpu_context *host_ctxt, + u64 esr, u32 off) +{ + bool is_write =3D esr & ESR_ELx_WNR; + unsigned int len =3D BIT((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT); + int rd =3D (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT; + const u32 no_access =3D 0; + const u32 read_write =3D (u32)(-1); + const u32 read_only =3D is_write ? no_access : read_write; + u32 mask =3D no_access; + + /* + * Only handle MMIO access with u32 size and alignment. + * We don't need to change 64-bit registers for now. + */ + if ((len !=3D sizeof(u32)) || (off & (sizeof(u32) - 1))) + return false; + + switch (off) { + case ARM_SMMU_EVTQ_PROD + SZ_64K: + mask =3D read_write; + break; + case ARM_SMMU_EVTQ_CONS + SZ_64K: + mask =3D read_write; + break; + case ARM_SMMU_GERROR: + mask =3D read_only; + break; + case ARM_SMMU_GERRORN: + mask =3D read_write; + break; + }; + + if (!mask) + return false; + if (is_write) + writel_relaxed(cpu_reg(host_ctxt, rd) & mask, smmu->base + off); + else + cpu_reg(host_ctxt, rd) =3D readl_relaxed(smmu->base + off); + + return true; +} + +static bool smmu_dabt_handler(struct kvm_cpu_context *host_ctxt, u64 esr, = u64 addr) +{ + struct hyp_arm_smmu_v3_device *smmu; + + for_each_smmu(smmu) { + if (addr < smmu->mmio_addr || addr >=3D smmu->mmio_addr + smmu->mmio_siz= e) + continue; + return smmu_dabt_device(smmu, host_ctxt, esr, addr - smmu->mmio_addr); + } + return false; +} + /* Shared with the kernel driver in EL1 */ struct kvm_iommu_ops smmu_ops =3D { .init =3D smmu_init, @@ -1281,4 +1338,5 @@ struct kvm_iommu_ops smmu_ops =3D { .map_pages =3D smmu_map_pages, .unmap_pages =3D smmu_unmap_pages, .iova_to_phys =3D smmu_iova_to_phys, + .dabt_handler =3D smmu_dabt_handler, }; --=20 2.47.0.338.g60cca15819-goog