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AJvYcCUUyPyc0gzFVEKtLU0aCkX7Kzeyo4gM4YNa8NZOiKkmFN3B4OinF2uPBz+IVI/pQKydcfNh4HEmxG9bNVI=@vger.kernel.org X-Gm-Message-State: AOJu0YykEOc1jYvRsmUfEsnh04gsCmg1En3kT0jnXYHYn8UyAKSxV79q 2GAYolBC3DfvDl1sXAKmM/MMoV14xa3wXCVplpm2nzWqDBTtfHlZvUVOIvrbNEoET0wMCMPZe4+ bWptJNSZUVg== X-Google-Smtp-Source: AGHT+IFPvic4v0yXTXsiiS55qmyvRxNfbGXACyTICF0QYMQMm//s6fh52UUXvcsaAQ5ADTdRambhNe92sr/RSw== X-Received: from wmol7.prod.google.com ([2002:a05:600c:47c7:b0:434:a471:130f]) (user=smostafa job=prod-delivery.src-stubby-dispatcher) by 2002:a05:600c:35cb:b0:434:f9ad:7238 with SMTP id 5b1f17b1804b1-4362286391fmr34351085e9.22.1734026754968; Thu, 12 Dec 2024 10:05:54 -0800 (PST) Date: Thu, 12 Dec 2024 18:03:58 +0000 In-Reply-To: <20241212180423.1578358-1-smostafa@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20241212180423.1578358-1-smostafa@google.com> X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog Message-ID: <20241212180423.1578358-35-smostafa@google.com> Subject: [RFC PATCH v2 34/58] KVM: arm64: smmu-v3: Add context descriptor functions From: Mostafa Saleh To: iommu@lists.linux.dev, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, robdclark@gmail.com, joro@8bytes.org, robin.murphy@arm.com, jean-philippe@linaro.org, jgg@ziepe.ca, nicolinc@nvidia.com, vdonnefort@google.com, qperret@google.com, tabba@google.com, danielmentz@google.com, tzukui@google.com, Mostafa Saleh Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add functions to allocate and access context descriptors that would be used in stage-1 attach. Signed-off-by: Mostafa Saleh --- arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c | 53 +++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c b/arch/arm64/kvm/h= yp/nvhe/iommu/arm-smmu-v3.c index 5f00d5cdf5bc..d58424e45e1d 100644 --- a/arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c +++ b/arch/arm64/kvm/hyp/nvhe/iommu/arm-smmu-v3.c @@ -215,6 +215,19 @@ static int smmu_sync_ste(struct hyp_arm_smmu_v3_device= *smmu, u32 sid) return smmu_send_cmd(smmu, &cmd); } =20 +__maybe_unused +static int smmu_sync_cd(struct hyp_arm_smmu_v3_device *smmu, u32 sid, u32 = ssid) +{ + struct arm_smmu_cmdq_ent cmd =3D { + .opcode =3D CMDQ_OP_CFGI_CD, + .cfgi.sid =3D sid, + .cfgi.ssid =3D ssid, + .cfgi.leaf =3D true, + }; + + return smmu_send_cmd(smmu, &cmd); +} + static int smmu_alloc_l2_strtab(struct hyp_arm_smmu_v3_device *smmu, u32 s= id) { struct arm_smmu_strtab_cfg *cfg =3D &smmu->strtab_cfg; @@ -291,6 +304,46 @@ smmu_get_alloc_ste_ptr(struct hyp_arm_smmu_v3_device *= smmu, u32 sid) return smmu_get_ste_ptr(smmu, sid); } =20 +__maybe_unused +static u64 *smmu_get_cd_ptr(u64 *cdtab, u32 ssid) +{ + /* Only linear supported for now. */ + return cdtab + ssid * CTXDESC_CD_DWORDS; +} + +__maybe_unused +static u64 *smmu_alloc_cd(struct hyp_arm_smmu_v3_device *smmu, u32 pasid_b= its) +{ + u64 *cd_table; + int flags =3D 0; + u32 requested_order =3D get_order((1 << pasid_bits) * + (CTXDESC_CD_DWORDS << 3)); + + /* + * We support max of 64K linear tables only, this should be enough + * for 128 pasids + */ + if (WARN_ON(requested_order > 4)) + return NULL; + + if (!(smmu->features & ARM_SMMU_FEAT_COHERENCY)) + flags |=3D IOMMU_PAGE_NOCACHE; + + cd_table =3D kvm_iommu_donate_pages(requested_order, flags); + if (!cd_table) + return NULL; + return (u64 *)hyp_virt_to_phys(cd_table); +} + +__maybe_unused +static void smmu_free_cd(u64 *cd_table, u32 pasid_bits) +{ + u32 order =3D get_order((1 << pasid_bits) * + (CTXDESC_CD_DWORDS << 3)); + + kvm_iommu_reclaim_pages(cd_table, order); +} + static int smmu_init_registers(struct hyp_arm_smmu_v3_device *smmu) { u64 val, old; --=20 2.47.0.338.g60cca15819-goog