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AJvYcCWedtIOPiaKabg9EVcaRZ8FPfOJngy3gBB49dPd9pQzZeZRXRoUMEw/6gloJh4FZEtNhrPDALrIpfw+Pg0=@vger.kernel.org X-Gm-Message-State: AOJu0Yy6im/HFHmCuGgayP5ojdn7+qHNW875LCwYtoBfR7fyCYNuBt7+ CalRJO7hZkcuuL80LZxgfFaut0Eo/v36rF/CeCVw7jYsje+iOqXZCtGbDWo+/NQpdQDuHp3sOkA ZttnqdrVZSg== X-Google-Smtp-Source: AGHT+IGxFKclHRVEq5ycO+SmEmjwkOwSKayY3zd4xYSx9lryA9h551F87hCr0p5MkmL1i0ozD721MEZuLPSrCg== X-Received: from wmgg28.prod.google.com ([2002:a05:600d:1c:b0:434:f847:ba1b]) (user=smostafa job=prod-delivery.src-stubby-dispatcher) by 2002:a05:600c:468b:b0:431:54d9:da57 with SMTP id 5b1f17b1804b1-4361c41811cmr73715735e9.30.1734026748472; Thu, 12 Dec 2024 10:05:48 -0800 (PST) Date: Thu, 12 Dec 2024 18:03:55 +0000 In-Reply-To: <20241212180423.1578358-1-smostafa@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20241212180423.1578358-1-smostafa@google.com> X-Mailer: git-send-email 2.47.1.613.gc27f4b7a9f-goog Message-ID: <20241212180423.1578358-32-smostafa@google.com> Subject: [RFC PATCH v2 31/58] KVM: arm64: smmu-v3: Support io-pgtable From: Mostafa Saleh To: iommu@lists.linux.dev, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, robdclark@gmail.com, joro@8bytes.org, robin.murphy@arm.com, jean-philippe@linaro.org, jgg@ziepe.ca, nicolinc@nvidia.com, vdonnefort@google.com, qperret@google.com, tabba@google.com, danielmentz@google.com, tzukui@google.com, Mostafa Saleh Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Implement the hypervisor version of io-pgtable allocation functions, mirroring drivers/iommu/io-pgtable-arm.c. Page allocation uses the IOMMU pool filled by the host. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Mostafa Saleh --- arch/arm64/kvm/hyp/nvhe/Makefile | 2 + .../arm64/kvm/hyp/nvhe/iommu/io-pgtable-arm.c | 153 ++++++++++++++++++ include/linux/io-pgtable-arm.h | 11 ++ 3 files changed, 166 insertions(+) create mode 100644 arch/arm64/kvm/hyp/nvhe/iommu/io-pgtable-arm.c diff --git a/arch/arm64/kvm/hyp/nvhe/Makefile b/arch/arm64/kvm/hyp/nvhe/Mak= efile index edfd8a11ac90..e4f662b1447f 100644 --- a/arch/arm64/kvm/hyp/nvhe/Makefile +++ b/arch/arm64/kvm/hyp/nvhe/Makefile @@ -17,6 +17,8 @@ hyp-obj-$(CONFIG_MODULES) +=3D modules.o hyp-obj-y +=3D $(lib-objs) =20 hyp-obj-$(CONFIG_ARM_SMMU_V3_PKVM) +=3D iommu/arm-smmu-v3.o +hyp-obj-$(CONFIG_ARM_SMMU_V3_PKVM) +=3D iommu/io-pgtable-arm.o \ + ../../../../../drivers/iommu/io-pgtable-arm-common.o =20 $(obj)/hyp.lds: $(src)/hyp.lds.S FORCE $(call if_changed_dep,cpp_lds_S) diff --git a/arch/arm64/kvm/hyp/nvhe/iommu/io-pgtable-arm.c b/arch/arm64/kv= m/hyp/nvhe/iommu/io-pgtable-arm.c new file mode 100644 index 000000000000..aa5bf7c0ed03 --- /dev/null +++ b/arch/arm64/kvm/hyp/nvhe/iommu/io-pgtable-arm.c @@ -0,0 +1,153 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022 Arm Ltd. + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +int arm_lpae_map_exists(void) +{ + return -EEXIST; +} + +int arm_lpae_unmap_empty(void) +{ + return -EEXIST; +} + +void *__arm_lpae_alloc_pages(size_t size, gfp_t gfp, + struct io_pgtable_cfg *cfg, void *cookie) +{ + void *addr; + + if (!PAGE_ALIGNED(size)) + return NULL; + + addr =3D kvm_iommu_donate_pages(get_order(size), 0); + + if (addr && !cfg->coherent_walk) + kvm_flush_dcache_to_poc(addr, size); + + return addr; +} + +void __arm_lpae_free_pages(void *addr, size_t size, struct io_pgtable_cfg = *cfg, + void *cookie) +{ + u8 order; + + /* + * It's guaranteed all allocations are aligned, but core code + * might free PGD with it's actual size. + */ + order =3D get_order(PAGE_ALIGN(size)); + + if (!cfg->coherent_walk) + kvm_flush_dcache_to_poc(addr, size); + + kvm_iommu_reclaim_pages(addr, order); +} + +void __arm_lpae_sync_pte(arm_lpae_iopte *ptep, int num_entries, + struct io_pgtable_cfg *cfg) +{ + if (!cfg->coherent_walk) + kvm_flush_dcache_to_poc(ptep, sizeof(*ptep) * num_entries); +} + +static int kvm_arm_io_pgtable_init(struct io_pgtable_cfg *cfg, + struct arm_lpae_io_pgtable *data) +{ + int ret =3D -EINVAL; + + if (cfg->fmt =3D=3D ARM_64_LPAE_S2) + ret =3D arm_lpae_init_pgtable_s2(cfg, data); + else if (cfg->fmt =3D=3D ARM_64_LPAE_S1) + ret =3D arm_lpae_init_pgtable_s1(cfg, data); + + if (ret) + return ret; + + data->iop.cfg =3D *cfg; + data->iop.fmt =3D cfg->fmt; + + return 0; +} + +struct io_pgtable *kvm_arm_io_pgtable_alloc(struct io_pgtable_cfg *cfg, + void *cookie, + int *out_ret) +{ + size_t pgd_size, alignment; + struct arm_lpae_io_pgtable *data; + int ret; + + data =3D hyp_alloc(sizeof(*data)); + if (!data) { + *out_ret =3D hyp_alloc_errno(); + return NULL; + } + + ret =3D kvm_arm_io_pgtable_init(cfg, data); + if (ret) + goto out_free; + + pgd_size =3D PAGE_ALIGN(ARM_LPAE_PGD_SIZE(data)); + data->pgd =3D __arm_lpae_alloc_pages(pgd_size, 0, &data->iop.cfg, cookie); + if (!data->pgd) { + ret =3D -ENOMEM; + goto out_free; + } + /* + * If it has eight or more entries, the table must be aligned on + * its size. Otherwise 64 bytes. + */ + alignment =3D max(pgd_size, 8 * sizeof(arm_lpae_iopte)); + if (!IS_ALIGNED(hyp_virt_to_phys(data->pgd), alignment)) { + __arm_lpae_free_pages(data->pgd, pgd_size, + &data->iop.cfg, cookie); + ret =3D -EINVAL; + goto out_free; + } + + data->iop.cookie =3D cookie; + if (cfg->fmt =3D=3D ARM_64_LPAE_S2) + data->iop.cfg.arm_lpae_s2_cfg.vttbr =3D __arm_lpae_virt_to_phys(data->pg= d); + else if (cfg->fmt =3D=3D ARM_64_LPAE_S1) + data->iop.cfg.arm_lpae_s1_cfg.ttbr =3D __arm_lpae_virt_to_phys(data->pgd= ); + + if (!data->iop.cfg.coherent_walk) + kvm_flush_dcache_to_poc(data->pgd, pgd_size); + + /* Ensure the empty pgd is visible before any actual TTBR write */ + wmb(); + + *out_ret =3D 0; + return &data->iop; +out_free: + hyp_free(data); + *out_ret =3D ret; + return NULL; +} + +int kvm_arm_io_pgtable_free(struct io_pgtable *iopt) +{ + struct arm_lpae_io_pgtable *data =3D io_pgtable_to_data(iopt); + size_t pgd_size =3D ARM_LPAE_PGD_SIZE(data); + + if (!data->iop.cfg.coherent_walk) + kvm_flush_dcache_to_poc(data->pgd, pgd_size); + + io_pgtable_tlb_flush_all(iopt); + __arm_lpae_free_pgtable(data, data->start_level, data->pgd); + hyp_free(data); + return 0; +} diff --git a/include/linux/io-pgtable-arm.h b/include/linux/io-pgtable-arm.h index 337e9254fdbd..88922314157d 100644 --- a/include/linux/io-pgtable-arm.h +++ b/include/linux/io-pgtable-arm.h @@ -191,8 +191,19 @@ static inline bool iopte_table(arm_lpae_iopte pte, int= lvl) return iopte_type(pte) =3D=3D ARM_LPAE_PTE_TYPE_TABLE; } =20 +#ifdef __KVM_NVHE_HYPERVISOR__ +#include +#define __arm_lpae_virt_to_phys hyp_virt_to_phys +#define __arm_lpae_phys_to_virt hyp_phys_to_virt + +struct io_pgtable *kvm_arm_io_pgtable_alloc(struct io_pgtable_cfg *cfg, + void *cookie, + int *out_ret); +int kvm_arm_io_pgtable_free(struct io_pgtable *iop); +#else #define __arm_lpae_virt_to_phys __pa #define __arm_lpae_phys_to_virt __va +#endif =20 /* Generic functions */ void __arm_lpae_free_pgtable(struct arm_lpae_io_pgtable *data, int lvl, --=20 2.47.0.338.g60cca15819-goog