From nobody Wed Dec 17 14:31:31 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 587D5226524; Thu, 12 Dec 2024 15:59:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734019144; cv=none; b=r+k8nV03kCZz66qc6mUsbtQZoQGIQY6RYbHWaViHH76RcDXCYcco35dm4ddpySdu30bw8azScNbn0nDTCxN0lZpCczoChjRc7Cnw4JtCu4lmJfbvgsVqJl939ncObm07EYE3lD0aCiZvf6lhdzVc2ljWBHKftoS3kp0u5a7lBxE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734019144; c=relaxed/simple; bh=UNKkMZn/x8SckETq5/GSuqmklWCThCFYnmLDOazUKCM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=N333gD98R+kiUxOX82oth7hcMRn4t/+USO9Y1uQY1I4xNNIqbig4aIHott2fOsKRXH0XshbNf7gprBliBGutYM6nIOdT6MqbDGWk2EaQLHsYY3u34ZL5RDbBXdvSAifAfJRxyGDhsxhzki+3R+oLmOyy6r/suUsiwJ4ygPCwXRc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0620B176C; Thu, 12 Dec 2024 07:59:31 -0800 (PST) Received: from e122027.cambridge.arm.com (e122027.cambridge.arm.com [10.1.39.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7FC593F720; Thu, 12 Dec 2024 07:58:59 -0800 (PST) From: Steven Price To: kvm@vger.kernel.org, kvmarm@lists.linux.dev Cc: Jean-Philippe Brucker , Catalin Marinas , Marc Zyngier , Will Deacon , James Morse , Oliver Upton , Suzuki K Poulose , Zenghui Yu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev, Ganapatrao Kulkarni , Gavin Shan , Shanker Donthineni , Alper Gun , "Aneesh Kumar K . V" , Steven Price Subject: [PATCH v6 38/43] arm64: RME: Configure max SVE vector length for a Realm Date: Thu, 12 Dec 2024 15:56:03 +0000 Message-ID: <20241212155610.76522-39-steven.price@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241212155610.76522-1-steven.price@arm.com> References: <20241212155610.76522-1-steven.price@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jean-Philippe Brucker Obtain the max vector length configured by userspace on the vCPUs, and write it into the Realm parameters. By default the vCPU is configured with the max vector length reported by RMM, and userspace can reduce it with a write to KVM_REG_ARM64_SVE_VLS. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Steven Price --- arch/arm64/kvm/guest.c | 3 ++- arch/arm64/kvm/rme.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index 429c8f10b76a..5562029368c5 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -363,7 +363,7 @@ static int set_sve_vls(struct kvm_vcpu *vcpu, const str= uct kvm_one_reg *reg) if (!vcpu_has_sve(vcpu)) return -ENOENT; =20 - if (kvm_arm_vcpu_sve_finalized(vcpu)) + if (kvm_arm_vcpu_sve_finalized(vcpu) || kvm_realm_is_created(vcpu->kvm)) return -EPERM; /* too late! */ =20 if (WARN_ON(vcpu->arch.sve_state)) @@ -825,6 +825,7 @@ static bool validate_realm_set_reg(struct kvm_vcpu *vcp= u, switch (reg->id) { case KVM_REG_ARM_PMCR_EL0: case KVM_REG_ARM_ID_AA64DFR0_EL1: + case KVM_REG_ARM64_SVE_VLS: return true; } } diff --git a/arch/arm64/kvm/rme.c b/arch/arm64/kvm/rme.c index 39dbc19e4a42..3116ecee37a8 100644 --- a/arch/arm64/kvm/rme.c +++ b/arch/arm64/kvm/rme.c @@ -297,6 +297,44 @@ static void realm_unmap_shared_range(struct kvm *kvm, } } =20 +static int realm_init_sve_param(struct kvm *kvm, struct realm_params *para= ms) +{ + int ret =3D 0; + unsigned long i; + struct kvm_vcpu *vcpu; + int max_vl, realm_max_vl =3D -1; + + /* + * Get the preferred SVE configuration, set by userspace with the + * KVM_ARM_VCPU_SVE feature and KVM_REG_ARM64_SVE_VLS pseudo-register. + */ + kvm_for_each_vcpu(i, vcpu, kvm) { + mutex_lock(&vcpu->mutex); + if (vcpu_has_sve(vcpu)) { + if (!kvm_arm_vcpu_sve_finalized(vcpu)) + ret =3D -EINVAL; + max_vl =3D vcpu->arch.sve_max_vl; + } else { + max_vl =3D 0; + } + mutex_unlock(&vcpu->mutex); + if (ret) + return ret; + + /* We need all vCPUs to have the same SVE config */ + if (realm_max_vl >=3D 0 && realm_max_vl !=3D max_vl) + return -EINVAL; + + realm_max_vl =3D max_vl; + } + + if (realm_max_vl > 0) { + params->sve_vl =3D sve_vq_from_vl(realm_max_vl) - 1; + params->flags |=3D RMI_REALM_PARAM_FLAG_SVE; + } + return 0; +} + static int realm_create_rd(struct kvm *kvm) { struct realm *realm =3D &kvm->arch.realm; @@ -344,6 +382,10 @@ static int realm_create_rd(struct kvm *kvm) params->flags |=3D RMI_REALM_PARAM_FLAG_PMU; } =20 + r =3D realm_init_sve_param(kvm, params); + if (r) + goto out_undelegate_tables; + params_phys =3D virt_to_phys(params); =20 if (rmi_realm_create(rd_phys, params_phys)) { --=20 2.43.0