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Thu, 12 Dec 2024 05:08:45 -0800 (PST) From: Stephan Gerhold Date: Thu, 12 Dec 2024 14:08:24 +0100 Subject: [PATCH 2/3] arm64: dts: qcom: x1e80100-qcp: Add FSUSB42 USB switches Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-x1e80100-qcp-dp-v1-2-37cb362a0dfe@linaro.org> References: <20241212-x1e80100-qcp-dp-v1-0-37cb362a0dfe@linaro.org> In-Reply-To: <20241212-x1e80100-qcp-dp-v1-0-37cb362a0dfe@linaro.org> To: Greg Kroah-Hartman , Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Abel Vesa , Johan Hovold X-Mailer: b4 0.14.2 Unlike most X1E boards, the QCP does not have Parade PS8830 retimers on the three USB-C ports. Instead, there are FSUSB42 USB switches for each port that handle orientation switching for the SBU lines. The overall setup is similar to the gpio-sbu-mux defined for sc8280xp-crd and the ThinkPad X13s. Co-developed-by: Abel Vesa Signed-off-by: Abel Vesa Signed-off-by: Stephan Gerhold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 154 ++++++++++++++++++++++++++= ++++ 1 file changed, 154 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dt= s/qcom/x1e80100-qcp.dts index 5ef030c60abe2998d093ee60a6754a90cd5aaf72..cc0561debdb0b5c89f5d7f298d3= 4f1feaf183b61 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts @@ -84,6 +84,14 @@ pmic_glink_ss0_ss_in: endpoint { remote-endpoint =3D <&usb_1_ss0_qmpphy_out>; }; }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss0_sbu: endpoint { + remote-endpoint =3D <&usb_1_ss0_sbu_mux>; + }; + }; }; }; =20 @@ -112,6 +120,14 @@ pmic_glink_ss1_ss_in: endpoint { remote-endpoint =3D <&usb_1_ss1_qmpphy_out>; }; }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss1_sbu: endpoint { + remote-endpoint =3D <&usb_1_ss1_sbu_mux>; + }; + }; }; }; =20 @@ -140,6 +156,14 @@ pmic_glink_ss2_ss_in: endpoint { remote-endpoint =3D <&usb_1_ss2_qmpphy_out>; }; }; + + port@2 { + reg =3D <2>; + + pmic_glink_ss2_sbu: endpoint { + remote-endpoint =3D <&usb_1_ss2_sbu_mux>; + }; + }; }; }; }; @@ -256,6 +280,63 @@ vreg_nvme: regulator-nvme { =20 regulator-boot-on; }; + + usb-1-ss0-sbu-mux { + compatible =3D "onnn,fsusb42", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 168 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 167 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb_1_ss0_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb_1_ss0_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_ss0_sbu>; + }; + }; + }; + + usb-1-ss1-sbu-mux { + compatible =3D "onnn,fsusb42", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 179 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 178 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb_1_ss1_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb_1_ss1_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_ss1_sbu>; + }; + }; + }; + + usb-1-ss2-sbu-mux { + compatible =3D "onnn,fsusb42", "gpio-sbu-mux"; + + enable-gpios =3D <&tlmm 171 GPIO_ACTIVE_LOW>; + select-gpios =3D <&tlmm 170 GPIO_ACTIVE_HIGH>; + + pinctrl-0 =3D <&usb_1_ss2_sbu_default>; + pinctrl-names =3D "default"; + + mode-switch; + orientation-switch; + + port { + usb_1_ss2_sbu_mux: endpoint { + remote-endpoint =3D <&pmic_glink_ss2_sbu>; + }; + }; + }; }; =20 &apps_rsc { @@ -872,6 +953,79 @@ wake-n-pins { }; }; =20 + usb_1_ss0_sbu_default: usb-1-ss0-sbu-state { + mode-pins { + pins =3D "gpio166"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + output-high; + }; + + oe-n-pins { + pins =3D "gpio168"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + sel-pins { + pins =3D "gpio167"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + }; + + usb_1_ss1_sbu_default: usb-1-ss1-sbu-state { + mode-pins { + pins =3D "gpio177"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + output-high; + }; + + oe-n-pins { + pins =3D "gpio179"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + sel-pins { + pins =3D "gpio178"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + }; + + usb_1_ss2_sbu_default: usb-1-ss2-sbu-state { + mode-pins { + pins =3D "gpio169"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + output-high; + }; + + oe-n-pins { + pins =3D "gpio171"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + + sel-pins { + pins =3D "gpio170"; + function =3D "gpio"; + bias-disable; + drive-strength =3D <2>; + }; + }; + wcd_default: wcd-reset-n-active-state { pins =3D "gpio191"; function =3D "gpio"; --=20 2.47.0