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a=ed25519-sha256; t=1733999565; l=1238; i=krishna.chundru@oss.qualcomm.com; s=20230907; h=from:subject:message-id; bh=irG7UL2NaAvTYd39uNjfeRdm3pgEDinubSnLkruP6A8=; b=CazABzxzN/P1pKOWbv7yNJVkC1w8AmIQAil/8JT+kWBq+7dUUmaVzm9WhSYaeYAFC0K/s+yIv 47ULRs3PEu7Bin9vMMCplzISGOtpdHtVUV/TG00Ps59Ul/da98wA7QP X-Developer-Key: i=krishna.chundru@oss.qualcomm.com; a=ed25519; pk=10CL2pdAKFyzyOHbfSWHCD0X0my7CXxj8gJScmn1FAg= X-Proofpoint-GUID: ZM1hYIqs5y_n_xKqaxKP7MMzPKbaG0my X-Proofpoint-ORIG-GUID: ZM1hYIqs5y_n_xKqaxKP7MMzPKbaG0my X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 impostorscore=0 mlxlogscore=817 phishscore=0 suspectscore=0 mlxscore=0 clxscore=1011 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412120074 From: Krishna chaitanya chundru Add PCIe lane equalization preset properties for 8 GT/s and 16 GT/s data rates used in lane equalization procedure. Signed-off-by: Krishna Chaitanya Chundru --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/q= com/x1e80100.dtsi index a36076e3c56b..6a2074297030 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -2993,6 +2993,10 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, phys =3D <&pcie6a_phy>; phy-names =3D "pciephy"; =20 + eq-presets-8gts =3D /bits/ 16 <0x5555 0x5555>; + + eq-presets-16gts =3D /bits/ 8 <0x55 0x55>; + status =3D "disabled"; }; =20 @@ -3115,6 +3119,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, phys =3D <&pcie5_phy>; phy-names =3D "pciephy"; =20 + eq-presets-8gts =3D /bits/ 16 <0x5555 0x5555>; + status =3D "disabled"; }; =20 @@ -3235,6 +3241,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, phys =3D <&pcie4_phy>; phy-names =3D "pciephy"; =20 + eq-presets-8gts =3D /bits/ 16 <0x5555 0x5555>; + status =3D "disabled"; =20 pcie4_port0: pcie@0 { --=20 2.34.1