From nobody Mon Feb 9 15:01:19 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 230011B395E for ; Thu, 12 Dec 2024 20:04:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033848; cv=none; b=Jh15pu3HcfOXrr7hGzBStIf2Y5J/woRNsDBSShmCXpcFFide/OjLgpvy7bMKx1cPkxSHwBOuhzJnBm7qnvhayx67K2zMFKWrx7t9CJlIaLCGsnQ71GGTdz6XqVPRZZxYYE9JVMYGcA3sdaJDuJJuAytX0nAEo8NquSOgDDXNPj4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033848; c=relaxed/simple; bh=hKOtzEz0yS1DTlvWFo1dHi6pZi36HD1vcv4F1b6/OjI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=myPyTaJHsx1Xa4Jofso8OsXI1GnLq2QNOG5bjg/UD/Mb89h3XXH3UQ1kh3p+4Ka3XHWgW75RcNs1Q/x8axra7aYumk+c7oHlLOYT707hQRzLMaHtTyovEiCDIMHuORc0ILeFt5wjHVoL7+OYKZX0iaQ/75HMYxLG+TL0n/aw81I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=EyGp6yey; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="EyGp6yey" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1734033838; bh=hKOtzEz0yS1DTlvWFo1dHi6pZi36HD1vcv4F1b6/OjI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=EyGp6yeyKvATJ4oEhqSLIay1oIe/R5dnuayt0prc1Xq35iv2v0+ZMgvYzA4yyeh4t snUN0u1+3UwfmaEcYXzZrJ6avCbwnl7VJx5OtzFxx8PJBQc/owwwOUM1hUolsHOeTC viGicSlhNPUB8hooUIITNHYWTCJ/9N/tsstAMjj52st1zSI/uEkVbacMBnJaFsxkYO aNMdNKbVS0eg6ciuQSarI3/R2r9KJLMuOGlnfQf091SclCr7CqnEFWPcA1xy6conk9 6zA8aEGBADJF8rsmoc8AgiZtGQ9KpVCbDy7thwT8ZGFQHBPzliTNaxJQ7o+Nd0e1A3 LAQlkmxyUgv4g== Received: from localhost (unknown [188.27.48.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 74BDD17E3801; Thu, 12 Dec 2024 21:03:58 +0100 (CET) From: Cristian Ciocaltea Date: Thu, 12 Dec 2024 22:03:36 +0200 Subject: [PATCH v2 5/8] phy: rockchip: samsung-hdptx: Setup TMDS char rate via phy_configure_opts_hdmi Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-phy-sam-hdptx-bpc-v2-5-57e672c7c7c4@collabora.com> References: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> In-Reply-To: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 The current workaround to setup the TMDS character rate relies on the unconventional usage of phy_set_bus_width(). Make use of the recently introduced HDMI PHY configuration API for this purpose. The workaround will be dropped as soon as the switch has been completed on both ends. Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 44 ++++++++++++++++++-= ---- 1 file changed, 35 insertions(+), 9 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index 1f5b7ffc0c5c47def33c93736bb1bd1491cd59d0..bf0c7d74e70b9204c97c571e08c= b0c140131acb9 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -244,6 +244,9 @@ struct rk_hdptx_phy { int nr_clks; struct reset_control_bulk_data rsts[RST_MAX]; =20 + /* PHY config opts */ + unsigned long tmds_char_rate; + /* clk provider */ struct clk_hw hw; unsigned long rate; @@ -872,18 +875,20 @@ static int rk_hdptx_phy_consumer_put(struct rk_hdptx_= phy *hdptx, bool force) static int rk_hdptx_phy_power_on(struct phy *phy) { struct rk_hdptx_phy *hdptx =3D phy_get_drvdata(phy); - int bus_width =3D phy_get_bus_width(hdptx->phy); + unsigned int rate =3D hdptx->tmds_char_rate / 100; int ret; =20 - /* - * FIXME: Temporary workaround to pass pixel_clk_rate - * from the HDMI bridge driver until phy_configure_opts_hdmi - * becomes available in the PHY API. - */ - unsigned int rate =3D bus_width & 0xfffffff; + if (rate =3D=3D 0) { + /* + * FIXME: Temporary workaround to setup TMDS char rate + * from the RK HDMI bridge driver. + * Will be removed as soon the switch to the HDMI PHY + * configuration API has been completed on both ends. + */ + rate =3D phy_get_bus_width(hdptx->phy) & 0xfffffff; + } =20 - dev_dbg(hdptx->dev, "%s bus_width=3D%x rate=3D%u\n", - __func__, bus_width, rate); + dev_dbg(hdptx->dev, "%s rate=3D%u\n", __func__, rate); =20 ret =3D rk_hdptx_phy_consumer_get(hdptx, rate); if (ret) @@ -903,9 +908,20 @@ static int rk_hdptx_phy_power_off(struct phy *phy) return rk_hdptx_phy_consumer_put(hdptx, false); } =20 +static int rk_hdptx_phy_configure(struct phy *phy, + union phy_configure_opts *opts) +{ + struct rk_hdptx_phy *hdptx =3D phy_get_drvdata(phy); + + hdptx->tmds_char_rate =3D opts->hdmi.tmds_char_rate; + + return 0; +} + static const struct phy_ops rk_hdptx_phy_ops =3D { .power_on =3D rk_hdptx_phy_power_on, .power_off =3D rk_hdptx_phy_power_off, + .configure =3D rk_hdptx_phy_configure, .owner =3D THIS_MODULE, }; =20 @@ -961,6 +977,16 @@ static int rk_hdptx_phy_clk_set_rate(struct clk_hw *hw= , unsigned long rate, { struct rk_hdptx_phy *hdptx =3D to_rk_hdptx_phy(hw); =20 + /* + * The TMDS char rate set via phy_configure(), if any, has + * precedence over the rate provided via clk_set_rate(). + */ + if (hdptx->tmds_char_rate && hdptx->tmds_char_rate !=3D rate) { + dev_dbg(hdptx->dev, "Replaced clk_set_rate=3D%lu with tmds_char_rate=3D%= lu\n", + rate, hdptx->tmds_char_rate); + rate =3D hdptx->tmds_char_rate; + } + return rk_hdptx_ropll_tmds_cmn_config(hdptx, rate / 100); } =20 --=20 2.47.0