From nobody Mon Feb 9 08:12:50 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 880D419F131 for ; Thu, 12 Dec 2024 20:04:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033846; cv=none; b=Wv9CduYSIDtwW2Xt28VuBVwLmw47LmxFWNgpSAXCOxOXZdjvzlGvpbHn6q6Zto2E/PvPwqGbgbdKAW0xSYIycLS4xLWzATxncGuoxQGUrBwYOLfs9X/a3XbzoeCoogoqwrRrSs9NzaG+fAkUwt05vuvijluUYt3wo9dx5IkxvDc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033846; c=relaxed/simple; bh=rzY/ekTj36CpGepR2T+DTbTdewEz706/EN294cYriO4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uOBzvQIxRGCZVZqy8yi3KE0e+c/gSxD1nImsphAdFn7zX28kNstIh1cKj94gRpjYD6E3zmD2VFN/HB3CSbtUtka8Y7eBjUdngRsSatQ0PIoVuEnKmfsL4ay3ixPo+viBHSUgIfzEXtK5ijrvM1c28C1o8kZtJMHuD0ApzxQoDtg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=XJV/kuoK; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="XJV/kuoK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1734033837; bh=rzY/ekTj36CpGepR2T+DTbTdewEz706/EN294cYriO4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=XJV/kuoKfxKSxUEmXOw1KT5z/JxGOig6CtpENBQ27dFsm+yIIIqut5ChBzAHGr+Ie cq/svw7DEt1nvoy0Si7hou9PwTDinqjKqk129ufYEIqFDQzb3OAHINK1QaKicSo44/ Yk3O+vV+wyqo1CMfZ/OUyZJezgxTJFn1GFPHqQ6CcmpqlrC5KEFEYeeuZk5hMTr/D7 yELCx5SAYs/qCpsthZuSa51si8va/oFv8aAgiqNN89L52elMYHuSxezVwKUpV5qFOF WIuClvV8Usw9AqN3RExdD8yel2d+sfcWBzLOsyU3kYt0T9Z8xCrxp1YyiaHk96naBm FbyFgssQpKPYQ== Received: from localhost (unknown [188.27.48.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id D90C917E37FF; Thu, 12 Dec 2024 21:03:56 +0100 (CET) From: Cristian Ciocaltea Date: Thu, 12 Dec 2024 22:03:34 +0200 Subject: [PATCH v2 3/8] phy: rockchip: samsung-hdptx: Fix clock ratio setup Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-phy-sam-hdptx-bpc-v2-3-57e672c7c7c4@collabora.com> References: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> In-Reply-To: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 The switch from 1/10 to 1/40 clock ratio must happen when exceeding the 340 MHz rate limit of HDMI 1.4, i.e. when entering the HDMI 2.0 domain, and not before. While at it, introduce a define for this rate limit constant. Fixes: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver") Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index ceab9c71d3b53ae0b746a10c081fcfaa7d5c5ae7..089020df5b4b8f9b44d272fa87a= 66e0f2c8ccaba 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -192,6 +192,7 @@ #define LN3_TX_SER_RATE_SEL_HBR2 BIT(3) #define LN3_TX_SER_RATE_SEL_HBR3 BIT(2) =20 +#define HDMI14_MAX_RATE 340000000 #define HDMI20_MAX_RATE 600000000 =20 struct lcpll_config { @@ -826,7 +827,7 @@ static int rk_hdptx_ropll_tmds_mode_config(struct rk_hd= ptx_phy *hdptx, =20 regmap_write(hdptx->regmap, LNTOP_REG(0200), 0x06); =20 - if (rate >=3D 3400000) { + if (rate > HDMI14_MAX_RATE / 100) { /* For 1/40 bitrate clk */ rk_hdptx_multi_reg_write(hdptx, rk_hdtpx_tmds_lntop_highbr_seq); } else { --=20 2.47.0