From nobody Sun Dec 14 19:15:04 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70E3D18732A for ; Thu, 12 Dec 2024 20:04:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033844; cv=none; b=fvFNNtlVXB66KhvSjS4sv6bq/bLnOETpnM85j0XsfA12CyqyXyFtfRCPrFyOcaQqc+sJhU6DKGVWNgUrW+el20SYAePZ1ei/+duuBoch7pAEUQpwPq37M9HzPlpMg0oI6Uwou/ENusS2u3eJvPeCKE7lL0U49JU8JKFnZXJ25/w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033844; c=relaxed/simple; bh=ocDDbVeLdHpMPiMcDE70Fk3emF/id8nLMdcCqc5xz28=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MFJGsDK4kuyOxpYP9Kvfn73a+YsEUpuwuMgvg4EMnncnEySO7Y7WEaHbS7nCQUbGEJVEwmcGM9mPYagql5V7YnAlsLZOH30fxAdO+U+dtyOto5Wh/fPZH6Losu0VCvzQ5geGkMQ0nX4r+6IxyhFYR08Qr1c6n3XvnC2q6anfwGo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=c8BToqMY; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="c8BToqMY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1734033835; bh=ocDDbVeLdHpMPiMcDE70Fk3emF/id8nLMdcCqc5xz28=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=c8BToqMY4Mufb3bCgZEGJHLC9MM63A43x+K4d1w062XWEa+GdxNjygc1NTOnW7Aat DPicNJRvRBYZrpe57Bpo5JccyQV/Rv7UBVBbxiMmXxIsw+n8md7hgsFz73aAL3il85 oRcmX8h7NSgbkDH1bL+swV3FMF8XQO+aIg7oeLlpHYPbzpiHWV8FTkJi8tRTy6Rmo3 hW9ZEGZqnF7taMfC+23J71M2gwXMFwXZv12Ng+TjERUzPtIEVXGrbB3sFQ23d23MvX f7vqCGV/vn/4vvZrgCry5OmxUofui3Q6aYSw8zdPDHaKLCF/WVw7Sf4fKT+XL0CjTS OKGH8orTyyxhQ== Received: from localhost (unknown [188.27.48.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 4C6CE17E37FA; Thu, 12 Dec 2024 21:03:55 +0100 (CET) From: Cristian Ciocaltea Date: Thu, 12 Dec 2024 22:03:32 +0200 Subject: [PATCH v2 1/8] phy: Add HDMI configuration options Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-phy-sam-hdptx-bpc-v2-1-57e672c7c7c4@collabora.com> References: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> In-Reply-To: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 From: Sandor Yu Allow HDMI PHYs to be configured through the generic functions through a custom structure added to the generic union. The parameters added here are based on HDMI PHY implementation practices. The current set of parameters should cover the potential users. Signed-off-by: Sandor Yu Reviewed-by: Dmitry Baryshkov Reviewed-by: Maxime Ripard Link: https://lore.kernel.org/r/43757beec6cd418fc17252283de38009d531c7c7.17= 32627815.git.Sandor.yu@nxp.com Signed-off-by: Cristian Ciocaltea --- include/linux/phy/phy-hdmi.h | 19 +++++++++++++++++++ include/linux/phy/phy.h | 7 ++++++- 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/include/linux/phy/phy-hdmi.h b/include/linux/phy/phy-hdmi.h new file mode 100644 index 0000000000000000000000000000000000000000..6a696922bc7f29af63d88646701= b2c0fcee5c885 --- /dev/null +++ b/include/linux/phy/phy-hdmi.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2022,2024 NXP + */ + +#ifndef __PHY_HDMI_H_ +#define __PHY_HDMI_H_ + +/** + * struct phy_configure_opts_hdmi - HDMI configuration set + * @tmds_char_rate: HDMI TMDS Character Rate in Hertz. + * + * This structure is used to represent the configuration state of a HDMI p= hy. + */ +struct phy_configure_opts_hdmi { + unsigned long long tmds_char_rate; +}; + +#endif /* __PHY_HDMI_H_ */ diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index 03cd5bae92d3f189d739c453fe4c160dd2a5063e..4ac486b101fe4023b8f2a84e907= e65a0ff0a5ede 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -17,6 +17,7 @@ #include =20 #include +#include #include #include =20 @@ -42,7 +43,8 @@ enum phy_mode { PHY_MODE_MIPI_DPHY, PHY_MODE_SATA, PHY_MODE_LVDS, - PHY_MODE_DP + PHY_MODE_DP, + PHY_MODE_HDMI, }; =20 enum phy_media { @@ -60,11 +62,14 @@ enum phy_media { * the DisplayPort protocol. * @lvds: Configuration set applicable for phys supporting * the LVDS phy mode. + * @hdmi: Configuration set applicable for phys supporting + * the HDMI phy mode. */ union phy_configure_opts { struct phy_configure_opts_mipi_dphy mipi_dphy; struct phy_configure_opts_dp dp; struct phy_configure_opts_lvds lvds; + struct phy_configure_opts_hdmi hdmi; }; =20 /** --=20 2.47.0 From nobody Sun Dec 14 19:15:04 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9824A1917D6 for ; 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Thu, 12 Dec 2024 21:03:56 +0100 (CET) From: Cristian Ciocaltea Date: Thu, 12 Dec 2024 22:03:33 +0200 Subject: [PATCH v2 2/8] phy: hdmi: Add color depth configuration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-phy-sam-hdptx-bpc-v2-2-57e672c7c7c4@collabora.com> References: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> In-Reply-To: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 Extend the HDMI configuration options to allow managing bits per color channel. This is required by some PHY drivers such as rockchip-samsung-hdptx. Signed-off-by: Cristian Ciocaltea --- include/linux/phy/phy-hdmi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/phy/phy-hdmi.h b/include/linux/phy/phy-hdmi.h index 6a696922bc7f29af63d88646701b2c0fcee5c885..f0ec963c6e84f1b7728acafc824= dff191c6b873d 100644 --- a/include/linux/phy/phy-hdmi.h +++ b/include/linux/phy/phy-hdmi.h @@ -9,11 +9,13 @@ /** * struct phy_configure_opts_hdmi - HDMI configuration set * @tmds_char_rate: HDMI TMDS Character Rate in Hertz. + * @bpc: Bits per color channel. * * This structure is used to represent the configuration state of a HDMI p= hy. */ struct phy_configure_opts_hdmi { unsigned long long tmds_char_rate; + unsigned int bpc; }; =20 #endif /* __PHY_HDMI_H_ */ --=20 2.47.0 From nobody Sun Dec 14 19:15:04 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 880D419F131 for ; Thu, 12 Dec 2024 20:04:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033846; cv=none; b=Wv9CduYSIDtwW2Xt28VuBVwLmw47LmxFWNgpSAXCOxOXZdjvzlGvpbHn6q6Zto2E/PvPwqGbgbdKAW0xSYIycLS4xLWzATxncGuoxQGUrBwYOLfs9X/a3XbzoeCoogoqwrRrSs9NzaG+fAkUwt05vuvijluUYt3wo9dx5IkxvDc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033846; c=relaxed/simple; bh=rzY/ekTj36CpGepR2T+DTbTdewEz706/EN294cYriO4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uOBzvQIxRGCZVZqy8yi3KE0e+c/gSxD1nImsphAdFn7zX28kNstIh1cKj94gRpjYD6E3zmD2VFN/HB3CSbtUtka8Y7eBjUdngRsSatQ0PIoVuEnKmfsL4ay3ixPo+viBHSUgIfzEXtK5ijrvM1c28C1o8kZtJMHuD0ApzxQoDtg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=XJV/kuoK; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="XJV/kuoK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1734033837; bh=rzY/ekTj36CpGepR2T+DTbTdewEz706/EN294cYriO4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=XJV/kuoKfxKSxUEmXOw1KT5z/JxGOig6CtpENBQ27dFsm+yIIIqut5ChBzAHGr+Ie cq/svw7DEt1nvoy0Si7hou9PwTDinqjKqk129ufYEIqFDQzb3OAHINK1QaKicSo44/ Yk3O+vV+wyqo1CMfZ/OUyZJezgxTJFn1GFPHqQ6CcmpqlrC5KEFEYeeuZk5hMTr/D7 yELCx5SAYs/qCpsthZuSa51si8va/oFv8aAgiqNN89L52elMYHuSxezVwKUpV5qFOF WIuClvV8Usw9AqN3RExdD8yel2d+sfcWBzLOsyU3kYt0T9Z8xCrxp1YyiaHk96naBm FbyFgssQpKPYQ== Received: from localhost (unknown [188.27.48.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id D90C917E37FF; Thu, 12 Dec 2024 21:03:56 +0100 (CET) From: Cristian Ciocaltea Date: Thu, 12 Dec 2024 22:03:34 +0200 Subject: [PATCH v2 3/8] phy: rockchip: samsung-hdptx: Fix clock ratio setup Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-phy-sam-hdptx-bpc-v2-3-57e672c7c7c4@collabora.com> References: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> In-Reply-To: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 The switch from 1/10 to 1/40 clock ratio must happen when exceeding the 340 MHz rate limit of HDMI 1.4, i.e. when entering the HDMI 2.0 domain, and not before. While at it, introduce a define for this rate limit constant. Fixes: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver") Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index ceab9c71d3b53ae0b746a10c081fcfaa7d5c5ae7..089020df5b4b8f9b44d272fa87a= 66e0f2c8ccaba 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -192,6 +192,7 @@ #define LN3_TX_SER_RATE_SEL_HBR2 BIT(3) #define LN3_TX_SER_RATE_SEL_HBR3 BIT(2) =20 +#define HDMI14_MAX_RATE 340000000 #define HDMI20_MAX_RATE 600000000 =20 struct lcpll_config { @@ -826,7 +827,7 @@ static int rk_hdptx_ropll_tmds_mode_config(struct rk_hd= ptx_phy *hdptx, =20 regmap_write(hdptx->regmap, LNTOP_REG(0200), 0x06); =20 - if (rate >=3D 3400000) { + if (rate > HDMI14_MAX_RATE / 100) { /* For 1/40 bitrate clk */ rk_hdptx_multi_reg_write(hdptx, rk_hdtpx_tmds_lntop_highbr_seq); } else { --=20 2.47.0 From nobody Sun Dec 14 19:15:04 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B1571AF0B4 for ; Thu, 12 Dec 2024 20:04:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033847; cv=none; b=QeHqNSICYelSiwVNw8+itwoWVh0CA1U1jPZDUQJpOm8xJYNXsb5EYU+lfFKSwhO0uPKx/S4gKf86+VUNNJxEhzWFRmBDMjs3mNlud3eLKT+Gtd6TRTjcTPB4cg5l5grjpPQkwTuAtWbmmN16M28NPR2L+y86BILH2BdoDijaZuU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033847; c=relaxed/simple; bh=eiLyDs1Cws2RP0BvIrC5NeMzsZe0Xq5QuroNohKca7k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nmueejJTrrVwOWVWiQbJ7Xl6p8JCoZQ5ucYvvGyrYEobb2rahitfj9auyhpBlzSEK0lAfTExlm18ba/delT+vlCL8bahXMvwR17LwcR4mbrcFXJjMJy6kPz416U41X/5HE+5pDvZUzo1gIrFUMcFbYuR2Tuz4dtswrcQceTIVbY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=PbZpRZva; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="PbZpRZva" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1734033837; bh=eiLyDs1Cws2RP0BvIrC5NeMzsZe0Xq5QuroNohKca7k=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=PbZpRZvabpKyLpLmRzTdR8g+xlmXqZ0aPx8YxEiPiyUqcSPAlP6vYho0arRoHO5Fn 5ykW/33O8xfx8VT/4x9NMUuJkEkAGCJoexyrDjdcHncOauGlcfuo+ppGrDovhji+T3 5CtMXeR2vpSPkMpEsbMvoM6J8WCJ6t6A20r/nyZN4Dtt27omD7n6k4U/0MIVjMc+ri J1yQuPTa9HYS0LbJ2YnNXfy3mEHvPzjmDG1/D9aRjUh3jNDcxi55uZeP7pMgfIYfsf MNml8FlDNTWwHskURiypNL2LeeRzG3IjreFPO7uiU2IkuIUmnQfjl9V90+LaYRiOWL 13dDDSf1/JymQ== Received: from localhost (unknown [188.27.48.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id A9FBC17E3800; Thu, 12 Dec 2024 21:03:57 +0100 (CET) From: Cristian Ciocaltea Date: Thu, 12 Dec 2024 22:03:35 +0200 Subject: [PATCH v2 4/8] phy: rockchip: samsung-hdptx: Drop unused lcpll_config Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-phy-sam-hdptx-bpc-v2-4-57e672c7c7c4@collabora.com> References: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> In-Reply-To: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 This is just a leftover from downstream support for HDMI 2.1. Remove the unused struct for now. Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 31 -------------------= ---- 1 file changed, 31 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index 089020df5b4b8f9b44d272fa87a66e0f2c8ccaba..1f5b7ffc0c5c47def33c93736bb= 1bd1491cd59d0 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -195,37 +195,6 @@ #define HDMI14_MAX_RATE 340000000 #define HDMI20_MAX_RATE 600000000 =20 -struct lcpll_config { - u32 bit_rate; - u8 lcvco_mode_en; - u8 pi_en; - u8 clk_en_100m; - u8 pms_mdiv; - u8 pms_mdiv_afc; - u8 pms_pdiv; - u8 pms_refdiv; - u8 pms_sdiv; - u8 pi_cdiv_rstn; - u8 pi_cdiv_sel; - u8 sdm_en; - u8 sdm_rstn; - u8 sdc_frac_en; - u8 sdc_rstn; - u8 sdm_deno; - u8 sdm_num_sign; - u8 sdm_num; - u8 sdc_n; - u8 sdc_n2; - u8 sdc_num; - u8 sdc_deno; - u8 sdc_ndiv_rstn; - u8 ssc_en; - u8 ssc_fm_dev; - u8 ssc_fm_freq; - u8 ssc_clk_div_sel; - u8 cd_tx_ser_rate_sel; -}; - struct ropll_config { u32 bit_rate; u8 pms_mdiv; --=20 2.47.0 From nobody Sun Dec 14 19:15:04 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 230011B395E for ; Thu, 12 Dec 2024 20:04:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033848; cv=none; b=Jh15pu3HcfOXrr7hGzBStIf2Y5J/woRNsDBSShmCXpcFFide/OjLgpvy7bMKx1cPkxSHwBOuhzJnBm7qnvhayx67K2zMFKWrx7t9CJlIaLCGsnQ71GGTdz6XqVPRZZxYYE9JVMYGcA3sdaJDuJJuAytX0nAEo8NquSOgDDXNPj4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734033848; c=relaxed/simple; bh=hKOtzEz0yS1DTlvWFo1dHi6pZi36HD1vcv4F1b6/OjI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=myPyTaJHsx1Xa4Jofso8OsXI1GnLq2QNOG5bjg/UD/Mb89h3XXH3UQ1kh3p+4Ka3XHWgW75RcNs1Q/x8axra7aYumk+c7oHlLOYT707hQRzLMaHtTyovEiCDIMHuORc0ILeFt5wjHVoL7+OYKZX0iaQ/75HMYxLG+TL0n/aw81I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=EyGp6yey; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="EyGp6yey" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1734033838; bh=hKOtzEz0yS1DTlvWFo1dHi6pZi36HD1vcv4F1b6/OjI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=EyGp6yeyKvATJ4oEhqSLIay1oIe/R5dnuayt0prc1Xq35iv2v0+ZMgvYzA4yyeh4t snUN0u1+3UwfmaEcYXzZrJ6avCbwnl7VJx5OtzFxx8PJBQc/owwwOUM1hUolsHOeTC viGicSlhNPUB8hooUIITNHYWTCJ/9N/tsstAMjj52st1zSI/uEkVbacMBnJaFsxkYO aNMdNKbVS0eg6ciuQSarI3/R2r9KJLMuOGlnfQf091SclCr7CqnEFWPcA1xy6conk9 6zA8aEGBADJF8rsmoc8AgiZtGQ9KpVCbDy7thwT8ZGFQHBPzliTNaxJQ7o+Nd0e1A3 LAQlkmxyUgv4g== Received: from localhost (unknown [188.27.48.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 74BDD17E3801; Thu, 12 Dec 2024 21:03:58 +0100 (CET) From: Cristian Ciocaltea Date: Thu, 12 Dec 2024 22:03:36 +0200 Subject: [PATCH v2 5/8] phy: rockchip: samsung-hdptx: Setup TMDS char rate via phy_configure_opts_hdmi Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-phy-sam-hdptx-bpc-v2-5-57e672c7c7c4@collabora.com> References: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> In-Reply-To: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 The current workaround to setup the TMDS character rate relies on the unconventional usage of phy_set_bus_width(). Make use of the recently introduced HDMI PHY configuration API for this purpose. The workaround will be dropped as soon as the switch has been completed on both ends. Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 44 ++++++++++++++++++-= ---- 1 file changed, 35 insertions(+), 9 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index 1f5b7ffc0c5c47def33c93736bb1bd1491cd59d0..bf0c7d74e70b9204c97c571e08c= b0c140131acb9 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -244,6 +244,9 @@ struct rk_hdptx_phy { int nr_clks; struct reset_control_bulk_data rsts[RST_MAX]; =20 + /* PHY config opts */ + unsigned long tmds_char_rate; + /* clk provider */ struct clk_hw hw; unsigned long rate; @@ -872,18 +875,20 @@ static int rk_hdptx_phy_consumer_put(struct rk_hdptx_= phy *hdptx, bool force) static int rk_hdptx_phy_power_on(struct phy *phy) { struct rk_hdptx_phy *hdptx =3D phy_get_drvdata(phy); - int bus_width =3D phy_get_bus_width(hdptx->phy); + unsigned int rate =3D hdptx->tmds_char_rate / 100; int ret; =20 - /* - * FIXME: Temporary workaround to pass pixel_clk_rate - * from the HDMI bridge driver until phy_configure_opts_hdmi - * becomes available in the PHY API. - */ - unsigned int rate =3D bus_width & 0xfffffff; + if (rate =3D=3D 0) { + /* + * FIXME: Temporary workaround to setup TMDS char rate + * from the RK HDMI bridge driver. + * Will be removed as soon the switch to the HDMI PHY + * configuration API has been completed on both ends. + */ + rate =3D phy_get_bus_width(hdptx->phy) & 0xfffffff; + } =20 - dev_dbg(hdptx->dev, "%s bus_width=3D%x rate=3D%u\n", - __func__, bus_width, rate); + dev_dbg(hdptx->dev, "%s rate=3D%u\n", __func__, rate); =20 ret =3D rk_hdptx_phy_consumer_get(hdptx, rate); if (ret) @@ -903,9 +908,20 @@ static int rk_hdptx_phy_power_off(struct phy *phy) return rk_hdptx_phy_consumer_put(hdptx, false); } =20 +static int rk_hdptx_phy_configure(struct phy *phy, + union phy_configure_opts *opts) +{ + struct rk_hdptx_phy *hdptx =3D phy_get_drvdata(phy); + + hdptx->tmds_char_rate =3D opts->hdmi.tmds_char_rate; + + return 0; +} + static const struct phy_ops rk_hdptx_phy_ops =3D { .power_on =3D rk_hdptx_phy_power_on, .power_off =3D rk_hdptx_phy_power_off, + .configure =3D rk_hdptx_phy_configure, .owner =3D THIS_MODULE, }; =20 @@ -961,6 +977,16 @@ static int rk_hdptx_phy_clk_set_rate(struct clk_hw *hw= , unsigned long rate, { struct rk_hdptx_phy *hdptx =3D to_rk_hdptx_phy(hw); =20 + /* + * The TMDS char rate set via phy_configure(), if any, has + * precedence over the rate provided via clk_set_rate(). + */ + if (hdptx->tmds_char_rate && hdptx->tmds_char_rate !=3D rate) { + dev_dbg(hdptx->dev, "Replaced clk_set_rate=3D%lu with tmds_char_rate=3D%= lu\n", + rate, hdptx->tmds_char_rate); + rate =3D hdptx->tmds_char_rate; + } + return rk_hdptx_ropll_tmds_cmn_config(hdptx, rate / 100); } =20 --=20 2.47.0 From nobody Sun Dec 14 19:15:04 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F22E1B3942 for ; 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Thu, 12 Dec 2024 21:03:59 +0100 (CET) From: Cristian Ciocaltea Date: Thu, 12 Dec 2024 22:03:37 +0200 Subject: [PATCH v2 6/8] phy: rockchip: samsung-hdptx: Add high color depth management Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-phy-sam-hdptx-bpc-v2-6-57e672c7c7c4@collabora.com> References: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> In-Reply-To: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 Add support for 8-bit, 10-bit, 12-bit and 16-bit color depth setup. Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index bf0c7d74e70b9204c97c571e08cb0c140131acb9..d90d89cfdff561e13ac3db3f143= a4eef9cc85a03 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -246,6 +246,7 @@ struct rk_hdptx_phy { =20 /* PHY config opts */ unsigned long tmds_char_rate; + unsigned int bpc; =20 /* clk provider */ struct clk_hw hw; @@ -786,6 +787,9 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdp= tx_phy *hdptx, regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_POSTDIV_SEL_MASK, FIELD_PREP(PLL_PCG_POSTDIV_SEL_MASK, cfg->pms_sdiv)); =20 + regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_SEL_MASK, + FIELD_PREP(PLL_PCG_CLK_SEL_MASK, (hdptx->bpc - 8) >> 1)); + regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_EN, PLL_PCG_CLK_EN); =20 @@ -888,7 +892,7 @@ static int rk_hdptx_phy_power_on(struct phy *phy) rate =3D phy_get_bus_width(hdptx->phy) & 0xfffffff; } =20 - dev_dbg(hdptx->dev, "%s rate=3D%u\n", __func__, rate); + dev_dbg(hdptx->dev, "%s rate=3D%u bpc=3D%u\n", __func__, rate, hdptx->bpc= ); =20 ret =3D rk_hdptx_phy_consumer_get(hdptx, rate); if (ret) @@ -915,6 +919,18 @@ static int rk_hdptx_phy_configure(struct phy *phy, =20 hdptx->tmds_char_rate =3D opts->hdmi.tmds_char_rate; =20 + switch (opts->hdmi.bpc) { + case 8: + case 10: + case 12: + case 16: + hdptx->bpc =3D opts->hdmi.bpc; + break; + default: + dev_warn(hdptx->dev, "Discarded unsupported bpc: %u\n", + opts->hdmi.bpc); + }; + return 0; } =20 @@ -1062,6 +1078,7 @@ static int rk_hdptx_phy_probe(struct platform_device = *pdev) return -ENOMEM; =20 hdptx->dev =3D dev; + hdptx->bpc =3D 8; =20 regs =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) --=20 2.47.0 From nobody Sun Dec 14 19:15:04 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 261EF1B4120 for ; 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Thu, 12 Dec 2024 21:04:00 +0100 (CET) From: Cristian Ciocaltea Date: Thu, 12 Dec 2024 22:03:38 +0200 Subject: [PATCH v2 7/8] phy: rockchip: samsung-hdptx: Cleanup internal rate handling Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-phy-sam-hdptx-bpc-v2-7-57e672c7c7c4@collabora.com> References: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> In-Reply-To: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 Drop the rate parameter from a bunch of internal helpers and, instead, make better use of the newly introduced ->tmds_char_rate driver data. No functional changes intended. Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 27 ++++++++++++-------= ---- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index d90d89cfdff561e13ac3db3f143a4eef9cc85a03..bc513ddd5c052763856a113a7f1= e58660f7372b8 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -796,14 +796,13 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_h= dptx_phy *hdptx, return rk_hdptx_post_enable_pll(hdptx); } =20 -static int rk_hdptx_ropll_tmds_mode_config(struct rk_hdptx_phy *hdptx, - unsigned int rate) +static int rk_hdptx_ropll_tmds_mode_config(struct rk_hdptx_phy *hdptx) { rk_hdptx_multi_reg_write(hdptx, rk_hdtpx_common_sb_init_seq); =20 regmap_write(hdptx->regmap, LNTOP_REG(0200), 0x06); =20 - if (rate > HDMI14_MAX_RATE / 100) { + if (hdptx->tmds_char_rate > HDMI14_MAX_RATE) { /* For 1/40 bitrate clk */ rk_hdptx_multi_reg_write(hdptx, rk_hdtpx_tmds_lntop_highbr_seq); } else { @@ -820,9 +819,9 @@ static int rk_hdptx_ropll_tmds_mode_config(struct rk_hd= ptx_phy *hdptx, return rk_hdptx_post_enable_lane(hdptx); } =20 -static int rk_hdptx_phy_consumer_get(struct rk_hdptx_phy *hdptx, - unsigned int rate) +static int rk_hdptx_phy_consumer_get(struct rk_hdptx_phy *hdptx) { + unsigned long rate; u32 status; int ret; =20 @@ -836,8 +835,9 @@ static int rk_hdptx_phy_consumer_get(struct rk_hdptx_ph= y *hdptx, if (status & HDPTX_O_PLL_LOCK_DONE) dev_warn(hdptx->dev, "PLL locked by unknown consumer!\n"); =20 + rate =3D hdptx->tmds_char_rate ?: hdptx->rate; if (rate) { - ret =3D rk_hdptx_ropll_tmds_cmn_config(hdptx, rate); + ret =3D rk_hdptx_ropll_tmds_cmn_config(hdptx, rate / 100); if (ret) goto dec_usage; } @@ -879,26 +879,27 @@ static int rk_hdptx_phy_consumer_put(struct rk_hdptx_= phy *hdptx, bool force) static int rk_hdptx_phy_power_on(struct phy *phy) { struct rk_hdptx_phy *hdptx =3D phy_get_drvdata(phy); - unsigned int rate =3D hdptx->tmds_char_rate / 100; int ret; =20 - if (rate =3D=3D 0) { + if (!hdptx->tmds_char_rate) { /* * FIXME: Temporary workaround to setup TMDS char rate * from the RK HDMI bridge driver. * Will be removed as soon the switch to the HDMI PHY * configuration API has been completed on both ends. */ - rate =3D phy_get_bus_width(hdptx->phy) & 0xfffffff; + hdptx->tmds_char_rate =3D phy_get_bus_width(hdptx->phy) & 0xfffffff; + hdptx->tmds_char_rate *=3D 100; } =20 - dev_dbg(hdptx->dev, "%s rate=3D%u bpc=3D%u\n", __func__, rate, hdptx->bpc= ); + dev_dbg(hdptx->dev, "%s tmds_rate=3D%lu bpc=3D%u\n", __func__, + hdptx->tmds_char_rate, hdptx->bpc); =20 - ret =3D rk_hdptx_phy_consumer_get(hdptx, rate); + ret =3D rk_hdptx_phy_consumer_get(hdptx); if (ret) return ret; =20 - ret =3D rk_hdptx_ropll_tmds_mode_config(hdptx, rate); + ret =3D rk_hdptx_ropll_tmds_mode_config(hdptx); if (ret) rk_hdptx_phy_consumer_put(hdptx, true); =20 @@ -950,7 +951,7 @@ static int rk_hdptx_phy_clk_prepare(struct clk_hw *hw) { struct rk_hdptx_phy *hdptx =3D to_rk_hdptx_phy(hw); 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h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=CLARn6RzmV8a2P44ixHOPfzHrPhaX5P/Dinq5uI7616sxEXZVNeUixyiLUalqBi/f oDLDRSeWQSekWV+6aQcBweESh21OsYzTe8cgdOwOjVyM6gzjLdlOaftuLy/XF/aTAp Ywn03BSbN0TcGQ+kPe98Qx6YLDkpsB73r0PXj7kVyDDy9KuSr8kzKAF2gMYt86kG8N IP2+jACJZ+VnBSbctl3VESoTUJnbydROS2OaY8ANXKuPfHI93ZsMeHBdyuVJVsd64F MKoOug+TfAHu20K7FB9apM7ltXxZKD/ybAAxoJPeX0a56rrOMZn6uLF0E693mFD+Sg nY4b37QFs6W/A== Received: from localhost (unknown [188.27.48.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (prime256v1) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id DDB9F17E3804; Thu, 12 Dec 2024 21:04:00 +0100 (CET) From: Cristian Ciocaltea Date: Thu, 12 Dec 2024 22:03:39 +0200 Subject: [PATCH v2 8/8] phy: rockchip: samsung-hdptx: Avoid Hz-hHz unit conversion overhead Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241212-phy-sam-hdptx-bpc-v2-8-57e672c7c7c4@collabora.com> References: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> In-Reply-To: <20241212-phy-sam-hdptx-bpc-v2-0-57e672c7c7c4@collabora.com> To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner Cc: Algea Cao , Sandor Yu , Dmitry Baryshkov , Maxime Ripard , kernel@collabora.com, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.14.2 The ropll_tmds_cfg table used to identify the configuration params for the supported rates expects the search keys - bit_rate field - to be provided in hHz rather than Hz (1 hHz =3D 100 Hz). This requires multiple conversions between these units being performed at runtime. Improve implementation clarity and efficiency by consistently using the Hz units throughout driver's internal data structures and functions. Signed-off-by: Cristian Ciocaltea --- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 61 +++++++++++--------= ---- 1 file changed, 30 insertions(+), 31 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/ph= y/rockchip/phy-rockchip-samsung-hdptx.c index bc513ddd5c052763856a113a7f1e58660f7372b8..b6120d9ab24eca093180b3af942= d7ce2b204d516 100644 --- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c +++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c @@ -196,7 +196,7 @@ #define HDMI20_MAX_RATE 600000000 =20 struct ropll_config { - u32 bit_rate; + u32 rate; u8 pms_mdiv; u8 pms_mdiv_afc; u8 pms_pdiv; @@ -256,45 +256,45 @@ struct rk_hdptx_phy { }; =20 static const struct ropll_config ropll_tmds_cfg[] =3D { - { 5940000, 124, 124, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 594000000, 124, 124, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 3712500, 155, 155, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 371250000, 155, 155, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 2970000, 124, 124, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 297000000, 124, 124, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1620000, 135, 135, 1, 1, 3, 1, 1, 0, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10, + { 162000000, 135, 135, 1, 1, 3, 1, 1, 0, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1856250, 155, 155, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 185625000, 155, 155, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1540000, 193, 193, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 193, 1, 32, 2, 1, + { 154000000, 193, 193, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 193, 1, 32, 2, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1485000, 0x7b, 0x7b, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 4, 0, 3, 5, 5, + { 148500000, 0x7b, 0x7b, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 4, 0, 3, 5, 5, 0x10, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1462500, 122, 122, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 244, 1, 16, 2, 1, 1, + { 146250000, 122, 122, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 244, 1, 16, 2, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1190000, 149, 149, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 149, 1, 16, 2, 1, 1, + { 119000000, 149, 149, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 149, 1, 16, 2, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1065000, 89, 89, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 89, 1, 16, 1, 0, 1, + { 106500000, 89, 89, 1, 1, 3, 1, 1, 1, 1, 1, 1, 1, 89, 1, 16, 1, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 1080000, 135, 135, 1, 1, 5, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, + { 108000000, 135, 135, 1, 1, 5, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14, 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 855000, 214, 214, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 214, 1, 16, 2, 1, + { 85500000, 214, 214, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 214, 1, 16, 2, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 835000, 105, 105, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 42, 1, 16, 1, 0, + { 83500000, 105, 105, 1, 1, 5, 1, 1, 1, 1, 1, 1, 1, 42, 1, 16, 1, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 928125, 155, 155, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 92812500, 155, 155, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 742500, 124, 124, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, + { 74250000, 124, 124, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 62, 1, 16, 5, 0, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 650000, 162, 162, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 54, 0, 16, 4, 1, + { 65000000, 162, 162, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 54, 0, 16, 4, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 337500, 0x70, 0x70, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 0x2, 0, 0x01, 5, + { 33750000, 0x70, 0x70, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 0x2, 0, 0x01, 5, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 400000, 100, 100, 1, 1, 11, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, + { 40000000, 100, 100, 1, 1, 11, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14, 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 270000, 0x5a, 0x5a, 1, 1, 0xf, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, + { 27000000, 0x5a, 0x5a, 1, 1, 0xf, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0, 0x14, 0x18, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, - { 251750, 84, 84, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 168, 1, 16, 4, 1, 1, + { 25175000, 84, 84, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 168, 1, 16, 4, 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, }; =20 @@ -656,10 +656,10 @@ static void rk_hdptx_phy_disable(struct rk_hdptx_phy = *hdptx) regmap_write(hdptx->grf, GRF_HDPTX_CON0, val); } =20 -static bool rk_hdptx_phy_clk_pll_calc(unsigned int data_rate, +static bool rk_hdptx_phy_clk_pll_calc(unsigned long rate, struct ropll_config *cfg) { - const unsigned int fout =3D data_rate / 2, fref =3D 24000; + const unsigned int fout =3D rate / 200, fref =3D 24000; unsigned long k =3D 0, lc, k_sub, lc_sub; unsigned int fvco, sdc; u32 mdiv, sdiv, n =3D 8; @@ -729,16 +729,16 @@ static bool rk_hdptx_phy_clk_pll_calc(unsigned int da= ta_rate, } =20 static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx, - unsigned int rate) + unsigned long rate) { const struct ropll_config *cfg =3D NULL; struct ropll_config rc =3D {0}; int i; =20 - hdptx->rate =3D rate * 100; + hdptx->rate =3D rate; =20 for (i =3D 0; i < ARRAY_SIZE(ropll_tmds_cfg); i++) - if (rate =3D=3D ropll_tmds_cfg[i].bit_rate) { + if (rate =3D=3D ropll_tmds_cfg[i].rate) { cfg =3D &ropll_tmds_cfg[i]; break; } @@ -837,7 +837,7 @@ static int rk_hdptx_phy_consumer_get(struct rk_hdptx_ph= y *hdptx) =20 rate =3D hdptx->tmds_char_rate ?: hdptx->rate; if (rate) { - ret =3D rk_hdptx_ropll_tmds_cmn_config(hdptx, rate / 100); + ret =3D rk_hdptx_ropll_tmds_cmn_config(hdptx, rate); if (ret) goto dec_usage; } @@ -972,18 +972,17 @@ static unsigned long rk_hdptx_phy_clk_recalc_rate(str= uct clk_hw *hw, static long rk_hdptx_phy_clk_round_rate(struct clk_hw *hw, unsigned long r= ate, unsigned long *parent_rate) { - u32 bit_rate =3D rate / 100; int i; =20 if (rate > HDMI20_MAX_RATE) return rate; =20 for (i =3D 0; i < ARRAY_SIZE(ropll_tmds_cfg); i++) - if (bit_rate =3D=3D ropll_tmds_cfg[i].bit_rate) + if (rate =3D=3D ropll_tmds_cfg[i].rate) break; =20 if (i =3D=3D ARRAY_SIZE(ropll_tmds_cfg) && - !rk_hdptx_phy_clk_pll_calc(bit_rate, NULL)) + !rk_hdptx_phy_clk_pll_calc(rate, NULL)) return -EINVAL; =20 return rate; @@ -1004,7 +1003,7 @@ static int rk_hdptx_phy_clk_set_rate(struct clk_hw *h= w, unsigned long rate, rate =3D hdptx->tmds_char_rate; } =20 - return rk_hdptx_ropll_tmds_cmn_config(hdptx, rate / 100); + return rk_hdptx_ropll_tmds_cmn_config(hdptx, rate); } =20 static const struct clk_ops hdptx_phy_clk_ops =3D { --=20 2.47.0