From nobody Wed Dec 17 14:21:57 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6EA91BE86A for ; Tue, 10 Dec 2024 14:50:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733842209; cv=none; b=maUHwd1SveBOvI7fJuj8vEItgvTW2Pq8GUkTRoo1ZmwqXj5rCv5Nzchq+bkXwMW540OgpLysgcUGK/qPeZt1xHLWFWfV9cC5Is6chX8MiU66ifap2so+yJrCfkhohjmbl7t1xUVm+YGgZpgGZo9qVftZlpXA2tfGkiJyMCGlhzA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733842209; c=relaxed/simple; bh=hRlH4NBVNwGhJ1JpNPALCjGk3CXpM7yv7jTBCNwOqX4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=g+htsAbJ6VGro4o3BNKbeed08pTokyZGONHn4x0xYLjchdBLejcq1DeW5uq9lLkRBLmZozgbgBB2NsDQYNnIxXaASTL1orFpzAmhMYP8vU8gm5SJ1BDDpNSAugRvrtbaF6c9DHT1QCSF3DsAhKZ8nJkNXkSZter1GuJb+oEcZfk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GZujiaCE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GZujiaCE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id ED0BAC4CEDE; Tue, 10 Dec 2024 14:50:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1733842209; bh=hRlH4NBVNwGhJ1JpNPALCjGk3CXpM7yv7jTBCNwOqX4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GZujiaCEMkCIsTyMDSjPEg9/x3UV3riCwi9DlqVmH2yWvCHcW3+ks+7jw15JcstKo Kyh9OaufWOE+DhWbUKiYUV2pOtrzbyoJPBXHqGCm6JkiPiku/1BOwCVSuSfNnVlLI1 AwU3DYpss7wqr8h2VCynpaS1d1ZGJaqyf3N4h5AacfOy3No8t5knnFyzm4sEL5iQjF KSQ7p4mNdG+I5JYxVWgB1BQc2IJ/y+DD3otaQTXF0H/Y5V/zlcGR3jCEpeYGpOUEQP yvruMzJvEKcAYuBWZMjHPtrKi2tcAemNkCb99bPHVrQOO9BUk776TfxxStF/yqqgnP Sm1Z5+W+DcMog== From: Arnd Bergmann To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Arnd Bergmann , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Linus Torvalds , Andy Shevchenko , Matthew Wilcox Subject: [PATCH v2 05/11] x86: add CONFIG_X86_64_NATIVE option Date: Tue, 10 Dec 2024 15:49:39 +0100 Message-Id: <20241210144945.2325330-6-arnd@kernel.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241210144945.2325330-1-arnd@kernel.org> References: <20241210144945.2325330-1-arnd@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Arnd Bergmann As a replacement for the obsole MK8/MPSC/MCORE2 configuration options, allow building a specialized kernel for the local CPU, which is useful for users building their own kernels, and does not require maintaining a list of possible CPU options. Between -march=3Dnative and -mtune=3Dnative, I pick the former in order to give the best performance through the use of extra instructions, but at the cost of not being able to run on older CPUs at all. This creates a small risk of running into illegal instruction faults when the resulting binary ends up being run on a machine other than the one it was built on. Link: https://lore.kernel.org/lkml/CAHk-=3Dwji1sV93yKbc=3D=3DZ7OSSHBiDE=3DL= AdG_d5Y-zPBrnSs0k2A@mail.gmail.com/ Signed-off-by: Arnd Bergmann --- arch/x86/Kconfig.cpu | 14 ++++++++++++++ arch/x86/Makefile | 5 +++++ 2 files changed, 19 insertions(+) diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index 8fcb8ccee44b..d634b163e913 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu @@ -257,6 +257,20 @@ config X86_GENERIC This is really intended for distributors who need more generic optimizations. =20 +config X86_64_NATIVE + bool "Build with -march=3Dnative optimization" + depends on X86_64 + help + Make it possible to have a slightly better optimized kernel for + the machine it is built on, by passing -march=3Dnative instead + the more generic -march=3Dx86-64 option. This lets compilers + use extensions to the x86-64 instruction set that were not + present in the original AMD Opteron and Intel Pentium4 CPUs, + and schedule instructions for the pipeline model. + + Select this option only when building a kernel to run locally, + as it may be incompatible with any other processor. + # # Define implied options from the CPU selection here config X86_INTERNODE_CACHE_SHIFT diff --git a/arch/x86/Makefile b/arch/x86/Makefile index 8120085b00a4..bf45b84c138f 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -178,8 +178,13 @@ else # Use -mskip-rax-setup if supported. KBUILD_CFLAGS +=3D $(call cc-option,-mskip-rax-setup) =20 +ifdef CONFIG_X86_64_NATIVE + KBUILD_CFLAGS +=3D -march=3Dnative + KBUILD_RUSTFLAGS +=3D -Ctarget-cpu=3Dnative +else KBUILD_CFLAGS +=3D -march=3Dx86-64 -mtune=3Dgeneric KBUILD_RUSTFLAGS +=3D -Ctarget-cpu=3Dx86-64 -Ztune-cpu=3Dgeneric +endif =20 KBUILD_CFLAGS +=3D -mno-red-zone KBUILD_CFLAGS +=3D -mcmodel=3Dkernel --=20 2.39.5